* build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-atomic
passed.
* build/ALPHA_SE/tests/fast/quick/00.hello/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-timing-mp
passed.
*
changeset ee4ac00d0774 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ee4ac00d0774
description:
sim: Use forward declarations for ports.
Virtual ports need TLB data which means anything touching a file in the
arch
directory rebuilds any file that
changeset 00ea9430643b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=00ea9430643b
description:
ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.
This change modifies the way prefetches work. They are now like normal
loads
that don't
changeset ba11187e2582 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ba11187e2582
description:
ARM: Make all ARM uops delayed commit.
diffstat:
src/arch/arm/insts/macromem.hh | 6 --
src/arch/arm/isa/templates/mem.isa | 19 +++
changeset 0d9de7394e38 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0d9de7394e38
description:
ARM/Alpha/Cpu: Stats change for prefetchs to be more like normal loads.
diffstat:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
changeset e40fbbe1ed4f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=e40fbbe1ed4f
description:
scons: add a parameter to configure SCons' build cache
diffstat:
SConstruct | 7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diffs (24 lines):
diff -r
changeset cf9db1c47a77 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=cf9db1c47a77
description:
ARM: Don't return the result of a table walk the same cycle it's
completed.
The L1 cache may have been accessed to provide this data, which confuses
it, if
changeset d3c006ecccd3 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=d3c006ecccd3
description:
Bus: Have the I/O devices that return address ranges print them out.
This way we actually get device names associated with the devices.
diffstat:
changeset 982b4c6c1470 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=982b4c6c1470
description:
Mem: Finish half-baked support for mmaping file in physmem.
Physmem has a parameter to be able to mem map a file, however
it isn't actually used. This
changeset e1eace3a118a in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=e1eace3a118a
description:
ARM: Keep the warnings to a minimum.
These warnings still need to be addresses, but pages of them is
counterproductive.
diffstat:
src/arch/arm/isa.cc
changeset a2c660de7787 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=a2c660de7787
description:
ARM: Add support for M5 ops in the ARM ISA
diffstat:
src/arch/arm/isa/decoder/arm.isa |8 +-
src/arch/arm/isa/decoder/thumb.isa |3 +-
changeset 08d6a773d1b6 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=08d6a773d1b6
description:
ARM: Add checkpointing support
diffstat:
src/arch/arm/isa.hh | 12 +-
src/arch/arm/linux/system.cc | 5 +-
src/arch/arm/linux/system.hh | 4 +-
changeset 85a8198aa2ff in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=85a8198aa2ff
description:
ARM: Add some TLB statistics for ARM
diffstat:
src/arch/arm/tlb.cc | 117 ++-
src/arch/arm/tlb.hh | 28 ---
2
changeset a1a85250e897 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=a1a85250e897
description:
ARM: Add full-system regressions
diffstat:
tests/SConscript
| 21 +-
changeset f61e079ad05e in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f61e079ad05e
description:
ARM: Update SE stats for TLB stats additions
diffstat:
tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini| 2 +-
changeset f4362ffd810f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f4362ffd810f
description:
X86: Fix X86_FS compilation.
diffstat:
src/arch/x86/linux/system.cc | 2 ++
src/arch/x86/stacktrace.cc | 1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diffs
It's apparent an X86_FS regression is still really needed to keep that
code working like it should. Please make sure it builds before pushing
code, but I'm sure a regression would be harder to miss. This will be my
second highest generic M5 priority, possibly getting taken care of this
week or
Sorry Gabe,
To make a regression work you first need m5ops to work and the you can
call m5 readfile, see if the file is non-zero and if it is execute it.
The file is normally just a m5 exit call. I added a changeset that adds
regressions for ARM_FS to reviewboard toady. You can checkout the
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/291/
---
Review request for Default.
Summary
---
ARM: Cache the misc regs at the TLB
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/292/
---
Review request for Default.
Summary
---
ARM: Add support for a dumb IDE
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/296/
---
Review request for Default.
Summary
---
O3: prevent a squash when
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/297/
---
Review request for Default.
Summary
---
ARM/CPU: Add op classes for SIMD type
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/295/
---
Review request for Default.
Summary
---
ARM: Add a Keyboard Mouse Interface
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/294/
---
Review request for Default.
Summary
---
ARM: Implement a CLCD Frame buffer
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/298/
---
Review request for Default.
Summary
---
O3: Make all instructions that write
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/299/
---
Review request for Default.
Summary
---
Scons: Try to make SCons output
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/299/
---
(Updated 2010-11-08 15:49:05.987230)
Review request for Default.
Summary
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/300/
---
Review request for Default.
Summary
---
ARM: Add support for moving
I've done this before, just a sec...
(some googling)
I think you have to use an Action object instead of a raw command in
the Command builder. When building the Action object, the second
parameter is the alternative text to output.
It might look like the following:
env.Command(target,
Oh wait, that's not an environment variable, that's a scons variable
from the command line. My opinion still stands since it'd be sticky
and it's not as nice as a -- option, but it's better than an
environment variable.
Gabe
Quoting Gabriel Michael Black gbl...@eecs.umich.edu:
I've done
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/292/#review436
---
src/dev/ide_ctrl.cc
http://reviews.m5sim.org/r/292/#comment646
Is
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/293/#review437
---
Was the remote_gdb.cc file copied with hg cp Be nice if it were.
-
I think you have to use an Action object instead of a raw command in the
Command builder. When building the Action object, the second parameter is
the alternative text to output.
It might look like the following:
env.Command(target, source, Action(foo $TARGET $SOURCES, FOOING
$SOURCES))
Thoughts? Like it? Hate it?
Love it. What I'd really like would be to have the shorthand go to
stdout and have the verbose stuff go to some sort of scons.log in case
I want the command line. That is probably too much work. We could
also go the other way and add a -q/--quiet (though quiet
On 2010-11-08 17:56:14, Nathan Binkert wrote:
src/dev/ide_ctrl.cc, line 454
http://reviews.m5sim.org/r/292/diff/1/?file=5058#file5058line454
Is this something that we should deal with on a per device basis, or is
this a more generic thing? Also, is this something that should be
On 2010-11-08 18:00:50, Nathan Binkert wrote:
Was the remote_gdb.cc file copied with hg cp Be nice if it were.
I'll make sure the committed code does that. Any other issues?
- Ali
---
This is an automatically generated e-mail. To
It's not sticky since it's not added to the sticky_vars below. Although it
seems like our options are a bit adhoc and there is an arguments() class in
scons that does some of this for us. RE your action command below, yes I saw
that you can do it with an Action() however, according to the
Check out scons -Q
Ali
On Nov 8, 2010, at 8:11 PM, Nathan Binkert wrote:
Thoughts? Like it? Hate it?
Love it. What I'd really like would be to have the shorthand go to
stdout and have the verbose stuff go to some sort of scons.log in case
I want the command line. That is probably too much
Hmm. ok.. it seems like the issue only exists for builders. Which means we
can do it although I don't know a way to make the non COMSTR ones produce
output when VERBOSE=True. Thoughts?
Ali
pretty_scons.patch
Description: Binary data
On Nov 8, 2010, at 10:29 PM, Ali Saidi wrote:
It's
---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/301/
---
Review request for Default.
Summary
---
SimObject: Use self when calling the
This code was apparently never called before, and I think I landed on
it by accident. Could there be anything else like that? Maybe we should
put together a test configuration?
Gabe
On 11/08/10 23:37, Gabe Black wrote:
---
This is an
41 matches
Mail list logo
