Bob,
I have one in the download section of
http://www.geocities.com/uytenhaak/pcb/
regards,
Ben Uijtenhaak
-Original Message-
From: Robert M. Wolfe [mailto:[EMAIL PROTECTED]]
Sent: donderdag 10 oktober 2002 2:11
To: Protel EDA Forum
Subject: [PEDA] Static Sensitive Symbols or Handle
Ben,
Thank you very much!!
Thanks to all that helped
But this made it easiest.
Bob Wolfe
- Original Message -
From: Ben Uijtenhaak [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Thursday, October 10, 2002 3:59 AM
Subject: Re: [PEDA] Static Sensitive Symbols or Handle With
Hi everyone ,
I am trying to manually route a 6 layer board .
Right now I have the components that I need to route on the board.
I started to use the interactive routing mode;
bu twhen I press the '*' key to change layers instead of a via I get a crash that
advises me to exit the application.
Anand Kulkarni wrote:
Hi everyone ,
I am trying to manually route a 6 layer board .
Right now I have the components that I need to route on the board.
I started to use the interactive routing mode;
bu twhen I press the '*' key to change layers instead of a via I get a crash that
advises me
- Original Message -
From: Jun Gong [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]; Protel Developers
Forum [EMAIL PROTECTED]; Open Topic Forum
[EMAIL PROTECTED]
Sent: Wednesday, October 09, 2002 8:23 PM
Subject: [PEDA] flipping board
Hi, Any one knows how to flip a board in
Woohhh, I am really surprised by so many articles on this topic when I
returned to work this morning.
Thank you, Jami, Ian, and all guys!
Jun Gong
ps:
Ian, I am new to the forum, and I don't know that devforum is inactive. If
you feel it's rude to submit the issue to more than 1 forum, I
-Original Message-
From: Ian Wilson [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, October 09, 2002 10:20 PM
To: Protel EDA Forum
Subject: Re: [PEDA] flipping board
On 02:35 PM 10/10/2002 +0930, Terry Creer said:
Heh! sorry 'bout that - I couldn't help it :)
But seriously - Most of the
Ian,
I must apologies.
When I ran the process I mentioned in my e-mail, I would have sworn the
Component pads were in the correct positions when the components were
flipped onto the back of the board.
I went back and tried to recreate the process I mentioned, and you are
absolutely correct.
It always says that there are warnings about my PCB, however it seems to
work fine when I let it continue. I assume that these are undefined
integrity (IBIS or similar) libraries.
Actually they are probably loops in the tracks. These loops may be under
pads and thus hard to find.
I ran into
- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Friday, October 11, 2002 4:29 AM
Subject: Re: [PEDA] signal integrity
It always says that there are warnings about my PCB, however it seems to
work fine when I let it continue. I assume that
the copper. I fixed the loops and SI worked great.
So I should probably get DXP back to find these kind of errors...
Well it does do a bit better job at it, and from the sounds of it the
first Service pack will fix almost all the issues and requests for
improvements.
Once you take over
Once you take over a net you can double click on a pin in the net and
change the model and stimulus for that pin.
Is there a way to assign a component a whole IBIS file (ie the IBIS file
for
that component includign pins etc) as opposed to just each individual
pin??
I was thinking
The only thing left now is Jun is now producing a design counter to IPC
guidelines for documentation, Primary side is on the bottom.
- Original Message -
From: Rick Wilson (Protta) [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Thursday, October 10, 2002 11:03 AM
Hello,
So far the extent of my solder mask control has been
either altering the solder mask expansion rule or else
just telling the board shop to leave it off (for later
heat sink application).
But now I've got I've got a big rectangular area (with
a corner notch taken out) on the board that I
Robert and Bevan,
While I have not done any playing around with Protels Signal Integrity
capability, primarily because I haven't had the time and I know it will take
some study time to understand it's implementation and proper usage, and
secondarily because I know that models are somehow
Miker,
I would think you are correct with the polygon fill. Just like the case of a polygon
fill on the ground plane.
You could do a Gerber File to check the Soldermask.
Regards,
Jeff Adolphs
Lake Shore Cryotronics, Inc.
-Original Message-
From: Robison Michael R CNIN [mailto:[EMAIL
Robison Michael R CNIN wrote:
Hello,
So far the extent of my solder mask control has been
either altering the solder mask expansion rule or else
just telling the board shop to leave it off (for later
heat sink application).
But now I've got I've got a big rectangular area (with
a
It sure will Mike. You can use pads, lines, fills or polygons on a
soldermask layer to create voids in the mask.
Sincerely,
Brad Velander.
Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel (604) 292-9089 (direct line)
Fax (604) 292-9010
email: [EMAIL PROTECTED]
Thanks, Jeff. Checking the Gerber after doing it
is a good idea. I hadn't thought of that as a way
of verifying the results.
miker
-Original Message-
From: Jeff Adolphs [mailto:[EMAIL PROTECTED]]
Sent: Thursday, October 10, 2002 3:25 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Solder
It's very easy to use, you just set up what the output device is, what the
input device is (in terms of pins) on a particular net. You set up the
output and input device family
Then you can transmit a waveform (rising edge, falling edge, clock) down the
line. And get the waveform at each node.
On 04:10 PM 10/10/2002 +0200, Wojciech Oborski said:
Anand Kulkarni wrote:
Hi everyone ,
I am trying to manually route a 6 layer board .
Right now I have the components that I need to route on the board.
I started to use the interactive routing mode;
bu twhen I press the '*' key to change layers
On 01:35 PM 10/10/2002 -0700, Brad Velander said:
It sure will Mike. You can use pads, lines, fills or polygons on a
soldermask layer to create voids in the mask.
Sincerely,
Brad Velander.
Mike,
Since you want a rectangular void in the mask - I suggest a fill rather
than a polygon - easier to
Miker
Thats correct.
Whatever you see won't be there and what you don't see will.
Ian
- Original Message -
From: Robison Michael R CNIN [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Friday, October 11, 2002 6:07 AM
Subject: [PEDA] Solder Mask Polygon ?
Hello,
I did play round with it a while ago, actually testing some of our design
centres IBIS models to see if they converted correctly. The engineer involved
in writing the models was quite interested and the results I got when running
waveforms around 150MHz seemed to give the sort of ringing and
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