At 07:11 AM 2/15/2003, Mike Reagan wrote:
This is 2003, hard to believe some of these guys are
designing some of America's best fighting hardware.

Yes, many engineers think it is too much work to create clean schematics, and some of them don't even get it when their designs come back with serious errors. Must be someone else's fault.

Copper Pours    another subject
Well, I was working with Data Circuit's engineering department  in
California yesterday and resolved a copper pour issue.  If  you use the "NO
HATCH"  option,   you can send gerbers with just copper outlines, annotate
it with a FAB NOTE,  then allow your fabricator to fill in copper areas.
On large designs, this can be of great benefit  for pouring copper on
external layers.   Copper pours can take hours on a large design, worst yet
if it isn't right it has to pour again  This is my tip of the Day

This would make me very nervous. It is not only time-consuming to define what they should fill, it sets up a manual operation for the fabricator, one which will not be checked. If they do it right, fine, though there are lots of ways to screw it up. But since you are ready to consider that the board is done, why not let it run overnight to pour all the planes? (I recall there is a way to do all at once but I don't have time to describe it at the moment, perhaps someone else will). You would then have the option of performing a complete DRC as well. You can always keep your unpoured version if you want to make more changes, or you can just unpour and repour the pours in an area you want to change.

In the end, if Protel would go to positive/negative merge pours, all this would become moot. Pours would be practically instantaneous.

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