Re: [gem5-dev] Review Request 2758: build: Don't test for KVM xsave support on ARM

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2758/#review6335 --- Ship it! Ship It! - Alexandru Dutu On May 7, 2015, 10:54 a.m

Re: [gem5-dev] Review Request 2760: kvm, x86: Guard x86-specific APIs in KvmVM

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2760/#review6345 --- Ship it! Ship It! - Alexandru Dutu On May 7, 2015, 10:55 a.m

Re: [gem5-dev] Review Request 2760: kvm, x86: Guard x86-specific APIs in KvmVM

/#comment5467 Would it be useful/cleaner to specialize this class for x86 and move CPUIDVector, MSRIndexVector and getSupportedCPUID into the derived class? - Alexandru Dutu On May 7, 2015, 10:55 a.m., Andreas Sandberg wrote

Re: [gem5-dev] Review Request 2761: kvm: Fix dumping code for large registers

/#comment5468 Instead of csprintf, would std::setbase(16) be a better choice here? - Alexandru Dutu On May 7, 2015, 10:59 a.m., Andreas Sandberg wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org

Re: [gem5-dev] Review Request 2759: kvm: Remove KvmVM APIs for in-kernel IRQ chip simulation

or is it meant to be just for in-kernel interrupts? - Alexandru Dutu On May 7, 2015, 10:54 a.m., Andreas Sandberg wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2759

Re: [gem5-dev] Review Request 2764: arm: Get rid of pointless have_generic_timer param

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2764/#review6357 --- Ship it! Ship It! - Alexandru Dutu On May 7, 2015, 11 a.m., Andreas

Re: [gem5-dev] Review Request 2851: cpu: o3: Mapping the ZeroRegister for all hardware threads

the ZeroRegister to one physical register across all hardware threads. Diffs (updated) - src/cpu/o3/cpu.cc 9141d87c7f71099d6256b179b7819eab878cbb67 Diff: http://reviews.gem5.org/r/2851/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu

Re: [gem5-dev] Review Request 2851: cpu: o3: Mapping the ZeroRegister for all hardware threads

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2851/#review6557 --- On June 22, 2015, 6:44 p.m., Alexandru Dutu wrote

Re: [gem5-dev] Review Request 2855: cpu: o3: Fetch stage updates for hw threads priority list

/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 2856: cpu: o3: Commit stage updates for hw threads priority list

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2856/#review6536 --- On May 28, 2015, 3:40 p.m., Alexandru Dutu wrote

Re: [gem5-dev] Review Request 2851: cpu: o3: Mapping the ZeroRegister for all hardware threads

/2851/#comment5566 This does not take care of different threads. - Alexandru Dutu On May 28, 2015, 3:38 p.m., Alexandru Dutu wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2851

Re: [gem5-dev] Review Request 2849: config, SMT: Enabling SMT for multi-threaded programs

generated e-mail. To reply, visit: http://reviews.gem5.org/r/2849/#review6482 --- On June 1, 2015, 2:07 p.m., Alexandru Dutu wrote: --- This is an automatically generated e-mail

Re: [gem5-dev] Review Request 2846: cpu: o3: Merging haltContext with suspendContext

, visit: http://reviews.gem5.org/r/2846/#review6398 --- On May 26, 2015, 4:45 p.m., Alexandru Dutu wrote: --- This is an automatically generated e-mail. To reply, visit: http

Re: [gem5-dev] Review Request 2846: cpu: o3: Merging haltContext with suspendContext

accessed within their respective pipe stages and set/reset based on signals from adjacent pipe stages. Exposing them publicly through the removeStall() functions seems like it breaks the existing pipe stage stall signalling abstraction. Alexandru Dutu wrote: It seems

Re: [gem5-dev] Review Request 2846: cpu: o3: Merging haltContext with suspendContext

/ Testing --- Quick regressions passed. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 2849: config, SMT: Enabling SMT for multi-threaded programs

: http://reviews.gem5.org/r/2849/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 2849: config, SMT: Enabling SMT for multi-threaded programs

, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 2851: cpu: o3: Mapping the ZeroRegister for all hardware threads

Diff: http://reviews.gem5.org/r/2851/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 2852: x86, o3: Enabling x86 TLBs for multiple hardware threads

: http://reviews.gem5.org/r/2852/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 2860: x86: Mwait reimplementation

/monitor_mwait.isa d02b45a554b52c68cce41e1b3895fb8582a639dd Diff: http://reviews.gem5.org/r/2860/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo

[gem5-dev] Review Request 2856: cpu: o3: Commit stage updates for hw threads priority list

d02b45a554b52c68cce41e1b3895fb8582a639dd src/cpu/o3/commit_impl.hh d02b45a554b52c68cce41e1b3895fb8582a639dd src/cpu/o3/cpu.cc d02b45a554b52c68cce41e1b3895fb8582a639dd Diff: http://reviews.gem5.org/r/2856/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu

[gem5-dev] Review Request 2858: cpu, o3: Checking AddressMonitor structures on every store for SMT

/base.cc d02b45a554b52c68cce41e1b3895fb8582a639dd src/cpu/o3/lsq_unit_impl.hh d02b45a554b52c68cce41e1b3895fb8582a639dd Diff: http://reviews.gem5.org/r/2858/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu

[gem5-dev] Review Request 2857: cpu: Adding AddressMonitor structs for every hardware thread

: http://reviews.gem5.org/r/2857/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 2853: x86, o3: Enabling x86 TLBs for multiple hardware threads

: http://reviews.gem5.org/r/2853/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 2852: x86, o3: Enabling x86 TLBs for multiple hardware threads

d02b45a554b52c68cce41e1b3895fb8582a639dd Diff: http://reviews.gem5.org/r/2852/diff/ Testing --- Quick regressions passed for all ISAs. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 2828: cpu: implements vector registers

On July 6, 2015, 12:42 p.m., Giacomo Gabrielli wrote: These are my current thoughts about this patch: 1. My impression is that there is still not enough architectural support to understand if the new vector register type as it stands can address all the different corner cases

Re: [gem5-dev] Review Request 2827: x86: decode instructions with vex prefix

instructions still unimplemented, is this considered complete or it is still in development? - Alexandru Dutu On June 16, 2015, 11:15 p.m., Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5

Re: [gem5-dev] Review Request 2833: kvm, arm: Move ARM-specific files to arch/arm/kvm/

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2833/#review6334 --- Ship it! Ship It! - Alexandru Dutu On May 18, 2015, 12:24 p.m

[gem5-dev] Review Request 2846: cpu: o3: Merging haltContext with suspendContext

/2846/diff/ Testing --- Quick regressions passed. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 2996: cpu: Add per-thread monitors

that http://reviews.gem5.org/r/2857/ does plus enabling monitor for SMT in minor cpu. - Alexandru Dutu On July 30, 2015, 6:47 p.m., Curtis Dunham wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r

Re: [gem5-dev] Review Request 2999: cpu, isa, mem: Adds per-thread wakeup logic

On July 30, 2015, 11:59 p.m., Steve Reinhardt wrote: so what is the difference between xc-getCpuPtr()-wakeup(xc-threadId()); and xc-activate(); ? I think we need to clarify whether or not these are equivalent, and if so, why we need both, and if not, what the differences

Re: [gem5-dev] Review Request 2994: cpu: Change thread assignents for heterogenous SMT

/#comment5956 Not sure I understand why this is needed, it seems one can already figure out if it is a multi-threaded system configured by checking numThreads. - Alexandru Dutu On July 30, 2015, 6:46 p.m., Curtis Dunham wrote

Re: [gem5-dev] Review Request 2979: ruby: eliminate type uint64 and int64

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2979/#review6809 --- Ship it! Ship It! - Alexandru Dutu On July 19, 2015, 11:41 p.m

Re: [gem5-dev] Review Request 3207: arm: remote GDB: rationalize structure of register offsets

in SE mode for x86. It seems fine to me. Thanks for cleaning this up! - Alexandru Dutu On Dec. 3, 2015, 9:53 a.m., Boris Shingarov wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

[gem5-dev] changeset in gem5: x86: revamp cmpxchg8b/cmpxchg16b implementation

changeset 82bb3ee706b3 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=82bb3ee706b3 description: x86: revamp cmpxchg8b/cmpxchg16b implementation The previous implementation did a pair of nested RMW operations, which isn't compatible with the way that

Re: [gem5-dev] Review Request 3279: sim: Add support for forking

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3279/#review8031 --- Ship it! Ship It! - Alexandru Dutu On Jan. 14, 2016, 6:31 p.m

Re: [gem5-dev] Review Request 3277: sim: Add support for notifying Drainable objects of a fork

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3277/#review8029 --- Ship it! Ship It! - Alexandru Dutu On Jan. 14, 2016, 6:30 p.m

Re: [gem5-dev] Review Request 3278: dev: Add post-fork handling for disk images

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3278/#review8030 --- Ship it! Ship It! - Alexandru Dutu On Jan. 14, 2016, 6:30 p.m

Re: [gem5-dev] Review Request 3235: stats: organize and clarify resettable stats

> On Jan. 11, 2016, 11:52 p.m., Joel Hestness wrote: > > src/cpu/kvm/base.cc, line 495 > > > > > > We should probably check with Andreas Sandberg on this one. It looks > > like ctrInsts is already a cummulative stat for

Re: [gem5-dev] Review Request 3388: kvm: Add an option to force context sync on kvm entry/exit

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3388/#review8096 --- Ship it! - Alexandru Dutu On March 16, 2016, 5:44 p.m., Andreas

Re: [gem5-dev] Review Request 3388: kvm: Add an option to force context sync on kvm entry/exit

> On March 18, 2016, 9:11 p.m., Alexandru Dutu wrote: > > I am not sure I understand why it is required to sync on every exit and not just on a gdb breakpoint exit. Also, I am curious about your motivation for a kvm-specific thread context. Can you please detail a bit? -

[gem5-dev] changeset in gem5: syscall_emul: add extra debug support for sys...

changeset 3370547fa302 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=3370547fa302 description: syscall_emul: add extra debug support for syscalls Breaks the debug output from system calls into two levels: Base and Verbose. A macro is added

Re: [gem5-dev] Review Request 3342: mem: Remove threadId from memory request class

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3342/#review8052 --- Ship it! Seems a good cleanup to me! - Alexandru Dutu On Feb. 23

Re: [gem5-dev] Review Request 3401: x86: fix TLB issue

. A more accurate implementation seems to be to update the TLB::lookup function such that it does not return the entry when the logBits are different. - Alexandru Dutu On April 13, 2016, 1:37 p.m., Bjoern A. Zeeb wrote

Re: [gem5-dev] Review Request 3535: gpu-compute: Adding context serialization methods to Wavefront

Hansson wrote: > > src/gpu-compute/wavefront.cc, line 946 > > <http://reviews.gem5.org/r/3535/diff/1/?file=56853#file56853line946> > > > > Not too many bonus points for comments here...that's for sure. > > Alexandru Dutu wrote: > I have added a com

Re: [gem5-dev] Review Request 3535: gpu: Adding serializing methods to Wavefront

; serializing and deserializing scalars and containers? > > Alexandru Dutu wrote: > Andreas, are you refering to the Serializable class? If so, my > understanding is that Serializable is used in the context of creating a > Checkpoint, therefore it includes the names of the

Re: [gem5-dev] Review Request 3535: gpu: Adding serializing methods to Wavefront

> On June 30, 2016, 7:17 a.m., Andreas Hansson wrote: > > src/gpu-compute/wavefront.cc, line 948 > > > > > > Why the custom format? Why not stick to gem5's established methods for > > serializing and deserializing scalars

Re: [gem5-dev] Review Request 3670: syscall_emul: [patch 4/22] remove redundant M5_pid field from process

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3670/#review9297 --- Ship it! Ship It! - Alexandru Dutu On Oct. 17, 2016, 3:14 p.m

Re: [gem5-dev] Review Request 3788: arm, kvm: remove KvmGic

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3788/#review9327 --- Ship it! Ship It! - Alexandru Dutu On Jan. 17, 2017, 10:04 p.m

Re: [gem5-dev] Review Request 3787: arm, kvm: Automatically use the MuxingKvmGic

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3787/#review9324 --- Ship it! Ship It! - Alexandru Dutu On Jan. 17, 2017, 10:04 p.m

Re: [gem5-dev] Review Request 3785: sim, kvm: make KvmVM a System parameter

785/#comment7940> It seems we don't need #if here, p->kvm_vm will be nullptr in case there is no initialization from python. Right? - Alexandru Dutu On Jan. 17, 2017, 10:04 p.m., Curtis Dunham wrote: > > --- > This is an automat

Re: [gem5-dev] Review Request 3766: tests: check for gem5 binary before tests

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3766/#review9325 --- Ship it! Ship It! - Alexandru Dutu On Dec. 15, 2016, 4:51 p.m

Re: [gem5-dev] Review Request 3784: sim,kvm,arm: fix typos

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3784/#review9326 --- Ship it! Ship It! - Alexandru Dutu On Jan. 17, 2017, 10:04 p.m

Re: [gem5-dev] Review Request 3785: sim, kvm: make KvmVM a System parameter

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3785/#review9349 --- Ship it! Ship It! - Alexandru Dutu On Jan. 17, 2017, 10:04 p.m

Re: [gem5-dev] Review Request 3785: sim, kvm: make KvmVM a System parameter

785/#comment7943> Sorry, I should have been more specific. I meant by not conditioning System.kvm_vm by USE_KVM in System.py and have it be nullptr if KVM is not present we can get rid of some #if USE_KVM in the C++ code. - Alexandru Dutu On Jan. 17, 2017, 10:04 p.m., Curtis Dunham

Re: [gem5-dev] Review Request 3696: syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3696/#review9470 --- Ship it! Ship It! - Alexandru Dutu On Feb. 23, 2017, 7:40 p.m

Re: [gem5-dev] Review Request 3644: gpu-compute: remove inst enums and use bit flag for attributes

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3644/#review8775 --- Ship it! Ship It! - Alexandru Dutu On Oct. 6, 2016, 2:14 a.m., Tony

Re: [gem5-dev] Review Request 3643: style: reduce include dependencies in some headers

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3643/#review8774 --- Ship it! Ship It! - Alexandru Dutu On Oct. 5, 2016, 4:27 p.m

[gem5-dev] changeset in gem5: kvm: Adding details to kvm page fault in x86

changeset b29aca3fcb75 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=b29aca3fcb75 description: kvm: Adding details to kvm page fault in x86 Adding details, e.g. rip, rsp etc. to the kvm pagefault exit when in SE mode. diffstat:

[gem5-dev] changeset in gem5: misc: Adds a warning in case gdb is attached ...

changeset 370d69b00fcf in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=370d69b00fcf description: misc: Adds a warning in case gdb is attached multiple times Instead of scheduling another event, this patch adds a warning in case gdb is attached

[gem5-dev] changeset in gem5: gpu-compute: Remove WFContext

changeset b511733958d0 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=b511733958d0 description: gpu-compute: Remove WFContext WFContext struct is currently unused and it has been rendered not useful in saving and restoring the context of a Wavefront.

[gem5-dev] changeset in gem5: gpu-compute: Changing reconvergenceStack type

changeset a9f0711e7230 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=a9f0711e7230 description: gpu-compute: Changing reconvergenceStack type std::stack has no iterators, therefore the reconvergence stack can't be iterated without poping elements off.

[gem5-dev] changeset in gem5: gpu-compute: Wavefront refactoring

changeset 2e8d4bd8108d in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=2e8d4bd8108d description: gpu-compute: Wavefront refactoring Renaming members of the Wavefront class in accordance with the style guide. diffstat: src/arch/hsail/gen.py

[gem5-dev] changeset in gem5: hsail: Fix disassembly of load instruction wi...

changeset 44ca2fc730eb in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=44ca2fc730eb description: hsail: Fix disassembly of load instruction with 3 destination operands diffstat: src/arch/hsail/insts/mem_impl.hh | 9 + 1 files changed, 9 insertions(+), 0

[gem5-dev] changeset in gem5: gpu-compute: Adding vector register file debu...

changeset 46cffde5d8a6 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=46cffde5d8a6 description: gpu-compute: Adding vector register file debug messages This patch introduces DPRINTFs for reading and writing to and from the vector register file.

[gem5-dev] changeset in gem5: gpu-compute: Refactoring Wavefront::dynWaveId

changeset 42a1873be45c in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=42a1873be45c description: gpu-compute: Refactoring Wavefront::dynWaveId diffstat: src/arch/hsail/gen.py | 2 +- src/gpu-compute/compute_unit.cc | 24

[gem5-dev] changeset in gem5: gpu-compute: Adding context serialization met...

changeset d426728892fe in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=d426728892fe description: gpu-compute: Adding context serialization methods to Wavefront This patch adds methods to serialize the context of a particular wavefront to the simulated

[gem5-dev] changeset in gem5: gpu-compute: Adding ioctl for HW context size

changeset aa846ec8cd8d in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=aa846ec8cd8d description: gpu-compute: Adding ioctl for HW context size Adding runtime support for determining the memory required by a SIMD engine when executing a particular

Re: [gem5-dev] Review Request 3637: mem: Functional page tables data structure change

s no need for this patch. - Alexandru --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3637/#review8739 --- On Sept. 27,

Re: [gem5-dev] Review Request 3636: kvm: Adding details to kvm page fault in x86

7fae74a89c2c4d2e459817cedc75921ba7d52660 Diffs (updated) - src/arch/x86/pseudo_inst.cc 2c111e634da005e2b78981fadd0368662454f2ed Diff: http://reviews.gem5.org/r/3636/diff/ Testing --- Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http

[gem5-dev] Review Request 3635: gdb: Adds a warning in case gdb is attached multiple times

/remote_gdb.cc 2c111e634da005e2b78981fadd0368662454f2ed Diff: http://reviews.gem5.org/r/3635/diff/ Testing --- Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3637: mem: Functional page tables data structure change

2c111e634da005e2b78981fadd0368662454f2ed Diff: http://reviews.gem5.org/r/3637/diff/ Testing --- Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3635: gdb: Adds a warning in case gdb is attached multiple times

. - Alexandru --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3635/#review8757 --- On Oct. 3, 2016, 5:41 a.m., Alexa

Re: [gem5-dev] Review Request 3635: misc: Adds a warning in case gdb is attached multiple times

, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3635: gdb: Adds a warning in case gdb is attached multiple times

. Diffs - src/base/remote_gdb.cc 2c111e634da005e2b78981fadd0368662454f2ed Diff: http://reviews.gem5.org/r/3635/diff/ Testing (updated) --- Regressions pass. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http

Re: [gem5-dev] Review Request 3636: kvm: Adding details to kvm page fault in x86

7fae74a89c2c4d2e459817cedc75921ba7d52660 Diffs - src/arch/x86/pseudo_inst.cc 2c111e634da005e2b78981fadd0368662454f2ed Diff: http://reviews.gem5.org/r/3636/diff/ Testing (updated) --- Regressions pass. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org

Re: [gem5-dev] Review Request 3634: gpu-compute: Added method to compute the actual workgroup size

. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3634: gpu: Added method to compute the actual workgroup size

2c111e634da005e2b78981fadd0368662454f2ed Diff: http://reviews.gem5.org/r/3634/diff/ Testing --- Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3675: syscall_emul: [patch 9/22] remove unused global variable (num_processes)

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3675/#review8946 --- Ship it! Ship It! - Alexandru Dutu On Oct. 17, 2016, 3:25 p.m

Re: [gem5-dev] Review Request 3671: syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3671/#review8948 --- Ship it! Ship It! - Alexandru Dutu On Oct. 19, 2016, 7:27 p.m

Re: [gem5-dev] Review Request 3679: style: [patch 12/22] fix preliminary style issues for subsequent fault patch

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3679/#review8949 --- Ship it! Ship It! - Alexandru Dutu On Oct. 17, 2016, 4:11 p.m

Re: [gem5-dev] Review Request 3646: gpu-compute, hsail: call discardFetch() from the WF

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3646/#review8955 --- Ship it! Ship It! - Alexandru Dutu On Oct. 7, 2016, 8:53 p.m., Tony

Re: [gem5-dev] Review Request 3658: gpu-compute: support in-order data delivery in GM pipe

two methods should also go away, however that is not something to be considered for this patch. - Alexandru Dutu On Oct. 10, 2016, 11:51 p.m., Tony Gutierrez wrote: > > --- > This is an automatically generated e-mail. To

Re: [gem5-dev] Review Request 3652: gpu-compute: use the GPUISA object to advance the PC

em5.org/r/3652/#comment7696> This should go away when we will fetch directly from memory. - Alexandru Dutu On Oct. 10, 2016, 6:24 p.m., Tony Gutierrez wrote: > > --- > This is an automatically generated e-mail. To reply

Re: [gem5-dev] Review Request 3655: gpu-compute, hsail: make the PC a byte address, not an instruction index

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3655/#review8953 --- Ship it! Looks good to me. - Alexandru Dutu On Oct. 10, 2016, 6:34

Re: [gem5-dev] Review Request 3696: syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations

ented lines be removed? src/sim/syscall_emul.hh (line 1762) <http://reviews.gem5.org/r/3696/#comment7808> Ranged for will work here as well. - Alexandru Dutu On Nov. 14, 2016, 8:37 p.m., Brandon Potter wrote: > > --- &

Re: [gem5-dev] Review Request 3702: syscall_emul: [PATCH 21/22] rewrite code related to system call exits

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3702/#review9103 --- Ship it! Ship It! - Alexandru Dutu On Nov. 16, 2016, 4:44 p.m

Re: [gem5-dev] Review Request 3721: x86: fix issue with casting in Cvtf2i

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3721/#review9115 --- Ship it! Ship It! - Alexandru Dutu On Nov. 17, 2016, 8:54 p.m., Tony

Re: [gem5-dev] Review Request 3701: syscall_emul: [PATCH 20/22] add the tgkill system call

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3701/#review9101 --- Ship it! Ship It! - Alexandru Dutu On Nov. 14, 2016, 8:56 p.m

Re: [gem5-dev] Review Request 3706: style: local variable name correction

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3706/#review9104 --- Ship it! Ship It! - Alexandru Dutu On Nov. 16, 2016, 4:24 p.m

Re: [gem5-dev] Review Request 3700: syscall_emul: [PATCH 19/22] adds basic signaling mechanism to SE mode

700/#comment7850> This should not have an underscore, also why not just use signal? - Alexandru Dutu On Nov. 16, 2016, 4:36 p.m., Brandon Potter wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > h

Re: [gem5-dev] Review Request 3662: syscall_emul: [patch 2/22] move SyscallDesc into its own .hh and .cc

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3662/#review8871 --- Ship it! Ship It! - Alexandru Dutu On Oct. 17, 2016, 3:08 p.m

Re: [gem5-dev] Review Request 3670: syscall_emul: [patch 4/22] remove redundant M5_pid field from process

629> Even if we are serializing nextPid in the System object, shouldn't we still serialize _pid? We might need to have the same pids restored and not reassign different ones. src/sim/process.cc <http://reviews.gem5.org/r/3670/#comment7630> Same goes for unserialization. - Al

Re: [gem5-dev] Review Request 3672: syscall_emul: [patch 6/22] remove unused fields from Process class

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3672/#review8876 --- Ship it! Ship It! - Alexandru Dutu On Oct. 17, 2016, 3:19 p.m

[gem5-dev] Review Request 2312: Multi-level page table class.

c625a3c51bac050879457e666dd83299a36d761b src/sim/process.hh c625a3c51bac050879457e666dd83299a36d761b src/sim/process.cc c625a3c51bac050879457e666dd83299a36d761b Diff: http://reviews.gem5.org/r/2312/diff/ Testing --- Regressions passed. Thanks, Alexandru Dutu ___ gem5

[gem5-dev] Review Request 2313: Making KvmCPU model usable in SE mode.

c625a3c51bac050879457e666dd83299a36d761b src/cpu/kvm/x86_cpu.hh c625a3c51bac050879457e666dd83299a36d761b src/cpu/kvm/x86_cpu.cc c625a3c51bac050879457e666dd83299a36d761b Diff: http://reviews.gem5.org/r/2313/diff/ Testing --- Quick regressions passed. Thanks, Alexandru Dutu

Re: [gem5-dev] Review Request 2312: Multi-level page table class.

table storage. - Alexandru --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2312/#review5188 --- On July 11, 2014, 3:57 p.m., Alexandru Dutu

[gem5-dev] Review Request 2319: Mem: adding architectural page table support for SE mode

c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 src/sim/process.cc c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 Diff: http://reviews.gem5.org/r/2319/diff/ Testing --- Regressions passed. Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org

Re: [gem5-dev] Review Request 2313: Making KvmCPU model usable in SE mode.

/#review5187 --- On July 11, 2014, 4:01 p.m., Alexandru Dutu wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2313

[gem5-dev] Review Request 2322: SegInit, x86: Segment initialization to support KvmCPU in SE

c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 src/sim/process.cc c00b5ba43967e7e48a28b7ddc48c9f4afaf2ab76 Diff: http://reviews.gem5.org/r/2322/diff/ Testing --- Quick regression tests Thanks, Alexandru Dutu ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman

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