Mark E Witherite wrote:
> That's a bad assumption. This last year
> I learned that a board house is only as good as it's production
> employees. a company that was once a NASA's top ten list, sent me batch of
> boards with two nets shorted. And yes they were ordered with bed of nails
> testi
got it!
- Original Message -
From: "Abd ulRahman Lomax" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Friday, April 12, 2002 1:30 PM
Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
> I've been having ISP problems. V
I've been having ISP problems. Verizon. Need I say more? Anyway, I think
they are fixed, courtesy of addr.com.
At 05:52 PM 4/11/2002 +0100, Jason Morgan wrote:
>As for the latest on the actual problem - board warping to well within IPC
>recomendations but outside of what we'd like, it seems that
rotel EDA Forum'
> Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Brad,
>
> The boards are manufactured to BS and IPC recommendations by
> a high volume
> international supplier if there are any problems with the
> plating, ( of
> which there is
ks for all your help,
Jason.
-Original Message-
From: Brad Velander [mailto:[EMAIL PROTECTED]]
Sent: 11 April 2002 16:41
To: 'Protel EDA Forum'
Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
Jason,
aside from your problems with warp and twist, there are other
possi
- 11.
> -Original Message-
> From: Jason Morgan [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, April 11, 2002 1:10 AM
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Monitoring - sort of, bit busy for full followup.
&
e witht that. Also, there seem to be no polygons placed on the routing
>layers, which might add to the problem.
>
>Igor
>
>-Original Message-
>From: Mark E Witherite [mailto:[EMAIL PROTECTED]]
>Sent: Thursday, 4 April 2002 4:56 AM
>To: Protel EDA Forum
>Subj
we've had no input from the manufacturer as to what (if any) of the
>above will be better, though
>they agree that all should have some affect (positive or negative) on bow
>and twist.
>
>We've also noticed that over a long period (weeks) the twist gets less.
>
>Regar
John Said:
>Another test: if you run two bare boards through reflow, with one
>"top" facing up and the other facing down, do both boards warp in
>the same direction, or is it always toward the "top" (or "bottom",
>as the case may be). The former would point to a reflow issue, while
>the latter wo
, not the proportion
of Ni/Au to Cu.
j.
-Original Message-
From: Brad Velander [mailto:[EMAIL PROTECTED]]
Sent: 04 April 2002 20:00
To: 'Protel EDA Forum'
Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
But Harry,
the query was only, why there was 1.1mils associated w
At 04:04 PM 4/3/2002 -0500, Lomax wrote:
>This list is also not the prime place to find advice on this, I'd suggest
>the IPC Designers Forum. Butyou never can tell...
Well, I did leave a door open I strongly suspect that the solution is
somewhere among all the suggestions made here; certain
gn.
John Haddy
> -Original Message-
> From: Jason Morgan [mailto:[EMAIL PROTECTED]]
> Sent: Friday, 5 April 2002 1:40 AM
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Thanks for all the advice and suggestions.
>
> Some
Jason Morgan wrote:
> We've tried with and without components with the same or similar results.
Wow, this sure eliminates a number of possibilities!
> I can't say who designed the rack, but to our knowlege their own cards fit
> into the rack OK - even though our samples are twisted to a small d
Good question - too quickly read - too quick on reply - not answered.
Still a good question.
At 10:59 AM 4/4/02 -0800, you wrote:
>But Harry,
> the query was only, why there was 1.1mils associated with the NI/Au?
>Normal standards would call for 150 - 200 uinches of NI and upto 50uinches
gt; Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Copper on a printed circuit is subject to severe oxidation
> unless coated.
> Cu oxides are poor electrical conductors.
>
> Gold is a passive metal with excellent conductivity.
>
> If you plate gold direc
Copper on a printed circuit is subject to severe oxidation unless coated.
Cu oxides are poor electrical conductors.
Gold is a passive metal with excellent conductivity.
If you plate gold directly on copper, Au/Cu intermetallics are formed that
cause the bond to be brittle and subject to mechan
and the outcome, thanks once
>again for all the help.
>
>Jason
>
>
>-----Original Message-
>From: Jon Elson [mailto:[EMAIL PROTECTED]]
>Sent: 03 April 2002 21:53
>To: Protel EDA Forum
>Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
>Jason Morgan w
Original Message-
> From: Mark E Witherite [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, April 04, 2002 6:38 AM
> To: Protel EDA Forum
> Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Hi,
> I did the math last night on the CTE differences. When I saw
> the t
ormed of the solution and the outcome, thanks once
again for all the help.
Jason
-Original Message-
From: Jon Elson [mailto:[EMAIL PROTECTED]]
Sent: 03 April 2002 21:53
To: Protel EDA Forum
Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
Jason Morgan wrote:
> Many thanks,
>
>
Since it seems to get better over time is it possible that there is a
moisture or humidity related problem. I have seen surface mount chips
explode if they absorb moisture then get soldered. If the laminate has
moisture in it and it changes with the heating it may then relax as it
reabsorbs mo
OTECTED]]
> Sent: Wednesday, April 03, 2002 13:24
> To: Protel EDA Forum
> Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Some things to consider:
>
> 1. FR4 resin transition temperature is between 115C and
> 135C. Reflow
> soldering temperatures are typi
At 03:03 PM 4/3/2002 +0100, Jason Morgan wrote:
>We have a board warping problem and are looking for a PCB expert to help
>resolve it.
>(Preferably located in the UK, but not important)
Unless it involves looking at the fabbed board itself -- we haven't gone
far enough to know if that would be
Jason Morgan wrote:
> Many thanks,
>
> Details are as follows:
>
> 6 Layer 1.6 FR4
> 8" x 10" Board
>
> PCB support is a wasted rectangle 10mm wide along all edges, supporting PCB
> at 2 or 3 points along each edge. (First observation is that this should
> have copper layers)
A number of differ
I agree with Brad
Mike Reagan
- Original Message -
From: Brad Velander <[EMAIL PROTECTED]>
To: 'Protel EDA Forum' <[EMAIL PROTECTED]>
Sent: Wednesday, April 03, 2002 2:07 PM
Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
Darryl, Henry, Mark,
just as a point
April 03, 2002 10:45 AM
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
>
>
> Ditto on CTE mismatch & profile.
> Cu = 16.56 µm/m*°C
> Au = 4.39 µm/m*°C
> Ni = 12.96 µm/m*°C
>
> Ni-Au = ??
* * * * * * * * * * * * *
prepreg thickness.
> >6: Use 1.8 FR4 by increasing core thickness (undesireable)
> >
> >So far we've had no input from the manufacturer as to what
> (if any) of the
> >above will be better, though
> >they agree that all should have some affect (positive or
> negative)
ive) on bow
>and twist.
>
>We've also noticed that over a long period (weeks) the twist gets less.
>
>Regards
>
>Jason.
>
>
>-Original Message-
>From: Mike Reagan [mailto:[EMAIL PROTECTED]]
>Sent: 03 April 2002 16:43
>To: Protel EDA Forum
>
Have you tried running a blank board (no solder, no components) through the
solder/reflow heating cycle? And possibly a board with solder, but no
components?
>> > Hi,
>> >
>> > We have a board warping problem and are looking for a PCB expert to help
>> > resolve it.
>> > (Preferably located in
Jason,
here is just one possible avenue to add to your enquiries,
reflow/wave temp profile! Is the temp profile heating or cooling too quickly
(particularly cooling). One other thing that you don't mention, how is the
copper balance across the design and all layers?
I don't necessa
el EDA Forum
Subject: Re: [PEDA] WANTED: PCB Expert (Off Topic)
Jason
Some of our advice is free
What process is warping the boards? Reflow or manufacturing? or upset
employee?
Mike Reagan
EDSI
- Original Message -
From: Jason Morgan <[EMAIL PROTECTED]>
To: 'Protel EDA
Jason
Some of our advice is free
What process is warping the boards? Reflow or manufacturing? or upset
employee?
Mike Reagan
EDSI
- Original Message -
From: Jason Morgan <[EMAIL PROTECTED]>
To: 'Protel EDA Forum' <[EMAIL PROTECTED]>
Sent: Wednesday, April 03, 2002 9:03 AM
Subject: [PE
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