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Ship it!
It is great to have this patch done. This is a big step in
changeset 4e386e993ae8 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=4e386e993ae8
description:
Regression: Updates regression outputs for Ruby memtest
This patch updates the regression outputs for Ruby memtest. This was
required because of the
changeset d59189f372e7 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=d59189f372e7
description:
MOESI_hammer: Fixed uniprocessor DMA bug
diffstat:
src/mem/protocol/MOESI_hammer-cache.sm | 17 -
src/mem/protocol/MOESI_hammer-dir.sm | 14
changeset 5204873afc05 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=5204873afc05
description:
ruby: added generic dma machine
diffstat:
src/mem/protocol/RubySlicc_Exports.sm | 1 +
src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
:
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(Updated 2011-08-17 18:09:03)
Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan
Binkert, Brad
)
Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan
Binkert, Brad Beckmann, and Tushar Krishna.
Summary
---
GARNET: adding a fault model for resilient on-chip network research.
This patch adds a fault model, which provides the probability of a number
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Thanks for the heads up on this patch. I'm glad you found the time to
On 2011-10-27 22:35:21, Brad Beckmann wrote:
Thanks for the heads up on this patch. I'm glad you found the time to dive
into it.
I'm confused that the comment mentions a list of ports, but I don't see a
list of ports in the code and I'm not sure how would even be used
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Nilay,
Thanks for pushing this patch along. This is a very important
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Does this really implement a post-retirement store buffer, or is this
changeset 16da1c63263f in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=16da1c63263f
description:
physmem: Improved fatal message for size mismatch
diffstat:
src/mem/physical.cc | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diffs (13 lines):
diff -r
changeset 90f217f28e19 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=90f217f28e19
description:
MOESI_hammer: fixed L2 to L1 infinite stalls and deadlock
diffstat:
src/mem/protocol/MOESI_hammer-cache.sm | 66 +++--
1 files changed, 46
changeset b02ad38b477d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=b02ad38b477d
description:
regress: updated hammer memtest and rubytest outputs
diffstat:
tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini
| 1 +
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Hi Andreas,
Overall, this patch looks find to me. However, I would
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Thanks for pushing this forward Nilay! I will feel very good to see
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Ship it!
Just one minor question about the packet you create. Other
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Ship it!
- Brad
On 2012-01-07 08:11:56, Nilay Vaish wrote:
On 2012-01-06 17:49:56, Brad Beckmann wrote:
src/mem/ruby/system/Sequencer.cc, line 526
http://reviews.m5sim.org/r/927/diff/2/?file=16851#file16851line526
I like the term cooldown, but I think it is a little bit confusing in
this situation. If I understand this code correctly
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Nilay, are you sure all this code is safe to remove? I thought that the
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Ship it!
- Brad
On 2012-01-07 08:08:52, Nilay Vaish wrote:
, don't change style
src/mem/ruby/system/MachineID.hh
http://reviews.gem5.org/r/1095/#comment2732
Don't add commented out source code lines.
- Brad Beckmann
On March 12, 2012, 10:32 a.m., Valentin Puente wrote
.
- Brad Beckmann
On March 19, 2012, 12:11 p.m., Valentin Puente wrote:
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with
options, I'm not sure if the benefits out-weight the cost. This is definitely
one of those changes that will cause a lot of tedious downstream work. Can we
just keep it the way it is?
- Brad Beckmann
On March 27, 2012, 4:38 p.m., Nilay Vaish wrote
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Ship It!
- Brad Beckmann
On March 24, 2012, 1:27 p.m
previous changeset. Since I already went through that effort, there is less of
a need to rollback changeset 8920. As long as we agree that we'll only push
common se/fs option settings in Options.py, then I don't think there is a need
to rollback the previous changeset.
- Brad Beckmann
src/mem/ruby/system/System.hh 570b44fe6e0430378a70155e9e265eeef9b031a2
src/mem/ruby/system/System.cc 570b44fe6e0430378a70155e9e265eeef9b031a2
Diff: http://reviews.gem5.org/r/1132/diff/
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Testing
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570b44fe6e0430378a70155e9e265eeef9b031a2
Diff: http://reviews.gem5.org/r/1127/diff/
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On April 4, 2012, 9:23 p.m., Brad Beckmann wrote:
Hi Andreas,
Sorry it took me a couple weeks to look this patch over. It is an impressive
amount of work. My biggest concern is it appears that this patch will break
all existing checkpoints, correct? Your comment states that a later
(updated)
---
Changeset 8930:1aab533823f3
---
request: added split Paddr function
Diffs (updated)
-
src/mem/request.hh 570b44fe6e0430378a70155e9e265eeef9b031a2
Diff: http://reviews.gem5.org/r/1128/diff/
Testing
---
Thanks,
Brad Beckmann
570b44fe6e0430378a70155e9e265eeef9b031a2
src/mem/ruby/system/Sequencer.py 570b44fe6e0430378a70155e9e265eeef9b031a2
Diff: http://reviews.gem5.org/r/1126/diff/
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it is supposed to model?
Brad Beckmann wrote:
Yeah, it is a little confusing, but inst and data ports are not
equivalent to the read and write ports. From the tester's perspective, it
only needs to know whether a port supports reads (checks) or writes
(actions). Meanwhile, the protocol
://reviews.gem5.org/r/1129/#review2463
---
On April 4, 2012, 10:07 p.m., Brad Beckmann wrote:
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Changeset 8931:ff280a178bdf
---
python: added __nonzero__ function to SimObject Bool params
Diffs
-
src/python/m5/params.py 570b44fe6e0430378a70155e9e265eeef9b031a2
Diff: http://reviews.gem5.org/r/1129/diff/
Testing
---
Thanks,
Brad Beckmann
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Ship it!
Ship It!
- Brad Beckmann
On April 4, 2012, 10:23 a.m
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(Updated April 5, 2012, 6:06
570b44fe6e0430378a70155e9e265eeef9b031a2
src/mem/ruby/system/Sequencer.py 570b44fe6e0430378a70155e9e265eeef9b031a2
Diff: http://reviews.gem5.org/r/1126/diff/
Testing
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changeset 1b2c17565ac8 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=1b2c17565ac8
description:
rubytest: seperated read and write ports.
This patch allows the ruby tester to support protocols where the
i-cache and d-cache
are managed by seperate
changeset f467d4db555a in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=f467d4db555a
description:
python: added __nonzero__ function to SimObject Bool params
diffstat:
src/python/m5/params.py | 5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diffs (15
changeset c955a451271e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c955a451271e
description:
MOESI_hammer: tbe allocation and dependent wakeup fixes
diffstat:
src/mem/protocol/MOESI_hammer-cache.sm | 31 ++-
changeset 225590437eb2 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=225590437eb2
description:
sim-ruby: checkpointing fixes and dependent eventq improvements
Fixes checkpointing with respect to lost events after swapping event
queues.
Also adds
changeset a48540069b8d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a48540069b8d
description:
regress: ruby random tester and hammer stats updates
diffstat:
tests/configs/rubytest-ruby.py
| 9 +-
changeset 4c84b2566d2f in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=4c84b2566d2f
description:
ruby: set SimpleTiming as the default cpu
diffstat:
configs/ruby/Ruby.py | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diffs (13 lines):
diff -r
changeset a47fd7c2d44e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a47fd7c2d44e
description:
rubytest: remove spurious printf
diffstat:
src/cpu/testers/rubytest/RubyTester.cc | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diffs (11 lines):
diff -r
an enum or not. It
didn't take long for that enum to be removed. :)
- Brad Beckmann
On April 7, 2012, 5:44 a.m., Andreas Hansson wrote:
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Ship it!
Ship It!
- Brad Beckmann
On May 20, 2012, 2:47 p.m., Marc
.org/r/1270/#comment3214
This line
src/mem/protocol/RubySlicc_Util.sm
http://reviews.gem5.org/r/1270/#comment3215
This lilne
src/mem/protocol/RubySlicc_Util.sm
http://reviews.gem5.org/r/1270/#comment3212
This line
- Brad Beckmann
On June 15, 2012, 12:52 a.m., Nilay Vaish wrote
/TopologyCreator.py PRE-CREATION
src/mem/ruby/network/topologies/Torus.py
d8e5ca139d7c24eeb665ac0aab41e180886278cb
src/python/m5/SimObject.py d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1285/diff/
Testing
---
Thanks,
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---
x86: logSize and lruSeq are now optional ckpt params
Diffs
-
src/arch/x86/pagetable.cc d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1292/diff/
Testing
---
Thanks,
Brad Beckmann
src/mem/ruby/system/SConscript d8e5ca139d7c24eeb665ac0aab41e180886278cb
src/mem/slicc/symbols/StateMachine.py
d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1291/diff/
Testing
---
Thanks,
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/symbols/Transition.py d8e5ca139d7c24eeb665ac0aab41e180886278cb
src/mem/slicc/symbols/__init__.py d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1290/diff/
Testing
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Valgrind Suppressions: update to support common STL optimizations
Diffs
-
util/valgrind-suppressions d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1289/diff/
Testing
---
Thanks,
Brad Beckmann
-CREATION
src/mem/ruby/system/RubyMemoryControl.cc PRE-CREATION
src/mem/ruby/system/System.hh d8e5ca139d7c24eeb665ac0aab41e180886278cb
src/mem/ruby/system/System.cc d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1288/diff/
Testing
---
Thanks,
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src/mem/slicc/symbols/StateMachine.py
d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1287/diff/
Testing
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Changeset 9085:6d96fc3cd89c
---
x86: logSize and lruSeq are now optional ckpt params
Diffs (updated)
-
src/arch/x86/pagetable.cc d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1292/diff/
Testing
---
Thanks,
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d8e5ca139d7c24eeb665ac0aab41e180886278cb
src/mem/slicc/symbols/Transition.py d8e5ca139d7c24eeb665ac0aab41e180886278cb
src/mem/slicc/symbols/__init__.py d8e5ca139d7c24eeb665ac0aab41e180886278cb
Diff: http://reviews.gem5.org/r/1290/diff/
Testing
---
Thanks,
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topic for a separate thread, but I
wanted to mention that thought before I forgot.
- Brad Beckmann
On July 5, 2012, 8:15 a.m., Nilay Vaish wrote:
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/SConscript 7dee77da691b5ec4217685b99c621c36dfbea4c6
src/mem/slicc/symbols/StateMachine.py
7dee77da691b5ec4217685b99c621c36dfbea4c6
Diff: http://reviews.gem5.org/r/1287/diff/
Testing
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On July 10, 2012, 4:21 p.m., Brad Beckmann wrote
changeset d39368c6f502 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=d39368c6f502
description:
cpu: added assertions to ensure the correct proxies are used
diffstat:
src/cpu/thread_state.cc | 24
src/cpu/thread_state.hh | 6 +++---
2
changeset 3caf131d7a95 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3caf131d7a95
description:
ruby: changes how Topologies are created
Instead of just passing a list of controllers to the makeTopology
function
in
changeset b576c490e7d1 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=b576c490e7d1
description:
ruby: banked cache array resource model
This patch models a cache as separate tag and data arrays. The patch
exposes
the banked array as another
changeset aa9b75db7ea0 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=aa9b75db7ea0
description:
imported patch jason/slicc-external-structure-fix
diffstat:
src/mem/slicc/ast/AssignStatementAST.py | 2 +-
src/mem/slicc/ast/FuncCallExprAST.py| 2 +-
2 files
changeset 66b2e1ce53da in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=66b2e1ce53da
description:
# User Brad Beckmann brad.beckm...@amd.com
ruby: fixed msgptr print call
diffstat:
src/mem/ruby/buffers/MessageBufferNode.cc | 2 +-
1 files changed, 1
changeset ad76a669e9d9 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=ad76a669e9d9
description:
ruby: remove the cpu assumptions for the random tester
diffstat:
configs/example/ruby_random_test.py| 5 +++--
src/cpu/testers/rubytest/CheckTable.cc | 1 +
2
changeset 6bce09259194 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=6bce09259194
description:
# User Brad Beckmann brad.beckm...@amd.com
ruby: fixed fatal print statement
diffstat:
src/mem/ruby/network/Topology.cc | 2 +-
1 files changed, 1 insertions
changeset f133ba654050 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=f133ba654050
description:
x86: logSize and lruSeq are now optional ckpt params
diffstat:
src/arch/x86/pagetable.cc | 16 ++--
1 files changed, 14 insertions(+), 2 deletions(-)
changeset 9a72589ce4fd in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=9a72589ce4fd
description:
regress: ruby stat additions and config changes
diffstat:
tests/configs/memtest-ruby.py
|1 +
to just drop the patch.
- Brad
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On July 2, 2012, 10:43 p.m., Brad Beckmann
changeset 8b0ce484dfdc in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8b0ce484dfdc
description:
ruby: improved DRAM reset comment
diffstat:
src/mem/ruby/system/System.cc | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diffs (13 lines):
diff -r
changeset 6a0ab7d94d4e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=6a0ab7d94d4e
description:
x86: added page size in bytes tlb entry function
diffstat:
src/arch/x86/pagetable.hh | 6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diffs (16 lines):
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Ship it!
- Brad Beckmann
On Aug. 22, 2012, 12:15 p.m., Jason Power
On Sept. 10, 2012, 7:58 p.m., Joel Hestness wrote:
configs/ruby/MOESI_hammer.py, line 152
http://reviews.gem5.org/r/1366/diff/1/?file=28978#file28978line152
All of this probe filter setup should be predicated on whether the
probe filter is actually enabled (options.pf_on = True).
?
- Brad Beckmann
On Aug. 14, 2012, 8:20 a.m., Jason Power wrote:
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(Updated Aug
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Ship It!
- Brad Beckmann
On Sept. 24, 2012, 6:11 p.m
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Ship it!
Ship It!
- Brad Beckmann
On Sept. 24, 2012, 6:05 p.m
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- Brad Beckmann
On Sept. 24, 2012, 5:53 p.m
this object anymore.
- Brad Beckmann
On Oct. 3, 2012, 9:04 p.m., Nilay Vaish wrote:
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What is going on here? Please add comments to these two functions.
- Brad Beckmann
On Oct. 3, 2012, 9:12 p.m., Nilay Vaish wrote:
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, otherwise I would have expected you to check for a Maybe_Stale
copy after going through all the message buffers.
- Brad Beckmann
On Oct. 8, 2012, 5:47 p.m., Nilay Vaish wrote:
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if this does at as. I'm just
curious to know if you thought about an easier way to make prefetching protocol
independent yet still accurate. BTW, have you ever wondered why the mandatory
queue is called mandatory? There use to be an optional queue included in
each protocol file. :)
- Brad Beckmann
into the implications of this?
- Brad Beckmann
On Oct. 24, 2012, 12:40 p.m., Nilay Vaish wrote:
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stats out of CacheProfiler without actually
removing the file?
- Brad Beckmann
On May 13, 2013, 9:20 a.m., Nilay Vaish wrote:
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changeset 6a043adb1e8d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=6a043adb1e8d
description:
ruby: removed the very old double trigger hack
Committed by: Nilay Vaish ni...@cs.wisc.edu
diffstat:
src/mem/slicc/ast/FuncCallExprAST.py | 31
On Sept. 20, 2013, 7:46 a.m., Andreas Hansson wrote:
I do not really see the point here. Could you be more clear around what
this integration would involve? In any case, I would vote not to include
the McPat source in gem5, and if it really needs to live in the source
tree, get the
provide ruby
generated statistics in a similar concise format. I strongly argue against
this patch begin checked in until we can fix the stats.txt format.
Sorry to be so negative on this patch, but I feel pretty strongly about this.
- Brad Beckmann
On Dec. 6, 2013, 11:11 p.m., Nilay Vaish
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- Brad Beckmann
On Jan. 6, 2014, 7:45 p.m., Yasuko
On Dec. 17, 2013, 9:06 p.m., Joel Hestness wrote:
ext/mcpat/cacti/Ucache.h, line 1
http://reviews.gem5.org/r/2117/diff/1/?file=38654#file38654line1
After perusing the mcpat/cacti/* file changes, it appears that most of
these changes are code formatting, so I'm not sure that they
documentation associated with these tests. Please add a short README to this
patch. Also add a twiki page to gem5.org on how the McPAT flow works.
Thanks!
- Brad Beckmann
On Dec. 16, 2013, 9:23 p.m., Yasuko Eckert wrote
the users that want to have it to clone/checkout in ext/mcpat.
Nathan Binkert wrote:
I agree. Shouldn't McPAT be maintained in its own repository? Shouldn't
it just use EXTRAS?
Brad Beckmann wrote:
Thanks Tony for posting this initial patch. I know it has been a few
weeks, but want
/#comment5294
Exceeds the 79 char limit.
- Brad Beckmann
On April 27, 2015, 7:22 p.m., Nilay Vaish wrote:
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with the random tester.
src/cpu/testers/rubytest/RubyTester.cc (line 96)
http://reviews.gem5.org/r/2749/#comment5293
This is pretty ugly hack. The tester is not meant to be created per cpu.
There is a single tester and check table that is used to coordinate the races.
- Brad Beckmann
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Ship it!
Ship It!
- Brad Beckmann
On Dec. 4, 2014, 6:06 p.m., Nilay
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Ship it!
Ship It!
- Brad Beckmann
On Dec. 4, 2014, 6:08 p.m., Nilay
-caches. In these protocols, understanding the number of CPUs is not
good enough. The tester will need to be more flexible handling ports.
- Brad Beckmann
On April 27, 2015, 7:23 p.m., Nilay Vaish wrote:
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On May 12, 2015, 3:52 p.m., Nilay Vaish wrote:
configs/ruby/MESI_Three_Level.py, line 106
http://reviews.gem5.org/r/2776/diff/1/?file=45127#file45127line106
Can you explain the rationale behind this change?
As I mentioned in response to Jason's review, this code is broken when
On May 12, 2015, 4:22 p.m., Joel Hestness wrote:
This change seems to go away from its apparent aim:
First, this patch seems to be aimed at correcting some common confusion:
The RubyCache latency parameter is strange, because the cache itself does
not enforce the latency. Instead,
On May 12, 2015, 3:24 p.m., Jason Power wrote:
configs/ruby/MESI_Three_Level.py, line 106
http://reviews.gem5.org/r/2776/diff/1/?file=45127#file45127line106
Should these changes be in a different patch since they are orthogonal
to the Ruby tester?
I would be OK to
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