Re: [PEDA] Keepouts on Planes
Ray Mitchell wrote: Hello, I would like my various planes to be back 50mil from the edges of the PCB. I placed a line on the keepout layer and set my clearance constraint to 50mils. While this does keep the autorouter from placing anything closer than 50mils from the edge, when I look at the Gerbers for the various planes it appears that they go right up to the edge and ignore the keepout. What is the correct procedure? The power planes are not "objects" to Protel, they are a lack of object. You need to draw either a track or a fill to cut these planes back from the edges. I use a wide track that partially extends past the routed edge of the board, so the board will be cut through that track, where there won't be any copper on the power planes. The keepout just prevents the autorouter from placing components, pads or vias in that region, which is fine, as far as it goes. Jon * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts on Planes
Ray Mitchell wrote: Hello, I would like my various planes to be back 50mil from the edges of the PCB. I placed a line on the keepout layer and set my clearance constraint to 50mils. While this does keep the autorouter from placing anything closer than 50mils from the edge, when I look at the Gerbers for the various planes it appears that they go right up to the edge and ignore the keepout. What is the correct procedure? Thanks, Ray Mitchell You have to place a track around the edges of your board, on the plane layers, otherwise the planes extend to the edge of the universe. :-) I would either place a 100 mil track centered on the board edge, or a 50 mil track 25 mils inside the edge. -- Peter Bennett TRIUMF 4004 Wesbrook Mall, Vancouver, BC, Canada GPS and NMEA info and programs: http://vancouver-webpages.com/peter/index.html * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts
At 06:33 AM 10/7/2003, [EMAIL PROTECTED] wrote: Hi, I wish to prevent a polygon from pouring in a certain area. I have used a fill as a keepout on that layer, but I then get DRC errors showing shorts where I have put the fill over tracks. Naturally, since there are tracks violating the keepout. I also get DRC clearance errors where the fill is under a component. Since I can't get a fill to cause a component clearance DRC error with a component, I suspect that these errors are coming from something else. Protel 99SE has three levels of component clearance. I was unaware of this until I looked just now Quick Check will show errors if there are top and bottom components in the same XY location. Multilayer will allow top and bottom components to share XY space, and Full check does not use the component outline but rather actual component primitives. But there is no option to use fills for keepout of component placement. Is there a neater way of doing this so it comes up DRC clean? What you apparently want is to have an area with tracks but you don't want a polygon to fill in that area. And you don't want errors on the DRC, which is a commendable goal. There are a number of ways to do this in P99SE, as is typical. Perhaps the simplest would be to place the fill, then pour the polygon, then delete the fill (or move it to a mechanical layer, maybe with explanatory text, i.e., "move fill to Top Layer before pouring Polygon") Another way would be to place a polygon instead of a fill, fill it and select it, explode it into primitives, and then globally edit your selected track to keepouts. You might also lock the track, so you'll get a warning if you try to move any of these keepout tracks. (To explode a polygon, use Tools/Convert/Explode Polygon to Free Primitives, then click on the polygon and confirm.) (When you place the polygon, select No Net as the net assignment, plus make sure that Remove Dead Copper is unchecked, or you will create one of the famous invisible polygons. Cross-hatch would be overkill for this; likewise the track size could be relatively large, since it will probably not be necessary to avoid the little breaks that you can get when the track size is too large. And too small a size will unnecessarily increase the size of your database. For efficiency, the Grid Size should be set to 0, which tells the pour routine to place track edge-to-edge -- this is normally the best setting anyway.) The second way is best because it will allow you to repour the larger polygon without creating a problem. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts
No, Protel 99SE does have layer specific keep out tracks. You can either
place a track on the keep out layer, in which case it will affect all
layers, or a keep out track on a specific layer, in which case it will only
affect copper on that layer.
Mike.
|-+>
| | "John A. Ross|
| | [Design]"|
| | <[EMAIL PROTECTED]> |
| ||
| | 07-Oct-2003 12:09|
| | PM |
| | Please respond to|
| | "Protel EDA |
| | Forum" |
| ||
|-+>
>--|
|
|
| To: "Protel EDA Forum" <[EMAIL PROTECTED]>
|
| cc:
|
| Subject: Re: [PEDA] Keepouts
|
>--|
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
> Sent: Tuesday, October 07, 2003 11:34 AM
> To: [EMAIL PROTECTED]
> Subject: [PEDA] Keepouts
>
> Hi,
> I wish to prevent a polygon from pouring in a certain area.
> I have used a fill as a keepout on that layer, but I then get
> DRC errors showing shorts where I have put the fill over
> tracks. I also get DRC clearance errors where the fill is
> under a component. Is there a neater way of doing this so it
> comes up DRC clean?
Dave
As far as I know P99SE does not support layer specific keep outs like
DXP does.
If you place a keep out it will generate errors for any primitive
violating it.
Generally it is better to draw the polygon vertices around the area
using the polygon vertices as your keepout definition (if you see what I
mean) and have a suitable tie point somewhere using a fill or similar.
Unless someone has a more elegant solution
Best Regards
John A. Ross
RSD Communications ltd
Email [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==
>
> Regards
>
> Dave
>
>
>
>
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this list visit:
* http://www.techservinc.com/protelusers/leave.html
*
* Contact the list manager:
* mailto:[EMAIL PROTECTED]
*
* Forum Guidelines Rules:
* http://www.techservinc.com/protelusers/forumrules.html
*
* Browse or Search previous postings:
* http://www.mail-archive.com/[EMAIL PROTECTED]
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts
> -Original Message- > From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] > Sent: Tuesday, October 07, 2003 11:34 AM > To: [EMAIL PROTECTED] > Subject: [PEDA] Keepouts > > Hi, > I wish to prevent a polygon from pouring in a certain area. > I have used a fill as a keepout on that layer, but I then get > DRC errors showing shorts where I have put the fill over > tracks. I also get DRC clearance errors where the fill is > under a component. Is there a neater way of doing this so it > comes up DRC clean? Dave As far as I know P99SE does not support layer specific keep outs like DXP does. If you place a keep out it will generate errors for any primitive violating it. Generally it is better to draw the polygon vertices around the area using the polygon vertices as your keepout definition (if you see what I mean) and have a suitable tie point somewhere using a fill or similar. Unless someone has a more elegant solution Best Regards John A. Ross RSD Communications ltd Email [EMAIL PROTECTED] WWWhttp://www.rsd.tv == > > Regards > > Dave > > > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts
If you use a keep out track perimetering the area you want clear, you will get the same effect, providing there are no points the polygon can net onto within that area. Mike. |-+> | | [EMAIL PROTECTED]| | | ink.com | | || | | 07-Oct-2003 11:33| | | AM | | | Please respond to| | | "Protel EDA | | | Forum" | | || |-+> >--| | | | To: [EMAIL PROTECTED] | | cc: | | Subject: [PEDA] Keepouts | >--| Hi, I wish to prevent a polygon from pouring in a certain area. I have used a fill as a keepout on that layer, but I then get DRC errors showing shorts where I have put the fill over tracks. I also get DRC clearance errors where the fill is under a component. Is there a neater way of doing this so it comes up DRC clean? Regards Dave * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts
James, what exactly do you mean by "filled keepouts"? This sounds like a fill to me, is that what you intended? You seem to be talking about tracks though, so I am a little confused by your query. If you are trying to put down fills at angles, just hit tab after starting the fill, enter the angle you want in the properties dialogue and then continue placing your fill on the specified angle. While you are in the properties windows I guess you could also check the Keepout checkbox and then you don't have to change the fill to a keepout after placing it. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com See us at Booth 323 at Satellite 2002 in Washington, DC March 6-8. -Original Message- From: Sean James [mailto:[EMAIL PROTECTED]] Sent: Tuesday, February 05, 2002 4:37 AM To: Protel EDA Forum Subject: [PEDA] Keepouts I had the ability for a while to put filled keepouts down at 45 degrees. Now I can't seem to get this function back. I tried using the 'shift- spacebar' combo that's used to change track style, but that doesn't work. Sean James PCB Designer Telecast Fiber Systems, Inc. 102 Grove Street Worcester, MA 01605 (TEL) 508.754.4858 x33 (FAX) 413.541.6170 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts and nets
At 12:28 PM 12/16/01 +1300, Brendon Slade wrote: >Layer specific keepouts have been a recent topic but I wonder if anyone has >discovered that you can assign a net to a layer specific keepout? It's not surprising, since keepouts are just regular primitives with the keepout attribute, but I had not thought of the implications. In another thread there has been a question about how to eliminate a DRC error with keepout violating against pads placed on or near the board outline or other keepout. It would appear that assigning a net to the pads and to the keepout would resolve this. Running actual track (not keepout) at the board edge, where it will overplot the outline (I always plot an outline; the fabricator will remove it, will cause connectivity for these pads; but the net assignments will be eliminated on synchronization. Perhaps using vias for those pads would be better. I don't have time to test it at the moment or to work out all the implications. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts and nets
On 12:28 PM 16/12/2001 +1300, Brendon Slade said: >Layer specific keepouts have been a recent topic but I wonder if anyone has >discovered that you can assign a net to a layer specific keepout? > >I have this board that is mounted to 10mm bosses on an aluminium chassis, >and the screw head is smaller (~6mm) allowing different clearances on top >and bottom. Obviously I don't want to run tracks on the bottom side of the >board where the mounts are, so I placed a bottom keepout circle/arc. I do >however wish to pour a GND polygon which includes these mounting holes. I >simply assigned the net GND to the keepout circle and it's so simple it >works! All other bottom tracks cause a (wanted) DRC error, and the GND >polygon pours right over the keepout arc as if it wasn't there. I tried all >other permutations with nets/polygons etc and it all works as expected. > >I hope this is of use to someone else. > >Cheers, >Brendon. I like it! Nice work in working this one out Brendon - I certainly did not know it. Ian Wilson * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
At 02:25 PM 12/13/01 -0800, Brad Velander wrote: >But abd ul-Rahman, > do you want to edit approx. 200+ lines and curves making up the >board outline to adjust them to some other offset for use as the keepout? I >didn't think so. I also have to do this for 4 variations in board outlines >where approx. 20 - 25% of the board outline is different. > I would generate this in ACAD but then I have to get them imported >back to Protel correctly (that's a significant battle in itself), confirm it >is all there and correct. Then I have to individually change each element of >that outline to keepout because you can't globally change keepout status. So >no, I am not thinking inside the box! You have presented Protel with a complex problem added to a complex outline. The solution is going to be complex, there is no way around it. You can make it easier by making a footprint for the outline-intersecting holes which includes the offset keepout at clearance. Then, where this keepout intersects the original keepout, you break the original track and delete the original segments. This is if you want a patent keepout. Or you can simply move the entire keepout in one fell swoop to a mech layer and manually inspect the outline. The keepout does not need to be as complex as the outline if you don't mind losing a small amount of routing space. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
Is it possible the two track segments didn't start/end at exactly the same coordinates? I've seen odd handling of tracks in other situations when the two ends overlapped but were not *exactly* co-located. -Original Message- From: Brad Velander [mailto:[EMAIL PROTECTED]] Sent: Thursday, December 13, 2001 9:38 AM ... And how would one account for the keepout violating to it's adjacent line or arc? * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
But abd ul-Rahman, do you want to edit approx. 200+ lines and curves making up the board outline to adjust them to some other offset for use as the keepout? I didn't think so. I also have to do this for 4 variations in board outlines where approx. 20 - 25% of the board outline is different. I would generate this in ACAD but then I have to get them imported back to Protel correctly (that's a significant battle in itself), confirm it is all there and correct. Then I have to individually change each element of that outline to keepout because you can't globally change keepout status. So no, I am not thinking inside the box! Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. #300 - 4401 Still Creek Drive, Burnaby, B.C., Canada, V5C 6G9. Tel (604) 292-9089 (direct line) Fax (604) 292-9010 Website: www.norsat.com -Original Message- From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]] Sent: Thursday, December 13, 2001 1:02 PM To: Protel EDA Forum Subject: Re: [PEDA] Keepouts & DRC There you go again, Brad, thinking in the box. Yes, the holes overlap the actual board outline. But there is no rule that says that the board outline is identical to any keepout track. You want to keep track out of the holes, I'd think. In fact, you'd want a clearance between the holes and any track. So the keepout is somewhere in between the holes and the closest position for the track >As for Dennis' comment, > my comments were about the lack of DRC rule control, or even DRC >rules working at all. It has been suggested that an equivalent to No-ERC be created for PCB. This would be a device for suppressing one very specific error message. Move the primitives involved, the No-DRC suppression goes away. That's a rough idea, anyway. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
At 09:38 AM 12/13/01 -0800, Brad Velander wrote: >Dwight, > the holes must overlap the outline otherwise the holes do not result >in any additional opening to allow the square corners into the inner >radiused corners of the board outline. This is a square peg trying to fit >into a round (radiused) hole issue. There you go again, Brad, thinking in the box. Yes, the holes overlap the actual board outline. But there is no rule that says that the board outline is identical to any keepout track. You want to keep track out of the holes, I'd think. In fact, you'd want a clearance between the holes and any track. So the keepout is somewhere in between the holes and the closest position for the track >As for Dennis' comment, > my comments were about the lack of DRC rule control, or even DRC >rules working at all. It has been suggested that an equivalent to No-ERC be created for PCB. This would be a device for suppressing one very specific error message. Move the primitives involved, the No-DRC suppression goes away. That's a rough idea, anyway. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
Dwight, the holes must overlap the outline otherwise the holes do not result in any additional opening to allow the square corners into the inner radiused corners of the board outline. This is a square peg trying to fit into a round (radiused) hole issue. As for Dennis' comment, my comments were about the lack of DRC rule control, or even DRC rules working at all. I have many ways to accomplish my task. The issue was more that rules regarding keepouts are flaky and unreliable. For these holes I could ignore the DRC violations but there are many more DRC violations then these alone and I cannot get the rules to work reliably, especially regarding the keepouts. For example I have a few items which must closely (1 - 2 mils) approach the board outline, I cannot define rules for these items which come too near to the bottom layer keepout either. No matter how specifically I can define the offence down to the precise occurrence (pad specifications, nets, layers, object kinds, and all of the aforementioned combined). And how would one account for the keepout violating to it's adjacent line or arc? Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. #300 - 4401 Still Creek Drive, Burnaby, B.C., Canada, V5C 6G9. Tel (604) 292-9089 (direct line) Fax (604) 292-9010 Website: www.norsat.com -Original Message- From: Dwight Harm [mailto:[EMAIL PROTECTED]] Sent: Wednesday, December 12, 2001 4:16 PM To: Protel EDA Forum Subject: Re: [PEDA] Keepouts & DRC Some suggestions that may or may not be appropriate/helpful -- -- if the keepout is just to control polygons, maybe it'd help other problems to make it VERY thin, say .001 mil? -- somewhat similarly, if holes just need to "touch" the keepout (not actually overlap), then you might be able to move them back .001 mil, to avoid DRC errors without having to use a design rule. Dwight. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
To add to Brad's note- I use keepouts to prevent polygon planes from pouring in certain areas of my board. I don't want poylgons under smt resistors, etc. I want to be able to control where the polys go. the only way is with keepouts on specific layers, and in certain areas. It's a nuisance to remove the keepouts just to run a DRC. If you set a rule clearance to "0" for keepouts, and then pour a poly, you get some very strange results. PCAD had a nice way to create keepouts (that's not their exact name); the main fact is that the keepouts didn't violate any DRC's! Does anybody remember the exact name and use of keepouts in ACCEL/PCAD? Sean James PCB Designer Telecast Fiber Systems, Inc. 102 Grove Street Worcester, MA 01605 (TEL) 508.754.4858 x33 (FAX) 413.541.6170 - Original Message - From: "Brad Velander" <[EMAIL PROTECTED]> To: "'Protel EDA Forum'" <[EMAIL PROTECTED]> Sent: Wednesday, December 12, 2001 5:36 PM Subject: Re: [PEDA] Keepouts & DRC > Rene & others, > it is timely that Sean raised this issue because I have been > fighting with related issues. In my case I have a very complex board outline > where I have copied the board outline to the bottom layer and made it a > keepout and control my polygon outlines with respect to the board edge. > There are associated issues but I get lots of violations that I am trying to > eliminate with rules, seems to only work part of the time. I also believe > that I have found a bug relating to polygons while trying to accomplish > this, I will write about it in a day or two when the crunch is off. > In my case I have a number of drill holes at points along the board > outline. These drills are to relieve the board outline edge where the > overlying matrix has sharp corners that a router cannot achieve. Thus each > of these drill holes have no net, no plating, no pad (0mils). Each and > everyone of them causes a violation with the keepout. > > The funniest thing is working over several variations of the PCB > design, some rules work in one copy of the board and while making the > variations to the next version the same existing rule will quit working all > of a sudden. I have also had the keepout lines showing violations along the > entire board outline because they are touching the keepout adjacent to them. > The listed violation lists the one keepout track segment and it's adjacent > connected track as the other violator in the pair. Go figure. > > There are also other cases where a violation is not avoidable, so I > am trying to devise rules which will eliminate those violations. Sometimes > the rules work, sometimes they do not. At the moment I have databases which > have over 300 violations which seem to be indefinable in the DRC rules > set-up, most all are related to the keepout. I have even tried a rule which > states the keepout spacing to anything else (Board) is 0mils, no luck. > > Sincerely, > Brad Velander. > > Lead PCB Designer > Norsat International Inc. > #300 - 4401 Still Creek Drive, > Burnaby, B.C., Canada, V5C 6G9. > Tel (604) 292-9089 (direct line) > Fax (604) 292-9010 > Website: www.norsat.com > > > -Original Message- > From: Rene Tschaggelar [mailto:[EMAIL PROTECTED]] > Sent: Wednesday, December 12, 2001 8:06 AM > To: Protel EDA Forum > Subject: Re: [PEDA] Keepouts & DRC > > > You can draw a track manually over a keepout line. > The DRC signals a violation and you ignore it. > Is that what you want ? > > Rene > -- > Ing.Buero R.Tschaggelar - http://www.ibrtses.com > > Sean James wrote: > > > > Is there any way to ignore or bypass keepouts during a DRC? > > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
why not just make a bd with just those holes and give them a second drill file? Dennis Saputelli Brad Velander wrote: > > Rene & others, > it is timely that Sean raised this issue because I have been > fighting with related issues. In my case I have a very complex board outline > where I have copied the board outline to the bottom layer and made it a > keepout and control my polygon outlines with respect to the board edge. > There are associated issues but I get lots of violations that I am trying to > eliminate with rules, seems to only work part of the time. I also believe > that I have found a bug relating to polygons while trying to accomplish > this, I will write about it in a day or two when the crunch is off. > In my case I have a number of drill holes at points along the board > outline. These drills are to relieve the board outline edge where the > overlying matrix has sharp corners that a router cannot achieve. Thus each > of these drill holes have no net, no plating, no pad (0mils). Each and > everyone of them causes a violation with the keepout. > > The funniest thing is working over several variations of the PCB > design, some rules work in one copy of the board and while making the > variations to the next version the same existing rule will quit working all > of a sudden. I have also had the keepout lines showing violations along the > entire board outline because they are touching the keepout adjacent to them. > The listed violation lists the one keepout track segment and it's adjacent > connected track as the other violator in the pair. Go figure. > > There are also other cases where a violation is not avoidable, so I > am trying to devise rules which will eliminate those violations. Sometimes > the rules work, sometimes they do not. At the moment I have databases which > have over 300 violations which seem to be indefinable in the DRC rules > set-up, most all are related to the keepout. I have even tried a rule which > states the keepout spacing to anything else (Board) is 0mils, no luck. > > Sincerely, > Brad Velander. > > Lead PCB Designer > Norsat International Inc. > #300 - 4401 Still Creek Drive, > Burnaby, B.C., Canada, V5C 6G9. > Tel (604) 292-9089 (direct line) > Fax (604) 292-9010 > Website: www.norsat.com > > -Original Message----- > From: Rene Tschaggelar [mailto:[EMAIL PROTECTED]] > Sent: Wednesday, December 12, 2001 8:06 AM > To: Protel EDA Forum > Subject: Re: [PEDA] Keepouts & DRC > > You can draw a track manually over a keepout line. > The DRC signals a violation and you ignore it. > Is that what you want ? > > Rene > -- > Ing.Buero R.Tschaggelar - http://www.ibrtses.com > > Sean James wrote: > > > > Is there any way to ignore or bypass keepouts during a DRC? > > -- ___ www.integratedcontrolsinc.comIntegrated Controls, Inc. tel: 415-647-04802851 21st Street fax: 415-647-3003San Francisco, CA 94110 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
At 07:27 AM 12/12/01 -0500, Sean James wrote: >Is there any way to ignore or bypass keepouts during a DRC? A keepout which is ignored is not a keepout; I concur that it is dangerous to set up DRC to ignore them, assuming that you can, I haven't tried. A case in which one might be tempted to do this is with board outline all-layer keepout that violates to some essential primitive, like an edge connector pad or mounting pad. It is better to arrange the keepout such that no violation takes place. A keepout may be pulled out from the board edge or broken in some cases to suppress errors specifically where desired without generically disabling keepouts. Because one would do this where there is another interfering primitive, it can be done such that it will not create a routing path outside the board. Sometimes this could create autorouter problems, I certainly haven't tested all possibilities. Perhaps another writer has more comments. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
Some suggestions that may or may not be appropriate/helpful -- -- if the keepout is just to control polygons, maybe it'd help other problems to make it VERY thin, say .001 mil? -- somewhat similarly, if holes just need to "touch" the keepout (not actually overlap), then you might be able to move them back .001 mil, to avoid DRC errors without having to use a design rule. Dwight. -Original Message- From: Brad Velander [mailto:[EMAIL PROTECTED]] Sent: Wednesday, December 12, 2001 2:36 PM Rene & others, it is timely that Sean raised this issue because I have been fighting with related issues. In my case I have a very complex board outline where I have copied the board outline to the bottom layer and made it a keepout and control my polygon outlines with respect to the board edge. There are associated issues but I get lots of violations that I am trying to eliminate with rules, seems to only work part of the time. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
Rene & others, it is timely that Sean raised this issue because I have been fighting with related issues. In my case I have a very complex board outline where I have copied the board outline to the bottom layer and made it a keepout and control my polygon outlines with respect to the board edge. There are associated issues but I get lots of violations that I am trying to eliminate with rules, seems to only work part of the time. I also believe that I have found a bug relating to polygons while trying to accomplish this, I will write about it in a day or two when the crunch is off. In my case I have a number of drill holes at points along the board outline. These drills are to relieve the board outline edge where the overlying matrix has sharp corners that a router cannot achieve. Thus each of these drill holes have no net, no plating, no pad (0mils). Each and everyone of them causes a violation with the keepout. The funniest thing is working over several variations of the PCB design, some rules work in one copy of the board and while making the variations to the next version the same existing rule will quit working all of a sudden. I have also had the keepout lines showing violations along the entire board outline because they are touching the keepout adjacent to them. The listed violation lists the one keepout track segment and it's adjacent connected track as the other violator in the pair. Go figure. There are also other cases where a violation is not avoidable, so I am trying to devise rules which will eliminate those violations. Sometimes the rules work, sometimes they do not. At the moment I have databases which have over 300 violations which seem to be indefinable in the DRC rules set-up, most all are related to the keepout. I have even tried a rule which states the keepout spacing to anything else (Board) is 0mils, no luck. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. #300 - 4401 Still Creek Drive, Burnaby, B.C., Canada, V5C 6G9. Tel (604) 292-9089 (direct line) Fax (604) 292-9010 Website: www.norsat.com -Original Message- From: Rene Tschaggelar [mailto:[EMAIL PROTECTED]] Sent: Wednesday, December 12, 2001 8:06 AM To: Protel EDA Forum Subject: Re: [PEDA] Keepouts & DRC You can draw a track manually over a keepout line. The DRC signals a violation and you ignore it. Is that what you want ? Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com Sean James wrote: > > Is there any way to ignore or bypass keepouts during a DRC? > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Keepouts & DRC
You can draw a track manually over a keepout line. The DRC signals a violation and you ignore it. Is that what you want ? Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com Sean James wrote: > > Is there any way to ignore or bypass keepouts during a DRC? > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
