[PATCH v2 34/37] clk: rockchip: rk3506: Return correct rate for CLK_I2C0 and CLK_I2C1

[Jonas Karlman]

The getter for CLK_I2C0 and CLK_I2C1 both fall through and instead
return the rate for CLK_I2C2.

Add the missing breaks so correct rate is returned for affected clocks.

Fixes: fbf72dce915a ("clk: rockchip: Add support for RK3506")
Signed-off-by: Jonas Karlman <jo...@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.sch...@cherry.de>
---
Changes in v2:
- Update commit subject and message
- Add fixes tag
- Collect r-b tag
---
 drivers/clk/rockchip/clk_rk3506.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3506.c 
b/drivers/clk/rockchip/clk_rk3506.c
index 38066c5c3e3c..457082eea87b 100644
--- a/drivers/clk/rockchip/clk_rk3506.c
+++ b/drivers/clk/rockchip/clk_rk3506.c
@@ -537,10 +537,12 @@ static ulong rk3506_i2c_get_rate(struct rk3506_clk_priv 
*priv, ulong clk_id)
                con = readl(RK3506_CLKSEL_CON(32));
                sel = FIELD_GET(CLK_I2C0_SEL_MASK, con);
                div = FIELD_GET(CLK_I2C0_DIV_MASK, con);
+               break;
        case CLK_I2C1:
                con = readl(RK3506_CLKSEL_CON(32));
                sel = FIELD_GET(CLK_I2C1_SEL_MASK, con);
                div = FIELD_GET(CLK_I2C1_DIV_MASK, con);
+               break;
        case CLK_I2C2:
                con = readl(RK3506_CLKSEL_CON(33));
                sel = FIELD_GET(CLK_I2C2_SEL_MASK, con);
-- 
2.55.0