Thanks Ian for the information. I was concerned about the grid also.
I'll add the testpoint component to the schematics which will give me
more flexibility. Thanks again.
Tom
Ian Wilson wrote:
On 08:06 AM 3/06/2004, Tom Reineking said:
.. 4 hours later ...
Just got my post back and I did find
On 08:06 AM 3/06/2004, Tom Reineking said:
.. 4 hours later ...
Just got my post back and I did find an answer to the report part
concerning nets without testpoints. The design rule Testpoint Usage does
generate violations for those nets and therefore a report can be
generated. There is also a
.. 4 hours later ...
Just got my post back and I did find an answer to the report part
concerning nets without testpoints. The design rule Testpoint Usage
does generate violations for those nets and therefore a report can be
generated. There is also a document on the Protel web site in the
le
I have a fairly complex BGA design that requires via tenting, at least
on the component side. The PCB assembly will not go through wave
solder, so no problem with the solder side. There are two problems I
have run into. The first is tenting on one side. I checked the KB and
only DXP and up
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-mail: [EMAIL PROTECTED]
Web Site: www.stacoenergy.com
& www.stacopower.com
> -Original Message-
> From: JaMi Smith [mailto:[EMAIL PROTECTED]
> Sent: Tuesday, January 13, 2004 6:24 PM
> To: Protel EDA Forum
> Cc: JaMi Smith
> Subject: [PEDA] Test - Is the PEDA Forum opera
Traffic seems down
- Original Message -
From: "JaMi Smith" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Cc: "JaMi Smith" <[EMAIL PROTECTED]>
Sent: Tuesday, January 13, 2004 6:24 PM
Subject: [PEDA] Test - Is the PEDA Foru
I have not received any posts for several days now, and I am wondering if Forum
Traffic is just down, of if we have hit another operational snag . . .
JaMi
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Are we back yet?
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TEST
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Yip got some messages now but only to this email address (hotmail) ,
including this post but not to my main one ([EMAIL PROTECTED]),
got echo from [EMAIL PROTECTED] so server is reachable within few
seconds.
get forum mails for PowerPCB and DXP no problem (also lyris) .
now cannot receive post
Sorry for the useless post, but i think my mail list account has got screwed
up somehow as I have not been able to post to this list for the past few
days, with no errors back from techserv servers.
But I can still receive posts to the list.
Very strange
So we will see if this email gets thro
Test
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Please ignore. This is a test.
Tim Fifield
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* Forum
I haven't received any PEDA mail in several days, and the DXP has slowed to
a trickle. So please ignore this minor annoyance (I may not even get it!).
thanks,
Richard
Cheesecote Mountain CAMAC, 24 Halley Drive; Pomona, NY 10970
voice: 845 364 0211, fax: 845 362 6947, www.cmcamac.com
*
Test.
Brian Guralnick
* Tracking #: B8F4EC5316A67845A1A82BAF04AAAE7345F047C9
*
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At 05:08 PM 4/12/2002 -0400, Watnoski, Michael wrote:
> As long as they are a unique size, they can all be changed
>afterwards with a global selection.
I don't know, offhand, the answer to the original question, but I'd think
this answer would be less than fully satisfactory, because it
I am setting up a new design that is going to require me to use test
points on the board. I would like to use .9mm (.035") for the test point
size. I am trying to find a way to set up the design rules to automatically
place a square test pad instead. I am running 99SE SPK6, I looked in the
t;
Sent: Tuesday, March 12, 2002 9:23 AM
Subject: [PEDA] Test point Pad Size
> Can anybody tell me what the recommended test point pad size to be used
with
> the GenRAD GR228xi in circuit tester is? I think were using a combo II
> board.
>
> Our manufacturing dept. wants me to use a
Can anybody tell me what the recommended test point pad size to be used with
the GenRAD GR228xi in circuit tester is? I think were using a combo II
board.
Our manufacturing dept. wants me to use a 100 thou diameter pad which seems
quite excessive to me. I currently have a 35 thou pad.
Tim Fifiel
Brian Guralnick wrote:
>
> Forget it, everything is now OK.
>
> Thanks to the Admin.
>
>
> Brian Guralnick
> please not the change in email address:
> [EMAIL PROTECTED]
I believe there is a speeling erorr in your .sig.
--
Peter Bennett
TRIUMF
4004 Wesbrook Mall, Vancouver, BC,
ent: Monday, March 11, 2002 3:29 PM
Subject: [PEDA] TEST - newly registered account does not receive it's own posts.
| Hi,
|
| I just re-joined this forum under a new e-mail address. I don't seem to be
| receiving back my posts like my old e-mail address does. If I remember corre
Hi,
I just re-joined this forum under a new e-mail address. I don't seem to be
receiving back my posts like my old e-mail address does. If I remember correctly,
there was a setting, or code which need to be sent to techservinc to enable the
feature. Does anyone know what it is?
_
This is a test. Please ignore
Tim
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Warning
Unable to process data:
multipart/mixed;boundary="93DEA4E195DFA52851568B3F"
This is a test, as I have not received mail from the group in two days.
Tim Fifield
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[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA
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You should consider another newsreader.
Strange ones such as OE may hide your own posts.
Rene
Brian Guralnick wrote:
> Test #2,
> Is this message getting through?
> My last 3 posts are missing.
>
>
> Brian Guralnick
>
* * * * * * * * * * * * * * * * * * * * * * * * * * * *
Test #2,
Is this message getting through?
My last 3 posts are missing.
Brian Guralnick
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Just checking. Some of my messages didn't seem to get through today.
Brian Guralnick
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At 10:50 AM 10/23/01 -0700, Tony Karavidas wrote:
>I'm curious why it take 15 or more hours sometimes to get an email
>distributed on this list? I sent emails yesterday evening that are just
>showing up today. (and one of them still hasn't made it yet)
My posts usually show up in a few minutes, s
I'm curious why it take 15 or more hours sometimes to get an email
distributed on this list? I sent emails yesterday evening that are just
showing up today. (and one of them still hasn't made it yet)
Tony
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***
Todays forums are sponsored by Ian Martin Limited
Engineering/Technical Placement Specialists
www.ianmartin.com
***
Brad,
There is a 3rd party addon for placing In Circuit Test points, spe
Hello,
I have a design that is completed, all routed, and the engineer has
decided he wants test points on every net on the bottom side. Is there
an easy way of doing this besides by hand from net to net?
Thanks,
Brad Marshall
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* To post
On 02:30 PM 6/09/2001 -0400, Brian Guralnick said:
>My posts no longer echo back to me, is anyone receiving this?
>
>
>Brian Guralnick
I seem to recall that this has happened before. I have a theory on what
has happened but I don't think I will go into it.
There is an option to tur
On 02:22 PM 6/09/2001 -0700, Jim McGrath said:
>Hi All,
>
>At the risk of being cut from this very Important list I recieved this
>messege from the forum Administrator (a warning to you all):
You won't get cut from the list as if you did you would email a regular
user direct and they would let e
At 02:22 PM 9/6/01 -0700, Jim McGrath wrote:
>At the risk of being cut from this very Important list I recieved this
>messege from the forum Administrator (a warning to you all):
etc.
Readers are reminded that we have alternate lists for the discussion of
matters not precisely within Techserv'
At 01:48 PM 9/6/01 -0400, [EMAIL PROTECTED] wrote:
>Well, this one got out to me. But I just got one of the bounce messages that
>I've seen from several users today. It seems TechServ has a problem at their
>end. Sure would hate to get unsubscribed - this list has been a lifeline at
>times.
Since
My posts no longer echo back to me, is anyone receiving this?
Brian Guralnick
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Hi All,
At the risk of being cut from this very Important list I recieved this
messege from the forum Administrator (a warning to you all):
Subject:
Off Topic Discussions
Date:
Thu, 06 Sep 2001 10:01:02 -0700
From:
"Forum Administrator" <[EMAIL PROTECTED]>
To:
o:[EMAIL PROTECTED]]
Sent: Thursday, September 06, 2001 12:49 PM
To: Protel EDA Forum
Subject: Re: [PEDA] test
In a message dated 9/6/01 1:42:25 PM Eastern Daylight Time,
[EMAIL PROTECTED] writes:
> could someone let me know if my messages are getting out?
>
Well, this one got out to me. But I j
I read you 10 by 10.
-Original Message-
From: Ted Tontis [mailto:[EMAIL PROTECTED]]
Sent: Thursday, September 06, 2001 12:33 PM
To: Protel Forum (E-mail)
Subject: [PEDA] test
could someone let me know if my messages are getting out?
Thank you,
Ted Tontis C.I.D.
Engage Networks
316 N
Yes
Steve Smith
> -Original Message-
> From: Ted Tontis [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, September 06, 2001 1:33 PM
> To: Protel Forum (E-mail)
> Subject: [PEDA] test
>
>
> could someone let me know if my messages are getting out?
>
> Th
Yes they are.
-Original Message-
From: Ted Tontis [mailto:[EMAIL PROTECTED]]
Sent: Thursday, September 06, 2001 12:33 PM
To: Protel Forum (E-mail)
Subject: [PEDA] test
could someone let me know if my messages are getting out?
Thank you,
Ted Tontis C.I.D.
Engage Networks
316
could someone let me know if my messages are getting out?
Thank you,
Ted Tontis C.I.D.
Engage Networks
316 N. Milwaukee Street
Suite 214
Milwaukee WI, 53202
PH 414-273-7600 ext. 7607
FX 414-273-7601
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> Joel,
> Clicking Testpoint just marks it as a testpoint for output, but does not
> even
> automatically untent the via. So it would allow you to have soldermask on
a
> test point.
> Hum, they might complain about that in the test department.
>Seems the only solution/work around is create
control for each side of the board, since you only need access
from one side, not both.
Carl
-Original Message-
From: Joel Hammer [mailto:[EMAIL PROTECTED]]
Sent: Friday, July 27, 2001 10:27 AM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] Test point tenting on side opposite TP
c
ialist
E2 Enterprises Inc.
636.949.9101 Ext. 26
www.e2enterprises.com
> -Original Message-
> From: Schattke, Carl [mailto:[EMAIL PROTECTED]]
> Sent: Friday, July 27, 2001 11:36 AM
> To: Protel EDA Forum
> Subject: [PEDA] Test point tenting on side opposite TP
>
>
> Hello,
On 03:39 PM 27/07/2001 -0700, Abd ul-Rahman Lomax said:
>Then make a solder mask expansion design rule to tent the pad for each
>class as desired. Top and bottom masks can be subject to different design
>rules by adding layer scope as the second term in the rule selection criteria.
Restricting
At 12:29 PM 7/27/01 -0700, Schattke, Carl wrote:
>I have test points on both sides due to the high density of the product.
> I am using vias for test points in some locations, so if I give them a
>negative expansion
>then I will be covering my testpoints with mask.
> Making parts for each tes
arl
>
>
>-Original Message-
>From: Reed Woltering [mailto:[EMAIL PROTECTED]]
>Sent: Friday, July 27, 2001 11:34 AM
>To: Protel EDA Forum
>Subject: Re: [PEDA] Test point tenting on side opposite TP
>
>
>The way I do this is to simply plot the soldermask for the
o the soldermask pads on the top
and bottom.
Carl
-Original Message-
From: Reed Woltering [mailto:[EMAIL PROTECTED]]
Sent: Friday, July 27, 2001 11:34 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Test point tenting on side opposite TP
The way I do this is to simply plot the soldermask for the side
The way I do this is to simply plot the soldermask for the side with the
testpoints
normally, and then select the testpoints, and edit the soldermask expansion
for
them to be negative, (ex: 30 mil TP gets -15mil expansion) and plot the
opposite
side to bury them in the mask.
Reed Woltering
Cad
lt;[EMAIL PROTECTED]>
Sent: Friday, July 27, 2001 12:35 PM
Subject: [PEDA] Test point tenting on side opposite TP
> Hello,
>Has anyone figured out a work around so test points will only be
exposed
> on
> the tested side and tented on the untested side (like under fine pitch SMT
>
Hello,
Has anyone figured out a work around so test points will only be exposed
on
the tested side and tented on the untested side (like under fine pitch SMT
components)?
Editing the Gerber's is the only way I know to do this now. :(
I would prefer something that be reproducible after revi
Same here Ian, I want my bouce back.
Jim
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