Greetngs,
I have one full copy of Protel '98 which I must sell, asap.
If you are interested, please write direct.
[EMAIL PROTECTED]
Thanks Graeme Zimmer
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this
Hello,
Well it looks like I'm in serious trouble now. Except for
just a couple more mounting holes and some minor silkscreening
on the bottom layer, I have finished this board.
I posted earlier about an error with File too big. As
suggested, deleting a couple of the huge mechanical layers
Michael,
sounds like either you still don't have the compress on close turned
on, or possibly at a database size that big the compress function starts to
fail. I might suggest that you try running the repair facility on a copy of
the DDB see what that does.
How big is the DDB
In an effort to fix this problem, I have deleted all but
two of the mechanical layers, and I still have the error.
I don't understand this. I've been regularly saving all,
and the incremental amount I added since the last save
all is microscopic compared to the reduction of file size
by
08/10/2002 15:22:07, Robison Michael R CNIN
[EMAIL PROTECTED] wrote:
Any suggestions would be appreciated. I'm getting a bit
nervous.
From what you posted earlier, it sounded like it was having troubles writing the
backups, rather than the project itself. If you've got more than one drive
Michael,
Have you emptied the Trash within the database?
Did you compact the database?
To save your current PCB artwork you may need to export the PCB in PCB ASCII 2.8
format, then close your database with the compact while closing box ticked.
Reopen the now compacted database and reimport
Michael,
Brad's answer just reminded me of another issue. Protel creates a temporary
filename.ldb file in the same directory like the database. In there is the
information who is working on the ddb. If you had a crash or I have even seen it
occasionally that this ldb file wasn't deleted after
Have you emptied the trash bin? And as Brad mentioned it would be best
to experiment on a copy.
David VanHorn wrote:
In an effort to fix this problem, I have deleted all but
two of the mechanical layers, and I still have the error.
I don't understand this. I've been regularly saving all,
You don't need to use access, just use Protel...
1st: TAKE A BACKUP OF YOUR DATABASE, I have known this to go wrong on low
memory machines.
(I've no idea why this is so hidden)
In the design explorer, with ALL DOCUMENTS CLOSED there is a downward
pointing arrow in the menu bar
at the top
Thanks for responding. I see several responses but yours is
the first, Brad, so I'll answer what I can and then I have a
meeting and will be back in a couple hours.
I do have the compress utility activated. I meant to say
that in the first post but forgot. Also, I'm running Windows
2000 and
Just a quick update:
1. I have emptied the recycle bin. It only had 84KB in it.
2. I deleted about 4 earlier versions of the PCB in the DDB.
My feeling now is that if it would save the DDB, it would now
be down to less than 200MB. I am still getting the error. I
have 64GB left on my
Michael,
It looks like it is time for you to copy those remaining mechanical layers
into another database, or depending on their size, 2 separate databases, and
delete them from your current database and empty the trash after the
delete..
This will free up a lot of room in your current
Miker,
Doesn't sound that ominous. Here is what I think that I would
attempt. Export all of your required files from the existing DDB. Start a
new blank DDB. Import your required documents into the new DDB. See how that
goes for size and leave that possibly corrupted DDB behind in the
MikeR
You are doing something very wrong (somewhere) if your DDB is a 1GB. I m
working on a design with 2500 components, 4500 nets, 21000 nodes and the ddb
is only 18 meg. Yes it is slow as molasses but still only 18 meg.
MikeR if you want to send one of us your ddb , zip it , and I will be
Interesting, I thought that the copper balancing act was only for
containing possible warpage. Makes sense, though. Thanks for tip.
aj
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
...
I did this type of pour and had the board house
slap my wrists ...The explanation was that if
you
Wojciech,
Please see below.
JaMi
- Original Message -
From: Wojciech Oborski [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Monday, October 07, 2002 9:28 AM
Subject: Re: [PEDA] Exporting Protel 99SE Library files
snip
More important would be, I think, to ask - what
Aj or others,
same issue with plating. Differences in copper density (over area)
effect the plating rate of Cu to the circuit pattern. Balanced copper side
to side, area to area, is the fabricators best friend (yours also in the
end).
Sincerely,
Brad Velander.
Lead PCB Designer
Norsat
Rob,
As AJ points out, part of what they say is correct, and you do need to
balance the layers, and the primary reason is to prevent warpage and
related problems.
However, the remaining issue, is raising a flag about your boardhouse.
Most boardhouses today use equipment that continually sprays
Jami,
that's just blatantly not true! There is nothing questionable about
a board house that directs you to issues of uneven etching or plating
because of varying Cu distribution. Not even with spray etchers.
Spray etchers are generally better than tanks but they are not
perfect
On Tue, 8 Oct 2002 11:18:07 -0700, you wrote:
Some boardhouses may still dip or submerge the board into an etchant
tank, where the board simply sits in the etchant, however, there should be
enough agitation or circulation of the etchant to prevent what they are
describing from happening.
On Tue, 8 Oct 2002 10:45:10 -0500, Michael Robison wrote:
Just a quick update:
1. I have emptied the recycle bin. It only had 84KB in it.
2. I deleted about 4 earlier versions of the PCB in the DDB.
My feeling now is that if it would save the DDB, it would now
be down to less than 200MB.
MikeR, as someone else suggested but in different context, have a look in
C:\program files\design explorer99se\backup\ and you might find a later
version of your board. Just a punt in the dark.
Regards,
Brendon.
I have a quick turn pcb with 1000V @ app 1ma max.
What trace/plane separation is required for UL/CE?
Mike
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this list visit:
* http://www.techservinc.com/protelusers/leave.html
I'm somewhat curious about the error message you are getting
Now I'm getting this error when I try to save all:
[Microsoft][ODBC Microsoft Access Driver] Database has
reached maximum size.
The fact that the error message is mentioning ODBC makes me think that your
administrator has set up
Terry said:
I would export all the files in the database to files and start
using a file system database.
No more Access errors guaranteed and probably reduced load/save
times.
***
You know, when I first started with Protel I used a file
system instead of a database, and then there
Brad see below . . .
- Original Message -
From: Brad Velander [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 12:25 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?
Jami,
that's just blatantly not true! There is nothing
Hi, Mike-
UL will be happy with spacings that will lead to disaster in
practical application. Use at least the VDE spacing of 8mm
edge to edge. In fact, though, even this is marginal for 1KV;
eventual contamination will cause tracking across the PCB surface.
Motorola had a good Apps Note on
On 02:05 PM 8/10/2002 -0700, JaMi Smith said:
what are you saying and meaning when you speak of unbalanced copper.
first - to my knowledge we are not talking about 1/2 oz on one side and 1 oz
on the other side, which is does in fact cause uneven etching problems, but
that was not stated in the
Terry please see below
- Original Message -
From: Terry Harris [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 12:36 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?
On Tue, 8 Oct 2002 11:18:07 -0700, you wrote:
Some boardhouses
Jami,
Unbalanced copper is exactly what the conversation started on,
uneven distribution of Cu and spaces or gaps across the surface or area of
the PCB. I am not talking different Cu thicknesses.
I am not trying to pick on you Jami, but I deal with numerous
fabricators on this
Hi Thomas,
I agree with all of those who have indicated that it is desirable to
balance the copper density on both sides of the board. In cases such as
you mention, the board manufacturer still has some options available.
Remember that the board manufacturer will take your data and step and
On 10:19 AM 9/10/2002 +1100, Thomas said:
Sometimes that's just not possible though.
I've recently finished a double sided PCB with allot of controlled impedance
tracks on one side widely spaced to prevent xtalk and to prevent arcing (its
a surge protection device) with a solid ground plane on
On Tue, 8 Oct 2002 14:54:55 -0700, JaMi wrote:
Nothing you can do will eliminate the problem, just hope to reduce the
effects. A lot of copper in one area of the PCB will take longer to etch
resulting in over etching (undercutting) in areas with less copper. The
board house can't afford to
Terry please see below,
- Original Message -
From: Terry Harris [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 6:43 PM
Subject: Re: [PEDA] OT - Complex boards and time to Layout?
On Tue, 8 Oct 2002 14:54:55 -0700, JaMi wrote:
Nothing you
Thomas,
your comments are too familiar. The problem is that your average PCB
designer/buyer has no manner to accurately check trace tolerance or
undercut. At best most may have access to something like a tooling
microscope which will only give you a top down approximation of track
tolerance.
Ian, please see below
--- In [EMAIL PROTECTED], Ian Wilson
[EMAIL PROTECTED] wrote:
On 02:05 PM 8/10/2002 -0700, JaMi Smith said:
snip
Chemistry is not one dimensional.
Agreed
. . . It takes longer to etch a few
microns
off a large area of copper than it does a small area.
Jami,
what the original post implies is that the fabricator had some issue with
being able to etch the board in a manner that met the specified
requirements. Those requirements have not been spelled out for us, nor do we
know the limitations or concerns of the fab shop. Therefore we are
Just now this minute finally received Ians post supposedly sent at 2:44 PM
- only 6 hours and 15 minutes - and for this I pay 50 bucks a month!
JaMi
- Original Message -
From: Ian Wilson [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, October 08, 2002 2:44 PM
On 08:26 PM 8/10/2002 -0700, JaMi Smith said:
I refer you to their capability page:
http://www.lintek.com.au/boa.htm
Note the text (Tolerance on track widths is +- 0.008mm or better
depending
on the design and uniformity of copper distribution.)
Please note that they state
I see you're with SBC...Well there's another company having huge
problems. (another several thousand planned layoffs coming soon I
think.)
I can't belive I'm saying this, but I have been pretty darn happy with
my ATT cable modem service. I usually can't stand ATT.
-Original Message-
Ian, both your and Max's comments sound reasonable, I'll endeavour to help
out my board house next time. I had thought about this problem before
(particularly with regards to 'undercut' over etching on one side), but as
I'd never heard any complaints I assumed all was ok.
Tom.
-Original
42 matches
Mail list logo
