On Sun, 17 Jul 2011 16:59:53 -0400 michealbutz michealb...@optonline.net
wrote:
:FRR information is stored off of PSA - not in any task related block.
:Statement. As opposed to a SCB Thus the routine FRR can be called by a SRB
or TCB since
:PSA is
:related to the CPU
: Question What if
Hi,
Is there any HMC emulator availalbe for running on a PC?
I don't mean the Hercules emulator. Because we need to reconfigure 3 LPAR image
profiles with dedicated CPs among 7 running LPARs in a CPC. We don't want to
have any impact on other running LPARs when we deactivate/activate new image
On Sun, 17 Jul 2011 17:37:17 -0400 michealbutz michealb...@optonline.net
wrote:
:.1.. TCBRTM1E X'40' - RTM1 IS
:CURRENTLY PROCESSING
:EUT FRR'S FOR THIS
:
On Sun, 17 Jul 2011 16:22:23 -0500 Jim Thomas j...@thethomasresidence.us
wrote:
:ARR's are only required by PC-ss and then too, only if they're entered in
:an enabled and unlocked task mode. Don't think we had them back then, hence
:FRR's.
ARRs are NOT required by PC-ss - ESTAEX works
W dniu 2011-07-18 10:50, Alex pisze:
Hi,
Is there any HMC emulator availalbe for running on a PC?
I don't mean the Hercules emulator. Because we need to reconfigure 3 LPAR image
profiles with dedicated CPs among 7 running LPARs in a CPC. We don't want to
have any impact on other running
On Sun, 17 Jul 2011 18:09:44 -0400 Peter Relson rel...@us.ibm.com wrote:
:The z/OS 1.13 support is for a program to be able to survive the things
:that programs cannot typically avoid -- such as external and I/O
:interrupts, page faults.
:If you can get your program up there (whether by
We're using Control-M for job scheduling.
We recently had to add some steps to (the end of) an existing job.
Before that, Control-M should restart the job on the *first* job step in
any
case, so the schedule definition looked like this:
! ON PGMST ANYSTEP PROCST CODES EXERR
A/O * !
Question What if there is a CPU switch in the routine
being protected by the FRR
As Binyamin wrote, FRRs are processor-related. There is a stack. The
obvious inference is that if a work unit is undispatched the stack must be
saved. It is.
When the work unit is redispatched, whether on the
On Mon, 18 Jul 2011 07:48:19 -0400 Peter Relson rel...@us.ibm.com wrote:
:Question What if there is a CPU switch in the routine
:being protected by the FRR
:As Binyamin wrote, FRRs are processor-related. There is a stack. The
:obvious inference is that if a work unit is undispatched the
Hello folks,
I need to obtain an output file of 300 bytes from two differents files:
- FILE1 with a lenght of 80
- FILE2 with a lenght of 300
I need to merge both files, first FILE1 and after FILE2.
I have several tested but I don't find the correct solution.
The last one JCL that I used, I
Thanks for all the questions. I'll put the questions and answers
together for convenience.
Paul Gilmartin wrote:
On Sun, 17 Jul 2011 23:35:30 +1000, Clement Clarke wrote:
Isn't much of this what SMS is designed to do nowadays?
You can still use SMS. Jol uses a simple VSAM file to store the
snip
Our CPC (2094-S18-708) now has 8 Physical CP and has 1 production LPAR,
2 maintenance LPARs, 2 ICF LPARs and 2 test LPARs running at the moment.
Currently, all LPARs are equipped with shared CPs and have weight values
assigned. The details are as follows.
production LPAR 1
initial LCP
Hi
Till now I didn't find a working link to a description/download
On 7/18/2011 2:41 PM, Clement Clarke wrote:
Thanks for all the questions. I'll put the questions and answers
together for convenience.
Paul Gilmartin wrote:
On Sun, 17 Jul 2011 23:35:30 +1000, Clement Clarke wrote:
W dniu 2011-07-18 14:42, Staller, Allan pisze:
snip
Our CPC (2094-S18-708) now has 8 Physical CP and has 1 production LPAR,
2 maintenance LPARs, 2 ICF LPARs and 2 test LPARs running at the moment.
Currently, all LPARs are equipped with shared CPs and have weight values
assigned. The details are
Hilario G. wrote:
I need to obtain an output file of 300 bytes from two differents files:
- FILE1 with a lenght of 80
- FILE2 with a lenght of 300
I need to merge both files, first FILE1 and after FILE2.
I have several tested but I don't find the correct solution.
Did you supplied to Frank
Alex,
1. What about ICF processors? Do you run ICF LPARS on regular CP's?
If yes, then I would strongly recommend to change it. It is strongly
recomended to use dedicated processors for CF, and ICF engine is much
cheaper.
2. I don't like idea to dedicate CPs for tests. IMHO t should be enough
The Mainframe version written in Assembler. The PC version is written in
C.
Somewhat OT but why? Why not C on the mainframe? Why two code bases, one
fairly easy to debug and one relatively hard to debug?
I am thrilled with writing software for the mainframe in C (C++ actually)
after years of
On Fri, 15 Jul 2011 19:29:34 +, Mingee, David
david.min...@libertymutual.com wrote:
Yes, I think the number than causes the failure is cyl 4104? The math is too
hard for me.
4369 Cylinders = 65535 Tracks
Regards,
Art Gutowski
Compuware Corporation
SNIP
snip
Our CPC (2094-S18-708) now has 8 Physical CP and has 1 production
LPAR,
2 maintenance LPARs, 2 ICF LPARs and 2 test LPARs running at the
moment.
Currently, all LPARs are equipped with shared CPs and have weight
values
assigned. The details are as follows.
production LPAR 1
Do you truly mean merge? That implies that the records have some sort
of key field(s) and you want to interleave the records in the two files
together based on the key(s). Or do you mean concatenate as in create
a new file will all the records of the first file, in their current
order, followed by
Read what the Authorized Assembler Services Guide has to say about EUT for a
background info level set.
Bill Fairchild
Rocket Software
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of
michealbutz
Sent: Sunday, July 17, 2011 2:46 PM
To:
The STNSM and STOSM instructions can also be used to disable or enable a CPU
for I/O and external interrupts.
Bill Fairchild
Rocket Software
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of
michealbutz
Sent: Sunday, July 17, 2011 2:46 PM
On 7/18/2011 9:22 AM, Charles Mills wrote:
The Mainframe version written in Assembler. The PC version is written in
C.
Somewhat OT but why? Why not C on the mainframe? Why two code bases, one
fairly easy to debug and one relatively hard to debug?
Perhaps there are historical reasons - one
I checked my UTILITY ENTRY LKED and it has HIGHEST RETURN CODE,===,4
but my SMPE says: MAX ACCEPTABLE RC=0
There are three possible sources for the maximum acceptable return code
for a load module, used in this order:
1) RETURN CODE subentry in the LMOD entry. Gleaned from the JCLIN if
He did not say the PC instruction will not work above the bar, nor am I saying
that it will work above the bar. He also did not say that branching will not
work above the bar. I would add that neither am I saying that branching will
work above the bar except that I think it is too obvious to
Because there will be only
2 PCPs available for it, however, it has 8 LCPs configured.
/snip
No. IBM does not prevent you from defining more LP's than CP's. However
the overhead becomes excessive when the LP/CP ratio exceeds (2 to 3) to
1.
Actually, PR/SM does NOT allow this.
If there are only
(Posting approved by Darren)
We are looking for a very experienced z/OS COBOL programmer/designer for some
part-time contract work. You can work from home, but need the ability to use
TN3270 to log into our test system in Dallas. (Evenings and weekends are fine.)
Because most communication
(Posting approved by Darren)
We are looking for occasional authors for our Tuning Letter. It's published six
times a year. The articles will be similar to those we currently include, but
will address areas that would require too much research time for me personally.
If you are interested for
ASHARED CPs *may* be dispatched on
DEDICATED processors if resource is available (I am sure someone will
correct me this is not true).
Assuredly.
Dedicated processors are just that.
Dedicated!
Only the lPAR they're assigned to may run work on them, regardless of the
activity.
That's why I agree
Thanks for correcting my erroneous impression.
snip
ASHARED CPs *may* be dispatched on
DEDICATED processors if resource is available (I am sure someone will
correct me this is not true).
Assuredly.
Dedicated processors are just that.
Dedicated!
Only the lPAR they're assigned to may run work on
He did not say the PC instruction will not work above the bar
The Entry Table Entry for a PC routine has not been expanded to 64 bits. Until
it is, a PC routine cannot be above the Bar. It appears that Amode 64 is
supported (but not documented) but the PC routine cannot reside above the Bar
On 7/16/2011 8:28 PM, Greg Dorner wrote:
I've experienced some strange install/maintenance scenarios with z/OSMF, but
have managed so far to get it all put back together again. I went from z/OS
1.10 to 1.12 with z/OSMF, which was a bit tricky with all the config file
changes, but I haven't
Thank you Scott; good to know.
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On Mon, 18 Jul 2011 14:45:35 +, Bob Shannon wrote:
He did not say the PC instruction will not work above the bar
The Entry Table Entry for a PC routine has not been expanded to 64 bits. Until
it is, a PC routine cannot be above the Bar. It appears that Amode 64 is
supported (but not
Sorry for my delayed response to your questions. I asked our SMF guru for a
description of the 2 SMF records in question, here is what I got:
136 IGGPOST0 DADSM Alloc.
139 IGGPOST0 DADSM Scratch
I am still looking for the reason. I think, as most have suggested, that DFHSM
is the culprit.
DFHSM is the culprit.
On behalf of DFHSM, I object. HSM merely enforces policy. If there's a
culprit here, it would be the person(s) who designed the policy or maybe
applications for not understanding the rules. They do know there are
rules, right?
;o)
ddk
This e-mail message and all
Darth,
You are spot on. HSM is doing what it is supposed to do. I cannot understand
why the STC didn't use the dsn during all this time. Although it is in the
startup the program which calls the dsn hasn't been used at least since October
24, 2010.
--- On Mon, 7/18/11, Darth Keller
z/LINUX uses SVC to invoke the kernel.
Which I find most interesting as it means that, theoretically, one could
write a z/LINUX ABI interface which uses Subsystem SVC screening to run
z/Linux applications on z/OS UNIX.
On Mon, 2011-07-18 at 10:14 -0500, Paul Gilmartin wrote:
On Mon, 18 Jul 2011
On Mon, 18 Jul 2011 10:34:52 -0500, John McKown wrote:
z/LINUX uses SVC to invoke the kernel.
Which I find most interesting as it means that, theoretically, one could
write a z/LINUX ABI interface which uses Subsystem SVC screening to run
z/Linux applications on z/OS UNIX.
fork()? Pipes?
In 4e20f40d.2050...@phoenixsoftware.com, on 07/15/2011
at 07:14 PM, Edward Jaffe edja...@phoenixsoftware.com said:
There is no way the processor can know in advance which bits will be
on in a branch target register, so its seems likely that the
pipeline must be flushed when 'surprise' AMODE
In 3339201005293115.wa.paulgboulderaim@bama.ua.edu, on
07/17/2011
at 11:13 AM, Paul Gilmartin paulgboul...@aim.com said:
It's pretty hard to tell whether you're a Luddite or merely a
masochist.
Especially if he's neither, just more perceptive than you.
--
Shmuel (Seymour J.) Metz,
On Mon, 2011-07-18 at 10:47 -0500, Paul Gilmartin wrote:
On Mon, 18 Jul 2011 10:34:52 -0500, John McKown wrote:
z/LINUX uses SVC to invoke the kernel.
Which I find most interesting as it means that, theoretically, one could
write a z/LINUX ABI interface which uses Subsystem SVC screening
Good Morning Gentle Readers,
I was called because the following message was coming up on the console:
IEFTMS9 TMC BACKUP REQUIRED, AUDIT FILE UTILISATION IS CURRENTLY 82%.
I executed the following job:
//STEP1 EXEC PGM=TMSCOPY,REGION=7M
//TMSRPT DD SYSOUT=*
Bob Shannon writes:
begin snippet
The entry table for a PC routine has not been expanded to 64 bits. Until it
is, a PC routine cannot be above the Bar. It appears AMODE 64 is supported
(but not documented) but the PC routine cannot reside above the bar.
/end snippet
His first point is a
Having the PC routine above the bar is not the same as having the single PC
instruction above the bar that is used to invoke the PC routine, wherever the
PC routine may be loaded. All that the PC instruction does is generate a
number and then use that number to index through the linkage table
For years I've suggested to folks they should try the
free (well, included-in-the-price) HTTP server that
comes with z/OS.
Several people have replied that would love some training
in tailoring z/OS UNIX and in setting up the HTTP server.
But those are systems programmer courses and my focus
charl...@mcn.org (Charles Mills) writes:
Somewhat OT but why? Why not C on the mainframe? Why two code bases, one
fairly easy to debug and one relatively hard to debug?
I am thrilled with writing software for the mainframe in C (C++ actually)
after years of laboring in assembler.
the los
This looks correct. You JCL runs TMSCOPY to backup the TMC and audit
files. If the audit file gets down to 3 records, your tape processing
would stop until you ran TMSCOPY.
The message may be due to a much larger tape activity on a one time bases,
in which case you likely need look no further.
From: Frank Yaeger/San Jose/IBM
Jonathan,
Thanks very much for your help.
--- On Tue, 7/19/11, Jonathan Goossen jonathan.goos...@assurant.com wrote:
From: Jonathan Goossen jonathan.goos...@assurant.com
Subject: Re: CA-1 TMS QUESTION - IEFTMS9 TMC BACKUP REQUIRED
To: IBM-MAIN@bama.ua.edu
Received: Tuesday, July 19, 2011,
Good day Steve,
I'd be interested in reviewing your paper if you feel inclined to send me a
copy.
Thanks,
Alan
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of
Steve Comstock
Sent: Monday, July 18, 2011 9:38 AM
To: IBM-MAIN@bama.ua.edu
One of my best CA colleagues is Russ Witt, who generally follows this list.
He is greatly involved with CA's Tape solutions. He was my go-to guy for
any product-like questions. If you don't find your answer here, he'll have
the answer. You'd also be able to see him in person at Share in Orlando
On 7/17/2011 11:11 AM, Shmuel Metz (Seymour J.) wrote:
Why would a branch with AMODE switching require more pipeline flushing
than a branch without?
If the target AMODE guessed by the hardware is wrong, then it will have to start
over again fetching and interpreting the instructions in the
Hello folks,
The additional information for the problem are:
1) FILE1 MEMBER OF A PDS LRECL=80. FB
2) FILE2 PS LRECL=210, FB
3) OUTPUT=FILE1+FILE2 PS,LRECL=210, FB
FILE1 contains the header data for SMTP protocol.
FILE2 is the attached file sentd via SMTP.
I need to merge FILE1 (LRECL 80,
On Mon, 18 Jul 2011 09:12:59 -0700, esmie moo esmie_...@yahoo.ca wrote:
Good Morning Gentle Readers,
I was called because the following message was coming up on the console:
IEFTMS9 TMC BACKUP REQUIRED, AUDIT FILE UTILISATION IS CURRENTLY 82%.
snip
What I would like to know if this is the
In
ofa1775815.a71a18dd-on852578d0.00732c2b-852578d0.0079b...@us.ibm.com,
on 07/17/2011
at 06:09 PM, Peter Relson rel...@us.ibm.com said:
If you can get your program up there (whether by yourself or by use
of directed load (LOAD with ADDR64), and if it calls no system
routines of any kind
In 4e243efe.2010...@valley.net, on 07/18/2011
at 10:11 AM, Gerhard Postpischil gerh...@valley.net said:
Good for you, but some of us have built extensive macro and
subroutine libraries to use with assembler, and find it as fast and
easy to use those than to live with (the confining
In 000701cc44c2$cf0ad6c0$6d208440$@net, on 07/17/2011
at 04:47 PM, michealbutz michealb...@optonline.net said:
Questions in RED
No. There are no colors in RFC 5322 e-mail.
--
Shmuel (Seymour J.) Metz, SysProg and JOAT
ISO position; see http://patriot.net/~shmuel/resume/brief.html
In tpt727h2cfbmucaoos09907lv33nhft...@4ax.com, on 07/18/2011
at 12:12 PM, Binyamin Dissen bdis...@dissensoftware.com said:
If locked or disabled there ain't no CPU switch. The unit of work
does not lose control (if there is a program check, the FRR gets
control which is the same unit of work).
Hilario G. at IBM Mainframe Discussion List IBM-MAIN@bama.ua.edu wrote on
07/18/2011 11:57:52 AM:
The additional information for the problem are:
1) FILE1 MEMBER OF A PDS LRECL=80. FB
2) FILE2 PS LRECL=210, FB
3) OUTPUT=FILE1+FILE2 PS,LRECL=210, FB
FILE1 contains the header data for
More correct actions for something like this:
Look in the install/ongoing support sections of the documentation, find where
it says you should run TMSCOPY on a regular basis and schedule such a job :)
Make sure you do the other regular maintenance to the TMS that are documented
in the same
In m38vrvy1w2@garlic.com, on 07/18/2011
at 12:44 PM, Anne Lynn Wheeler l...@garlic.com said:
However, before that mainframe BSD unix shipped
My understanding is that none of freebsd, netbsd, openbsd[1] can pass
the UNIX® certification from TUG (formerly X-Open).
[1] With corrected
IIRC Ray Wicks said they achieve about 91% hit ratio from HSB, but
that was for XA don't know what the numbers are for 64 bit.
In a message dated 7/18/2011 2:17:31 P.M. Central Daylight Time,
edja...@phoenixsoftware.com writes:
If the target AMODE guessed by the hardware is wrong, then it
In 4e248256.90...@phoenixsoftware.com, on 07/18/2011
at 11:58 AM, Edward Jaffe edja...@phoenixsoftware.com said:
If the target AMODE guessed by the hardware is wrong, then it will
have to start over again fetching and interpreting the instructions
in the correct AMODE.
Are you saying that the
íz{S©ì}êÄÊ xjǺà*'µéíO*^µìmþZw!j»
On Sun, 17 Jul 2011 19:34:25 +0200, Michel Castelein wrote:
JCL consists of about 120 words last I checked (not counting those goofy
conditional statements IBM created recently for those who couldn't
comprehend COND codes), average batch job uses about 20 or 25. ...
It's pretty hard to tell
Why don't you just backup the TMC? Surely you have a daily job that does this
- and it should clear the AUDIT file when it runs the backup from what I
remember.
From Quickref:
Action: Execute the backup program, TMSCOPY. All CA 1 utilities except
TMSCOPY and TMSINIT will abend with
íz{S©ì}êÄÊ xjǺà*'µéíO*^µìmþZw!j»
W dniu 2011-07-18 22:15, Paul Gilmartin pisze:
[...]
As upper management perceives, even through media such as airline
magazines, that (some; I'm confident not all) z/OS systems programmers
exhibit public delight in unwillingness to assimilate new technology and
in performing their jobs in a
In my 20 plus year career I have seen a lot more people with mainframe
backgrounds expressing a willingness to learn and integrate usage of
non-mainframe technology than I have seen people from an open-systems
background show a willingness to learn anything about the mainframe.
Hello folks,
The additional information for the problem are:
1) FILE1 MEMBER OF A PDS LRECL=80. FB
2) FILE2 PS LRECL=210, FB
3) OUTPUT=FILE1+FILE2 PS,LRECL=210, FB
FILE1 contains the header data for SMTP protocol.
FILE2 is the attached file sentd via SMTP.
I need to merge FILE1
On Mon, Jul 18, 2011 at 2:10 PM, Wayne Driscoll wdri...@us.ibm.com wrote:
In my 20 plus year career I have seen a lot more people with mainframe
backgrounds expressing a willingness to learn and integrate usage of
non-mainframe technology than I have seen people from an open-systems
background
Hear Hear ... I guess I'm not the only one that feels
this way ...
I will have a 'nasty-gram' later ... so stay tuned :-)
Kind Regards
Jim Thomas
617-233-4130 (mobile)
636-294-1014(res)
j...@thethomasresidence.us (Email)
-Original Message-
From: IBM
I have nothing against anything 'new' and highly doubt that
other mainframer's do either. Come from the world of Windows
or Apple ??.. I am not even going to comment on that.
That said, what are we trying to achieve ?? .. the blue screen
of death on the mainframes ?? (be it z/OS, z/VM, z/VSE or
W dniu 2011-07-18 23:10, Wayne Driscoll pisze:
In my 20 plus year career I have seen a lot more people with mainframe
backgrounds expressing a willingness to learn and integrate usage of
non-mainframe technology than I have seen people from an open-systems
background show a willingness to learn
Macro4 Insynch has an panel Option for VSAM Utilities which allows you to
direct the IDCAMS Define to a data set. There must be others.
Entry Name === 'AFITJLM.DELETEME.'
User Catalog ===
Entry type === 1 1 - KSDS Cluster5 - Alternate Index
2 - ESDS
On 7/18/2011 12:55 PM, Shmuel Metz (Seymour J.) wrote:
Are you saying that the processor starts fetching instructions for the branch
prior to executing it?
Absolutely! There is a multi-stage pipeline that allows the processor to get
ahead of the current instruction's execution to fetch and
I created these a while back for my programmers. Just use Batch TSO to
invoke
=== pass a DD to this one
/* rexx*/
trace i
arg dd
/* rexx */
x = listdsi( dd FILE)
if (SysUSED = 0) | (SysUSED = 'N/A') then DO
trace
Say '*** '
Say '*** Dataset IS EMPTY DD: ' dd
Totally cool REXX, John. Thanks. Remember If the code works borrow
it.
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Search the
There are a few of us not sure how many, that are on both sides of the aisle. I
work in z/OS, Windows and Unix, including Linux and enjoy
and embrace new ideas
Scott J Ford
Software Engineer
http://www.identityforge.com
From: Jim Thomas j...@thethomasresidence.us
To: IBM-MAIN@bama.ua.edu
EXCELLENT rant, Jim. Got fired up just reading it.
I occasionally annoy our local unix and web programmers by reminding them
that their pay is NOT related to the number of directories they create...
and reminding them that each level in a path slows down their system. And
to even SUGGEST
On Mon, 18 Jul 2011 16:10:06 -0500, Wayne Driscoll wdri...@us.ibm.com wrote:
In my 20 plus year career I have seen a lot more people with mainframe
backgrounds expressing a willingness to learn and integrate usage of
non-mainframe technology than I have seen people from an open-systems
Thank you for your advices!
I agree that it's simple to do some tests on a test live sysplex. :-)
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I don't, in general. It is more just a step above assembler. Now, if you
want a true HLL, use APL2!
On Mon, 2011-07-18 at 15:21 -0400, Shmuel Metz (Seymour J.) wrote:
In 4e243efe.2010...@valley.net, on 07/18/2011
at 10:11 AM, Gerhard Postpischil gerh...@valley.net said:
Good for you, but
On Mon, 2011-07-18 at 14:45 -0700, Sam Siegel wrote:
On Mon, Jul 18, 2011 at 2:10 PM, Wayne Driscoll wdri...@us.ibm.com wrote:
In my 20 plus year career I have seen a lot more people with mainframe
backgrounds expressing a willingness to learn and integrate usage of
non-mainframe technology
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