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• • Re: [OpenRISC] Getting rid of the delay slot Peter Gavin
  • Re: [OpenRISC] Getting rid of the delay slot Julius Baxter
  • Re: [OpenRISC] Getting rid of the delay slot R. Diez
• Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Julius Baxter
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Matthew Hicks
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Jonas Bonn
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Julius Baxter
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Ouabache Designworks
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? R. Diez
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? R. Diez
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Ouabache Designworks
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Julius Baxter
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Julius Baxter
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Julius Baxter
  • Re: [OpenRISC] [Openrisc] ORBIS32 Class II instructions - all/none or some? Jeremy Bennett
• [OpenRISC] Automatically linting and testing multiple CPU core configurations R. Diez
• Re: [OpenRISC] OR1K cache invalidation Julius Baxter
• [OpenRISC] Testing return code from or1ksim Julius Baxter
• [OpenRISC] Operand B in or1200_fpu_intfloat_conv_except.v R. Diez
• [OpenRISC] Lint warnings about mul_24_fract_48 and mul_24_sign R. Diez
• [OpenRISC] Blog article about orbuild R. Diez
• [OpenRISC] pc handling in the pipeline Peter Gavin
  • Re: [OpenRISC] pc handling in the pipeline Jeremy Bennett
  • Re: [OpenRISC] pc handling in the pipeline Julius Baxter
• Re: [OpenRISC] [PATCH] DSX support in OR1200 and tests in ORPSoC Julius Baxter
  • Re: [OpenRISC] [PATCH] DSX support in OR1200 and tests in ORPSoC Julius Baxter
  • Re: [OpenRISC] [PATCH] DSX support in OR1200 and tests in ORPSoC Stefan Kristiansson
  • Re: [OpenRISC] [Openrisc] [PATCH] DSX support in OR1200 and tests in ORPSoC Olof Kindgren
  • Re: [OpenRISC] [Openrisc] [PATCH] DSX support in OR1200 and tests in ORPSoC Julius Baxter
  • Re: [OpenRISC] [Openrisc] [PATCH] DSX support in OR1200 and tests in ORPSoC Julius Baxter
• Re: [OpenRISC] [PATCH 1/1] openrisc: provide dma_map_ops Jonas Bonn
  • Re: [OpenRISC] [PATCH 1/1] openrisc: provide dma_map_ops Stefan Kristiansson
• [OpenRISC] LLVM for OpenRISC: Euro-LLVM 2012 by Anton Korobeynikov Jeremy Bennett
• Re: [OpenRISC] Problem using OpenRISC bld-all.sh on Ubuntu 11.10 Jeremy Bennett
• [OpenRISC] OR1200 roadmap Olof Kindgren
  • Re: [OpenRISC] OR1200 roadmap Ouabache Designworks
  • Re: [OpenRISC] OR1200 roadmap Olof Kindgren
  • Re: [OpenRISC] OR1200 roadmap Pekon Gupta
  • Re: [OpenRISC] OR1200 roadmap Stefan Kristiansson
  • Re: [OpenRISC] OR1200 roadmap Olof Kindgren
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Olof Kindgren
  • [OpenRISC] [Openrisc] OR1200 roadmap Julius Baxter
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Olof Kindgren
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Julius Baxter
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Julius Baxter
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Olof Kindgren
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] OR1200 roadmap Julius Baxter
• [OpenRISC] [PATCH] SR[DSX] in OR1200 and software test in ORPSoC Julius Baxter
  • Re: [OpenRISC] [PATCH] SR[DSX] in OR1200 and software test in ORPSoC Stefan Kristiansson
  • Re: [OpenRISC] [PATCH] SR[DSX] in OR1200 and software test in ORPSoC Julius Baxter
  • Re: [OpenRISC] [PATCH] SR[DSX] in OR1200 and software test in ORPSoC Jonas Bonn
  • Re: [OpenRISC] [PATCH] SR[DSX] in OR1200 and software test in ORPSoC Julius Baxter
  • Re: [OpenRISC] [Openrisc] [PATCH] SR[DSX] in OR1200 and software test in ORPSoC Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] [PATCH] SR[DSX] in OR1200 and software test in ORPSoC Julius Baxter
  • Re: [OpenRISC] [Openrisc] [PATCH] SR[DSX] in OR1200 and software test in ORPSoC Jeremy Bennett
• Re: [OpenRISC] [Openrisc] some questions about Debug interface Jeremy Bennett
• [OpenRISC] ORPSoC V2 lint results R. Diez
  • Re: [OpenRISC] ORPSoC V2 lint results Olof Kindgren
  • Re: [OpenRISC] ORPSoC V2 lint results R. Diez
  • Re: [OpenRISC] ORPSoC V2 lint results Julius Baxter
  • Re: [OpenRISC] ORPSoC V2 lint results R. Diez
• [OpenRISC] Automatic download script instead of repository mirroring for a more open strategy R. Diez
  • Re: [OpenRISC] Automatic download script instead of repository mirroring for a more open strategy Julius Baxter
  • Re: [OpenRISC] Automatic download script instead of repository mirroring for a more open strategy Olof Kindgren
• [OpenRISC] [or1ksim] Add support for returning simulated program's return code Julius Baxter
  • Re: [OpenRISC] [Openrisc] [or1ksim] Add support for returning simulated program's return code Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] [or1ksim] Add support for returning simulated program's return code Julius Baxter
• Re: [OpenRISC] Subtly forcing the move to OpenCores.org Marcus Erlandsson
• [OpenRISC] [PATCH 1/3] openrisc: Fix refereneces to symbols which cause link-time relocation errors on certain compilers and run-time errors on other compilers. Julius Baxter
  • [OpenRISC] [PATCH 2/3] openrisc: Fix ml501 board port's environment address define Julius Baxter
  • Re: [OpenRISC] [PATCH 2/3] openrisc: Fix ml501 board port's environment address define Stefan Kristiansson
  • [OpenRISC] [PATCH 3/3] openrisc: Update ml501 board's or1ksim config file with comment explaining flash incompatibilities Julius Baxter
  • Re: [OpenRISC] [PATCH 3/3] openrisc: Update ml501 board's or1ksim config file with comment explaining flash incompatibilities Stefan Kristiansson
  • Re: [OpenRISC] [PATCH 1/3] openrisc: Fix refereneces to symbols which cause link-time relocation errors on certain compilers and run-time errors on other compilers. Julius Baxter
  • Re: [OpenRISC] [PATCH 1/3] openrisc: Fix refereneces to symbols which cause link-time relocation errors on certain compilers and run-time errors on other compilers. Stefan Kristiansson
  • Re: [OpenRISC] [PATCH 1/3] openrisc: Fix refereneces to symbols which cause link-time relocation errors on certain compilers and run-time errors on other compilers. Stefan Kristiansson
  • Re: [OpenRISC] [PATCH 1/3] openrisc: Fix refereneces to symbols which cause link-time relocation errors on certain compilers and run-time errors on other compilers. Julius Baxter
  • Re: [OpenRISC] [PATCH 1/3] openrisc: Fix refereneces to symbols which cause link-time relocation errors on certain compilers and run-time errors on other compilers. Stefan Kristiansson
  • Re: [OpenRISC] [PATCH 1/3] openrisc: Fix refereneces to symbols which cause link-time relocation errors on certain compilers and run-time errors on other compilers. Julius Baxter
  • Re: [OpenRISC] [PATCH 1/3] openrisc: Fix refereneces to symbols which cause link-time relocation errors on certain compilers and run-time errors on other compilers. Stefan Kristiansson
• [OpenRISC] [PATCH] MAINTAINERS file for Or1ksim Jeremy Bennett
  • Re: [OpenRISC] [PATCH] MAINTAINERS file for Or1ksim Jonas Bonn
  • Re: [OpenRISC] [PATCH] MAINTAINERS file for Or1ksim Jeremy Bennett
  • [OpenRISC] Subtly forcing the move to OpenCores.org R. Diez
  • Re: [OpenRISC] Subtly forcing the move to OpenCores.org Jeremy Bennett
  • Re: [OpenRISC] Subtly forcing the move to OpenCores.org R. Diez
  • Re: [OpenRISC] Subtly forcing the move to OpenCores.org Jeremy Bennett
  • Re: [OpenRISC] Subtly forcing the move to OpenCores.org R. Diez
  • Re: [OpenRISC] Subtly forcing the move to OpenCores.org Julius Baxter
  • Re: [OpenRISC] Subtly forcing the move to OpenCores.org Stefan Kristiansson
  • Re: [OpenRISC] Subtly forcing the move to OpenCores.org Fredrik Bruhn
  • Re: [OpenRISC] Subtly forcing the move to OpenCores.org Jeremy Bennett
• [OpenRISC] [PATCH 0/3] Add support for Advanced Debug Interface franck . jullien
  • [OpenRISC] [PATCH 3/3] Add Altera Virtual JTAG target configuration franck . jullien
  • Re: [OpenRISC] [PATCH 3/3] Add Altera Virtual JTAG target configuration Stefan Kristiansson
  • [OpenRISC] [PATCH 2/3] Add OpenCores ADV_DEBUG_SYS support franck . jullien
  • Re: [OpenRISC] [PATCH 2/3] Add OpenCores ADV_DEBUG_SYS support Stefan Kristiansson
  • Re: [OpenRISC] [PATCH 1/3] Update of usb_blaster JTAG driver Stefan Kristiansson
  • Re: [OpenRISC] [PATCH 1/3] Update of usb_blaster JTAG driver Franck Jullien
  • Re: [OpenRISC] [PATCH 0/3] Add support for Advanced Debug Interface Julius Baxter
  • Re: [OpenRISC] [PATCH 0/3] Add support for Advanced Debug Interface Franck Jullien
• [OpenRISC] OpenOCD adv_debug_sys support Franck Jullien
  • Re: [OpenRISC] OpenOCD adv_debug_sys support Stefan Kristiansson
  • Re: [OpenRISC] OpenOCD adv_debug_sys support Ouabache Designworks
  • Re: [OpenRISC] OpenOCD adv_debug_sys support Stefan Kristiansson
  • Re: [OpenRISC] [Openrisc] OpenOCD adv_debug_sys support Jeremy Bennett
• [OpenRISC] OpenRISC tutorial Sven-Åke Andersson
  • Re: [OpenRISC] OpenRISC tutorial Dmytriy Grytsay
• [OpenRISC] How to write to a CPU register from within or1200_monitor.v R. Diez
  • Re: [OpenRISC] How to write to a CPU register from within or1200_monitor.v Ouabache Designworks
  • Re: [OpenRISC] How to write to a CPU register from within or1200_monitor.v Olof Kindgren
  • Re: [OpenRISC] How to write to a CPU register from within or1200_monitor.v Julius Baxter
  • Re: [OpenRISC] How to write to a CPU register from within or1200_monitor.v Olof Kindgren
  • Re: [OpenRISC] How to write to a CPU register from within or1200_monitor.v Julius Baxter
• [OpenRISC] svn vs. git Peter Gavin
  • Re: [OpenRISC] svn vs. git R. Diez
  • Re: [OpenRISC] svn vs. git Olof Kindgren
  • Re: [OpenRISC] [Openrisc] svn vs. git Thomas Suckow
  • Re: [OpenRISC] svn vs. git Jeremy Bennett
  • Re: [OpenRISC] svn vs. git Jeremy Bennett
  • Re: [OpenRISC] svn vs. git Julius Baxter
  • Re: [OpenRISC] svn vs. git Jeremy Bennett
  • Re: [OpenRISC] svn vs. git Julius Baxter
  • Re: [OpenRISC] svn vs. git Ouabache Designworks
  • Re: [OpenRISC] svn vs. git Olof Kindgren
• [OpenRISC] adv_jtag_bridge not work with Xilinx Platform Cable USB II Dmytriy Grytsay
• [OpenRISC] How to get the number of clock ticks in the ORPSoCV2 test bench R. Diez
  • Re: [OpenRISC] How to get the number of clock ticks in the ORPSoCV2 test bench Olof Kindgren
• [OpenRISC] SIGBUS when trying to boot Linux on Atlys Moritz Fischer
  • Re: [OpenRISC] SIGBUS when trying to boot Linux on Atlys Jonas Bonn
  • Re: [OpenRISC] SIGBUS when trying to boot Linux on Atlys Stefan Kristiansson
• [OpenRISC] Lint warnings in ORPSoCV2 R. Diez
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Olof Kindgren
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Julius Baxter
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 R. Diez
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Olof Kindgren
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Ouabache Designworks
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Julius Baxter
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Olof Kindgren
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 R. Diez
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Olof Kindgren
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Julius Baxter
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Olof Kindgren
  • Re: [OpenRISC] Lint warnings in ORPSoCV2 Julius Baxter
  • Re: [OpenRISC] [Openrisc] Lint warnings in ORPSoCV2 Stefan Kristiansson
• [OpenRISC] Suggestion to change the default memory type to "exitnops" in or1ksim R. Diez
• [OpenRISC] How to clear the BSS section on start-up R. Diez
  • Re: [OpenRISC] How to clear the BSS section on start-up Jeremy Bennett
  • Re: [OpenRISC] How to clear the BSS section on start-up R. Diez
• [OpenRISC] Patch R. Diez
  • Re: [OpenRISC] Patch Jeremy Bennett
  • Re: [OpenRISC] Patch Matthew Hicks
  • Re: [OpenRISC] Patch Stefan Kristiansson
  • Re: [OpenRISC] Patch Matthew Hicks
• [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite R. Diez
  • Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite Jeremy Bennett
  • Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite R. Diez
  • Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite Jeremy Bennett
  • Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite Stefan Kristiansson
  • Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite Jeremy Bennett
• [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Julius Baxter
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Julius Baxter
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Olof Kindgren
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jeremy Bennett
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Joern Rennecke
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Julius Baxter
  • Re: [OpenRISC] [Openrisc] Minor clarifications about R0 in the architecture specification Richard Herveille
  • Re: [OpenRISC] [Openrisc] Minor clarifications about R0 in the architecture specification Ouabache Designworks
  • Re: [OpenRISC] [Openrisc] Minor clarifications about R0 in the architecture specification Olof Kindgren
  • Re: [OpenRISC] [Openrisc] Minor clarifications about R0 in the architecture specification Julius Baxter
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Julius Baxter
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Matthew Hicks
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Julius Baxter
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Matthew Hicks
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Matthew Hicks
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
  • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Matthew Hicks

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