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• • Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
• [OpenRISC] Problems in the build toolchain kruger
  • Re: [OpenRISC] Problems in the build toolchain Jeremy Bennett
  • Re: [OpenRISC] Problems in the build toolchain Dmytriy Grytsay
• [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation R. Diez
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Stefan Kristiansson
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jeremy Bennett
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jonas Bonn
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jonas Bonn
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Stefan Kristiansson
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jeremy Bennett
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jeremy Bennett
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation R. Diez
  • Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Julius Baxter
  • [OpenRISC] Patch to make ORPSoCV2 stop on test case errors R. Diez
  • Re: [OpenRISC] Patch to make ORPSoCV2 stop on test case errors Julius Baxter
  • Re: [OpenRISC] Patch to make ORPSoCV2 stop on test case errors R. Diez
  • [OpenRISC] or1ksim should not initialise the CPU registers to zero R. Diez
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Matthew Hicks
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero R. Diez
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero R. Diez
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero R. Diez
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Julius Baxter
  • Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Olof Kindgren
  • Re: [OpenRISC] [Openrisc] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
• [OpenRISC] Patch to fix Verilator warning "Signal is not driven: result_cust5" R. Diez
  • Re: [OpenRISC] Patch to fix Verilator warning "Signal is not driven: result_cust5" Julius Baxter
• [OpenRISC] Build order and other issues with or1ksim R. Diez
  • Re: [OpenRISC] Build order and other issues with or1ksim Jeremy Bennett
  • Re: [OpenRISC] Build order and other issues with or1ksim R. Diez
  • Re: [OpenRISC] Build order and other issues with or1ksim Jeremy Bennett
  • Re: [OpenRISC] Build order and other issues with or1ksim R. Diez
• [OpenRISC] openOCD question Franck Jullien
  • Re: [OpenRISC] openOCD question Julius Baxter
  • Re: [OpenRISC] openOCD question Ouabache Designworks
  • Re: [OpenRISC] openOCD question Ouabache Designworks
  • Re: [OpenRISC] openOCD question Franck Jullien
• [OpenRISC] Anonymous Subversion check-out only for the OpenRISC repository R. Diez
• [OpenRISC] Test suite strategy R. Diez
  • Re: [OpenRISC] Test suite strategy Matthew Hicks
  • Re: [OpenRISC] Test suite strategy Julius Baxter
  • Re: [OpenRISC] Test suite strategy Ouabache Designworks
  • Re: [OpenRISC] Test suite strategy Jeremy Bennett
• [OpenRISC] Cannot build GDB 7.2 under Cygwin R. Diez
  • Re: [OpenRISC] Cannot build GDB 7.2 under Cygwin Julius Baxter
  • Re: [OpenRISC] Cannot build GDB 7.2 under Cygwin R. Diez
  • Re: [OpenRISC] Cannot build GDB 7.2 under Cygwin Jeremy Bennett
• [OpenRISC] Pratical FPGA programming with OpenRISC at OSHUG, London 29 March Jeremy Bennett
• [OpenRISC] [Fwd: Re: [Openrisc] toolchain] Marcus Erlandsson
• [OpenRISC] [Patch] l.lws support patch Jeppe Græsdal Johansen
  • Re: [OpenRISC] [Patch] l.lws support patch Stefan Kristiansson
  • Re: [OpenRISC] [Patch] l.lws support patch Stefan Kristiansson
• Re: [OpenRISC] [Openrisc] toolchain + new JTAG debugger Fredrik Bruhn
  • Re: [OpenRISC] [Openrisc] toolchain + new JTAG debugger Olof Kindgren
• [OpenRISC] toolchain Peter Gavin
  • Re: [OpenRISC] toolchain Julius Baxter
  • Re: [OpenRISC] toolchain Peter Gavin
  • Re: [OpenRISC] toolchain Julius Baxter
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
  • Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
  • Re: [OpenRISC] [Openrisc] toolchain Olof Kindgren
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Marcus Erlandsson
  • Re: [OpenRISC] [Openrisc] toolchain BAKIRI
  • Re: [OpenRISC] [Openrisc] toolchain BAKIRI
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Marcus Erlandsson
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain R. Diez
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Giuseppe Scrivano
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Olof Kindgren
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Olof Kindgren
  • Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Marcus Erlandsson
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Peter Gavin
  • Re: [OpenRISC] [Openrisc] toolchain Peter Gavin
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
  • Re: [OpenRISC] toolchain Julius Baxter
  • Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• Re: [OpenRISC] A typo error on latest openrisc_arch_draft.odt XueBrian
• [OpenRISC] Another OpenOCD bug? Steve Battazzo
  • Re: [OpenRISC] Another OpenOCD bug? Jeppe Græsdal Johansen
  • Re: [OpenRISC] Another OpenOCD bug? Julius Baxter
• [OpenRISC] The rtl-tests target in ORPSoC always indicates success (with a zero exit code), even if all tests faill R. Diez
  • Re: [OpenRISC] The rtl-tests target in ORPSoC always indicates success (with a zero exit code), even if all tests faill Ouabache Designworks
  • Re: [OpenRISC] The rtl-tests target in ORPSoC always indicates success (with a zero exit code), even if all tests faill Olof Kindgren
• Re: [OpenRISC] Change bugurl to bugzilla Olof Kindgren
• Re: [OpenRISC] or1200_wb_biu question Olof Kindgren
• [OpenRISC] Add 2 byte to align Ethernet IP header Stefan Strålsjö
  • Re: [OpenRISC] Add 2 byte to align Ethernet IP header Olof Kindgren
• Re: [OpenRISC] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Stefan Kristiansson
  • Re: [OpenRISC] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Jason Zheng
  • Re: [OpenRISC] [Openrisc] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Olof Kindgren
  • Re: [OpenRISC] [Openrisc] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Jason Zheng
  • Re: [OpenRISC] [Openrisc] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Olof Kindgren
  • Re: [OpenRISC] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Stefan Kristiansson
• [OpenRISC] [PATCH] Remove unused register ic_inv_q Olof Kindgren
  • Re: [OpenRISC] [PATCH] Remove unused register ic_inv_q Julius Baxter
  • Re: [OpenRISC] [PATCH] Remove unused register ic_inv_q Olof Kindgren
• [OpenRISC] [PATCH] retry_cnt is not used when OR1200_WB_RETRY is undefined Olof Kindgren
  • Re: [OpenRISC] [PATCH] retry_cnt is not used when OR1200_WB_RETRY is undefined Julius Baxter
  • Re: [OpenRISC] [PATCH] retry_cnt is not used when OR1200_WB_RETRY is undefined Olof Kindgren
• [OpenRISC] [PATCH] Convert static wires to localparam Olof Kindgren
  • Re: [OpenRISC] [PATCH] Convert static wires to localparam Julius Baxter
  • Re: [OpenRISC] [PATCH] Convert static wires to localparam Olof Kindgren
• [OpenRISC] [PATCH] Fix implicit integer widths Olof Kindgren
  • Re: [OpenRISC] [PATCH] Fix implicit integer widths Stefan Kristiansson
  • Re: [OpenRISC] [PATCH] Fix implicit integer widths Olof Kindgren
  • Re: [OpenRISC] [PATCH] Fix implicit integer widths Ouabache Designworks
  • Re: [OpenRISC] [PATCH] Fix implicit integer widths Olof Kindgren
  • Re: [OpenRISC] [PATCH] Fix implicit integer widths Pekon Gupta
  • Re: [OpenRISC] [PATCH] Fix implicit integer widths Julius Baxter
  • Re: [OpenRISC] [PATCH] Fix implicit integer widths Olof Kindgren
• [OpenRISC] Propose new SVN contributor Anantha Jeremy Bennett
  • Re: [OpenRISC] Propose new SVN contributor Anantha Julius Baxter
  • Re: [OpenRISC] Propose new SVN contributor Anantha Jeremy Bennett
  • Re: [OpenRISC] Propose new SVN contributor Anantha Olof Kindgren
• [OpenRISC] [PATCH] Allow setting boot address as a parameter Olof Kindgren
  • Re: [OpenRISC] [Openrisc] [PATCH] Allow setting boot address as a parameter Julius Baxter
  • Re: [OpenRISC] [Openrisc] [PATCH] Allow setting boot address as a parameter Olof Kindgren
• [OpenRISC] [PATCH] Add ordb2a libgloss port Olof Kindgren
  • Re: [OpenRISC] [PATCH] Add ordb2a libgloss port Julius Baxter
  • Re: [OpenRISC] [PATCH] Add ordb2a libgloss port Olof Kindgren
  • Re: [OpenRISC] [PATCH] Add ordb2a libgloss port Olof Kindgren
• [OpenRISC] status of OpenRISC MP Emilio G. Cota
• Re: [OpenRISC] newlib Gnu toolchain for openrisc 1200 Jeremy Bennett
  • Re: [OpenRISC] newlib Gnu toolchain for openrisc 1200 Julius Baxter
• [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
  • Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Ouabache Designworks
  • Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
  • Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Matthew Hicks
  • Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Ouabache Designworks
  • Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Matthew Hicks
  • Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Julius Baxter
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Pekon Gupta
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Pekon Gupta
  • Re: [OpenRISC] Architecture update - Exception Vector Base Address R. Diez
  • Re: [OpenRISC] Architecture update - Exception Vector Base Address Matthew Hicks
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Pekon Gupta
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Julius Baxter
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Pekon Gupta
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Iztok Jeras
  • Re: [OpenRISC] [Openrisc] [RFC] Architecture update - Exception Vector Base Address Julius Baxter
• [OpenRISC] Make GCC emit correct immediates for unsigned, sign-extended values Julius Baxter
  • Re: [OpenRISC] [Openrisc] Make GCC emit correct immediates for unsigned, sign-extended values Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] Make GCC emit correct immediates for unsigned, sign-extended values Joern Rennecke
• [OpenRISC] Wishbone reset signal handled asynchronously in most OpenRISC-related cores R. Diez
  • Re: [OpenRISC] Wishbone reset signal handled asynchronously in most OpenRISC-related cores Ouabache Designworks
• [OpenRISC] Help testing a script to mirror the OpenRISC Subversion repositories to Git repositories R. Diez
• [OpenRISC] [OPENOCD PATCH] or1k: Fix gcc 4.6.1 build failure (unused reg_cache_index) Stefan Kristiansson
  • Re: [OpenRISC] [Openrisc] [OPENOCD PATCH] or1k: Fix gcc 4.6.1 build failure (unused reg_cache_index) Julius Baxter
• [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository [email protected]
  • Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Ouabache Designworks
  • Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Olof Kindgren
  • Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Olof Kindgren
  • Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Julius Baxter
  • Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Olof Kindgren
  • Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Julius Baxter
  • Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Olof Kindgren
  • Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Jeremy Bennett
• [OpenRISC] Build binutils with gcc 4.6 Olof Kindgren
  • Re: [OpenRISC] Build binutils with gcc 4.6 Julius Baxter
  • Re: [OpenRISC] Build binutils with gcc 4.6 Olof Kindgren
  • Re: [OpenRISC] [Openrisc] Build binutils with gcc 4.6 Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] Build binutils with gcc 4.6 Jeremy Bennett
  • Re: [OpenRISC] [Openrisc] Build binutils with gcc 4.6 Olof Kindgren
• [OpenRISC] BSP with libgloss Franck JULLIEN
  • Re: [OpenRISC] BSP with libgloss Stefan Kristiansson
  • Re: [OpenRISC] BSP with libgloss Franck JULLIEN
  • Re: [OpenRISC] BSP with libgloss Julius Baxter
• [OpenRISC] [PATCH] adv_jtag_bridge: scan sld nodes to find the virtual jtag Franck JULLIEN
• [OpenRISC] First version of my Ethernet DPI module for Verilator R. Diez
  • Re: [OpenRISC] First version of my Ethernet DPI module for Verilator Olof Kindgren
• [OpenRISC] adv_jtag_bridge Franck JULLIEN
  • Re: [OpenRISC] adv_jtag_bridge Stefan Kristiansson

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