reliable and much more functional. Putting NV cache
in a drive is really stupid - it costs more and makes drive less reliable.
Its just like the stupid AV commands - it makes a drive more complex and
less reliable just to avoid putting some extra memory in the DVR.
--
Hale Landis -- [EMAIL
and connectors so that there are no
external ports that can be used by modern external storage devices.
:)
Hale
--
++ Hale Landis ++ [EMAIL PROTECTED] ++
external/portable storage
device into any system and have access to my software and my data. And
please don't tell me that I should expect to use these stupid internet
application sites to store/access my data. But none of this has anything
to do with T13 or SATA-IO, does it?
Hale
--
++ Hale
, a network MAC address, etc. If it was licensed to
a person then it should not matter what platform the person runs the s/w
on - desktop, notebook, PDA, cell phone, etc, and it should not matter if
the s/w is moved from one platform to another during the life time of the
license.
--
Hale Landis -- [EMAIL
useful.
Why is an external SATA (aka eSATA?) any different than an external USB or
1394 hard disk drive?
--
Hale Landis -- [EMAIL PROTECTED]
that are in the
NV cache? Will those sectors also be updated on the media?
3) Will drives have a jumper that will enable/disable this extreme threat
to data integrity?
Hale
--
Hale Landis -- [EMAIL PROTECTED]
This message is from the T13 list server.
Please note that the term key sector is used in annex C but it is not
defined in section 8.
And as someone else here noted: Isn't 'Section 8' military lingo for a
discharge due to insanity???
Hale
--
Hale Landis -- [EMAIL PROTECTED]
This message is from the T13 list server.
I see that in some normal output and error output tables in ATA-8, the
Status register seems to have bits 15:8. Has the Status register been
expaned to have an additional 8 bits (bits 15:8) that are currently
reserved?
Hale
--
Hale Landis -- [EMAIL
are they? How are the accessed? Do they exist for PATA? Do
they exist for SATA? Are they part of a 'feature'?
Hale
--
Hale Landis -- [EMAIL PROTECTED]
?) of the ATA registers).
* Thoughout 8.x it seems that the term segment access was not changed to
write same?
--
Hale Landis -- [EMAIL PROTECTED]
present can support anything higher
than PIO mode 2).
Hale
--
++ Hale Landis ++ [EMAIL PROTECTED] ++
not being useful any more for SATA.
Hale
--
Hale Landis -- [EMAIL PROTECTED]
in the PACKET PIO command
protocol with sigificant backward compatibility problems for hosts that
use PIO data transfers.
Of course we all understand that the BCL and BC are not used when PACKET
commands use DMA for data transfer... right?
Hale
--
++ Hale Landis ++ [EMAIL PROTECTED] ++
was in 8-bit PIO data
transfer mode. It is unlikely that you will find any ATA devices (other
than CF devices) that implement 8-bit PIO data transfers.
Hale
--
Hale Landis -- [EMAIL PROTECTED]
of n*256 reads or writes when not in 8-bit mode). b) ALL
DMA transfers (MultiWord DMA or UltraDMA) are done in 16-bit mode using
DD15:0 (even when PIO transfers are done in 8-bit mode). See the CF
specification available at www.compactflash.org.
Hale
--
++ Hale Landis ++ [EMAIL PROTECTED] ++
correction or confirmation? Thank you!
See the READ/WRITE DMA QUEUED commands - except for the difference of
LBA28 or LBA48 the commands are the same as READ/WRITE DMA QUEUED EXT.
Hale
--
++ Hale Landis ++ [EMAIL PROTECTED] ++
, again the READ (and WRITE) DMA QUEUED EXT command descriptions have
a number of incorrect statements. Again use the R/W DMA QUEUED command
descriptions (in both ATA/ATAPI-6 and ATA/ATAPI-7).
Hale
--
++ Hale Landis ++ [EMAIL PROTECTED] ++
commands. Also see the NOP command description.
=== end History of NOP
There IS mention of support for CFA where the DATA register is only
8-bits
That is a different issue and unrelated and/or not related to the NOP
command.
--
Hale Landis -- [EMAIL PROTECTED]
.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
simple and easy procedures to replace the drive's firmware or
simple and easy access to the drive's internal data (like the zone and
spare tables)?
--
++ Hale Landis ++ www.ata-atapi.com ++
thing that needs to be added.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
SATA is not an thing that is
defined by an open standards process.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
order at any time by host or device? If that is so
then why is there an Annex J in ATA/ATAPI-7?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
devices. Hosts and devics using
SATA to transport random and 'non-standard' packets should also not use
the ATA name).
--
++ Hale Landis ++ www.ata-atapi.com ++
attempt to 'force' the ATAPI people out of T13 (and SATAIO?)
and make them move to other interfaces (like USB) by restricting what
they can implement?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
. This
doesn't sound like a big deal to me. Unless there is something hidden in
the SATA command protocols that prohibits ATAPI NCQ (and if so, how did
that happen?).
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
of this sort of
uncoordinated information).
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
Unload feature should I expect the drive will also support the
Unload feature when the 95H IDLE IMMEDIATE command code is used?
Private or public responses welcome.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
take appropriate action).
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
blocks (For PACKET PIO the number of interrupts is also the
number of DRQ data blocks [note: the command packet is not a data block]).
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
to erase all
the data on a disk - most don't use the SECURITY ERASE command.
Here is a link to one of these programs- DBAN -
http://dban.sourceforge.net/
At the bottom of this page there is a good set of links to similar
products. Parts of the DBAN FAQ is interesting too.
Hale
--
++ Hale
since write cache is used for the corresponding write
cache feature.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
possible to disable the read
look ahead part of some more complex read caching algorithm?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
designed data caching algorithm.
I think if you really intend that a disk drive separate read ahead
from a more robust read caching algorithm then you need to have a
serious conversation with some of the people that design and implement
these algorithms in disk drives.
Hale
--
++ Hale Landis
supports
read cache there is no way to disable that feature. So even if you
disabled read look ahead that would not force unit access.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
probably be very
ineffective is used in this manner.
Users are far more likely to want to disable read-ahead, than to disable
read caching.
Users? Explain please... Application program? File system? I/O driver?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
depends
on how clever the io scheduler is.
Absolutely true (note that he said I/O SCHEDULER).
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
no matter what the actual cache
implementation is.
Hale
*** Hale Landis *** www.ata-atapi.com ***
happened with SATA?
Resolve this problem by admitting that SATA is not ATA. Leave PATA
alone. Let SATA move forward on its own. Stop corrupting the description
of PATA with things from SATA.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
if the more correct name should be Enable/Disable Read
Cache?
Hale
*** Hale Landis *** www.ata-atapi.com ***
--
++ Hale Landis ++ www.ata-atapi.com ++
and protect data. The goal is to extend the
lifetime of a disk drive and protect data before a drive becomes
inaccessible.
What happened to SMART?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
to
publish the parallel ATA standards (why?) or disband T13. Or maybe T13
should take a new direction and publish only standards for how interface
emulations and conversions operate?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
/ATAPI-7 because the only valid description of serial ATA comes
from the SATA secret society under NDA. ATA/ATAPI-7 should not be
considered a valid description of serial ATA.
--
++ Hale Landis ++ www.ata-atapi.com ++
the host can store metadata associated
with each sector on the disk - expand the basic sector size by 32 or 64
bytes for the metadata and define new commands to access the metadata.
(This would probebly be of more value to more people than that stupid NV
cache thing.)
Hale
--
++ Hale Landis
- inside a disk drive must be the most cost ineffective way to do
this. I'm curious... Did Intel reject the idea of adding this to a
motherboard? Is that why this proposal is now at T13?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
probably need one
to figure out what is really going on.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
talk about it in public.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
--
++ Hale Landis ++ www.ata-atapi.com ++
societies.
Why continue this misrepresentation of how the ATA standards are developed?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
integrity problem.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
is not changeable in the field
So, a DCO to change it would be prohibited.
There would be no data integrity issue due to changing the alignment.
We all know this will become a DCO changeable value.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
. ??? At the minimum the text description for
this bit does not match the table description of this bit.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
it to the same value as ID word 82 bit 10 (as implied
by the text description)?
Note that ID word 85 bit 10 is not described in the general description
of the HPA feature in section 6.x of the document.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
of ATA without
addressing these problems is unacceptable.]
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
This message is from the T13 list server.
Thomas Jansen wrote:
This message is from the T13 list server.
Not as far as I understand the standard. The drive will only accept the
Security Erase command when either the master or user password is supplied.
Thomas is correct.
--
++ Hale Landis
does that serve?
--
++ Hale Landis ++ www.ata-atapi.com ++
that there is a market for it.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
command protocol and rules, but that is no
reason to add such a confusing SET FEATURES subcommand to the
standard.
Hale
*** Hale Landis *** www.ata-atapi.com ***
... so... BSY=0 DRQ=1 ERR=1 is not a legal
status for a device, even in ATA/ATAPI-4.
Hale
*** Hale Landis *** www.ata-atapi.com ***
(especially random
and undetected errors that frequently result in data corruption).
Maybe it is time for T13 to give up and go away and let some
other organization take over?]
Hale
*** Hale Landis *** www.ata-atapi.com ***
perform the SRST protocol -
just think of the mess that would happen if the other device on the
PATA interface was an ATA device that did the SRST while the ATAPI
device did not do the SRST.
Hale
*** Hale Landis *** www.ata-atapi.com ***
data?
c) If these new words are defined then why not define bits for
each of the features that exist (such as 8-bit data transfer,
read cache, etc)?
Hale
*** Hale Landis *** www.ata-atapi.com ***
another bit in the PACKET
Features register) to say use new style TCQ (NCQ?)?
Does this first require action/approval of the SATA secret society
before T13 can discuss it?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
(technically, all this old O/Q stuff
should be made obsolete).
BTW... Where are the new queuing commands currently documented? Still in
a secret society doc or some doc that is public?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
for this (new version of the PACKET
command, or new options of the PACKET command)? Is there a definition
of new style queuing (NCQ?) for SATA ATAPI? If not, why not?
Hale
*** Hale Landis *** www.ata-atapi.com ***
this that make people say
SATA is unreliable. This is bad... this is really bad.
BTW the system and the two drives have been running with no errors for 3
days since this problem happened and then magically disappeared.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
*** Hale Landis *** www.ata-atapi.com ***
This message is from the T13 list server.
In clause 5.15 Signature and persistence and the sub-clauses, the
value in the Device register should be changed...
In 5.15.1
00h should be changed to y0y0b
(where y is obsolete)
In 5.15.2
000xb should be changed to y0yxb
(where y
of the clase:
A device shall not enter the interupt pending state when the
device status has the BSY bit set to one.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
and will remain set to 1 until
the next command or a reset is issued.
So after all the text you put down you
appear to be concerned about the validity of BSY=0 DRQ=1 and ERR=1?
Please help us focus here.
Does this help?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
interrupt processing
overhead - by the time the x86 reads the Status register it has BSY=0.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
):
NOTE - The BSY bit may be set to one and then cleared to zero
so quickly, that host detection of the BSY bit being set to
one is not certain.
What more needs to be said?
Hale
*** Hale Landis *** www.ata-atapi.com ***
to see the change in the ERR
bit value.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
are only
talking about PATA. SATA is a different interface that does not
conform to some of the most basic PATA rules and traditions - SATA is
mis-named - it really isn't ATA and it should not be documented in
the same standard with PATA - ATA/ATAPI-7 is a major %*$% by T13.
Hale
*** Hale Landis
don't care what you do with SATA)?
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
. ATAPI devices are
the biggest offenders here.
This would be a complete violation of the PATA PACKET command protocol.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
--
++ Hale Landis ++ www.ata-atapi.com ++
to CAM ATA, ATA-1, even SFF-8020). I do not understand why
ATAPI device designers and manufacturers are allow to get away with
this crap - especially after 8+ years.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
This message is from the T13 list server.
Gary Laatsch wrote:
This message is from the T13 list server.
I guess you have seen what I have seen and you will probably get an
explanation from Hale on how ATA really works (from the spec side), but
some of us have seen the real world where devices
This message is from the T13 list server.
Gary Laatsch wrote:
HUH, SAY WHAT? youself. If you are tired of explaining to us how ATA
works, then stop. Of course, you would probably never post anything again.
I love poeple who rather than send a private email asking for
clarification try to
this helps.
Hale
--
++ Hale Landis ++ www.ata-atapi.com ++
this time the host shall not change the
state of the CSx- and DAx signals. It is true that the host shall not
assert DMACK- until after it sees DMARQ asserted and that when it
asserts DMACK- it shall also deassert the CSx- signals.
Hale
*** Hale Landis *** www.ata-atapi.com ***
how this wouldn't already be unique...
To date I have never seen an ATAPI CD/DVD device that has a serial
number.
Hale
*** Hale Landis *** www.ata-atapi.com ***
noticed a serial
number returned in the SCSI INQUIRY data either.
Hale
*** Hale Landis *** www.ata-atapi.com ***
be
surprised how many people don't understand this relationship between
READ/WRITE SECTORS and READ/WRITE MULTIPLE.)
Hale
*** Hale Landis *** www.ata-atapi.com ***
host side state diagrams.
Hale
*** Hale Landis *** www.ata-atapi.com ***
messing it up in ATA/ATAPI-7, why continue messing it up
in whatever comes next? T13 should let parallel ATA end with
ATA/ATAPI-6, withdraw the ATA/ATAPI-7 parallel ATA mess, and move on
to whatever is the new, non-parallel thing.
Hale
*** Hale Landis *** www.ata-atapi.com ***
- some hosts pull it high, some hosts pull it low - some hosts
are level triggered and some are edge triggered - none of this
effects how the ATA interface operates - these are just internal host
design issues.
Hale
*** Hale Landis *** www.ata-atapi.com ***
tranfer command, the device
must have status of BSY=0 DRQ=1 and the device must NOT be in 8-bit
PIO data transfer mode (see the SET FEATURES FR=01H and FR=81H
commands).
Hale
*** Hale Landis *** www.ata-atapi.com ***
of the Mississippi river (Thursdays and Friday are
babyback ribs), Doug and Glenda Neblett are retiring and have
sold the property to the adjacent Subaru dealership.
Hale
*** Hale Landis *** www.ata-atapi.com ***
lookup - not a
failure of the browser to understand and display the data.
Hale
*** Hale Landis *** www.ata-atapi.com ***
).
Hale
*** Hale Landis *** www.ata-atapi.com ***
This message is from the T13 list server.
I wonder what Jim Hatfield is trying to say that is so bad it gets
blocked a spam or a virus?
:)
Hale
*** Hale Landis *** www.ata-atapi.com ***
.5.3.2 - there is a
recommendation that a burst should not be more than 131072 bytes.
Hale
*** Hale Landis *** www.ata-atapi.com ***
is ((BAR40xfffeH)+8)
4) If you must use interrupts, and you must if you want to use DMA
commands, then have fun figuring that out (PIC/APIC?, what is IRQ to
INT mapping? etc?).
Enjoy.
Hale
*** Hale Landis *** www.ata-atapi.com ***
there is to know about APIC and I hope to talk to him
this week. But if anyone can point us (Pat, me, everyone) to any
good doc on APIC and the BIOS support for APIC that would be
really great!
Hale
*** Hale Landis *** www.ata-atapi.com ***
? In particular, devices which lack INTRQ can
be read and written via DMA, except that errors then appear as timeouts,
recovered by reset?
See the T13 Host Controller standard, especially the descriptions of
the controller's Start/Stop bit, the Active bit and the Interrupt
bit.
Hale
*** Hale Landis
ask the
BIOS what is going on. Clearly an OS must determinet this stuff at
startup. I just haven't had time but I figure if I find the Linux
kernel startup stuff I might find out how they do it.
Hale
*** Hale Landis *** www.ata-atapi.com ***
tradition conflict
with Win ME/ 9X here?
Why do you ask? Do you see differences in these OS?
Hale
*** Hale Landis *** www.ata-atapi.com ***
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