Bill,
You've hit the nail on the head.
I've used Protel since 1987, I've also used Mentor.
I was influential in converting my current company from using Mentor to
using Protel.
Simply because, for our kind of work, Protel was more intuitive, faster,
and the designer could focus on designing the
PROTECTED]
Sent: Wednesday, 10 March 2004 12:19 PM
To: Protel EDA Forum
Subject: Re: [PEDA] 2004 DXP Looks Great,
On 12:16 PM 10/03/2004, DUTTON Phil said:
Bill,
My DXP is still in
the box.
..snip..
There are some
good things in DXP, but there are many features that really don't seem
to help my
Hello Dom,
Just put a fill on the solder mask layer.
You can do this in a footprint library part if you like as well.
regards,
Phil.
-Original Message-
From: Dom Bragge [mailto:[EMAIL PROTECTED]
Sent: Thursday, 29 January 2004 3:53 PM
To: protel
Subject: [PEDA] TO-220 4th pin?
I just
Hello Dom,
I usually turn off the acute angle check.
As you state, you will get an error wherever any primitive in the
crosshatch construction meets another primitive at less than 90 deg. For
example, whenever a horizontal or vertical hatch meets a chamfered
corner of a polygon.
regards,
Phil.
Hello,
I'm having a schematic problem with 99SE SP6.
Unexpectedly, and with no input on my part, all of my ports have changed
length to suit the text that they contain and can no longer be edited by
dragging or otherwise to alter their length.
Has anyone come across this and found a solution?
(I
-
From: DUTTON Phil [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 07, 2004 2:04 AM
To: Protel EDA Forum
Subject: [PEDA] Problems with ports
Hello,
I'm having a schematic problem with 99SE SP6.
Unexpectedly, and with no input on my part, all of my ports
have changed length to suit
Hello Tom,
Yes. In fact, I would recommend it. The thin sliver of solder mask that you may be
able to achieve in between the pads of such devices tends to break away anyway and
becomes a problem.
regards,
Phil.
C.I.D.
-Original Message-
From: Tom Robinson [mailto:[EMAIL PROTECTED]
This is very good practice. I do exactly the same thing.
You can set up your printing not to print the ERC directive markers.
It provides a very robust check for unintentionally unconnected pins.
I also keep the autojunction turned on, but that does mean that I have
to be careful not to run wires
Hello,
Is there a way of importing pin assignments into a schematic library part?
Perhaps by using a text file.
(Rather than typing in all 1508 pins.)
regards,
Phil.
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this
Hello Mark,
Under the 'fat arrow' in the top left of the toolbar, select 'design
utilities'.
You can manually select to compress the database, or set it to compress
on closing.
regards,
Phil.
-Original Message-
From: Mark Iams-McGuire [mailto:[EMAIL PROTECTED]
Sent: Monday, 17 March
Hello Ian,
You may also like to try;
Entech Printed Circuits
[EMAIL PROTECTED]
East Coast Circuits
[EMAIL PROTECTED]
regards,
Phil
-Original Message-
From: Ian Capps [mailto:[EMAIL PROTECTED]]
Sent: Friday, 7 February 2003 12:35 PM
To: Protel EDA Forum
Subject: [PEDA] Aus PCBs
This
Hello Dave,
I usually don't use the autorouter, but have seen this occur when the keepout layer is
not correctly defined. More of a keep-in approach with an outline on the 'keepout'
layer defining the area in which the autorouter can work.
I think that arcs and gaps can be a problem.
regards,
tried everything I can think of. I may need to start the pcb layout again.
Dave Sanders
-Original Message-
From: DUTTON Phil [mailto:[EMAIL PROTECTED]]
Sent: Thursday, December 05, 2002 12:14 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Unable to Initialize
Hello Dave,
I usually don't
Hello,
No, there is no automated way within Protel.
I usually do a manual scan with just the copper layer, solder mask and overlay turned
on.
I also include a note on the master (fab) drawing allowing the cropping of legend
0.010 from solderable pads.
As has been mentioned, most shops do this
Hello Matt,
Fiducials are visual alignment marks used by placement machines to locate the board
and fine pitch components.
I've seen these in the form of hashes '#' or simple 1mm dia copper pads (no hole) with
a 3mm dia clearance in the solder mask.
It's important that there are no other
Hello Alfonso,
Auto junctions can be a good time saver as long as you understand where Protel will
apply them.
I use them all the time.
Basically if a line touches a 'nodal point' of a pin - or other line then auto
junction will place a junction dot.
I've never had it happen with a clean
This looks a long way ahead of the original DOS Autotrax software.
I expect that it's only a name similarity.
Can't remember if it was 'Protel PCB' or 'AutoTrax' first (around 1986/87).
Ran it on an XT. Only top, bottom and 2 planes, handful of track and pad sizes, no
schematic editor and no
That's Autotrax. Protel PCB would have been 1986.
-Original Message-
From: Tony Karavidas [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, 11 September 2002 1:03 PM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] Protel clone on the way?!?!?!
Yeah, 1989. Red box, Protel Autotrax. (I still have
Hello Richard,
We regularly produce good assembly drawings from Protel.
What we do is as follows;
We have a sheet border on one of the Mechanical layers, and use this layer for all of
the assembly notes, item balloons etc. Company graphics are just lines and arcs,
created initially from a
Hello,
The IPC documents can be found at ipc.org
The IGES description, I don't know where.
regards,
Phil.
-Original Message-
From: ElectronTrade (info) [mailto:[EMAIL PROTECTED]]
Sent: Saturday, 17 August 2002 03:45
To: Protel EDA Forum
Subject: Re: [PEDA] CALS Compliant output
Hello,
Hello,
Has anyone produced CALS compliant output from Protel?
Preferably IGES, possibly IPC-350, IPC-356.
Is this in fact possible?
Any help is appreciated.
thanks,
Phil.
* Tracking #:
changed since then, but try searching for IGES TRANSLATOR at the
AutoDesk site
Dave Sanders
-Original Message-
From: DUTTON Phil [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, August 13, 2002 11:55 AM
To: Protel EDA Forum
Subject: [PEDA] CALS Compliant output
Hello,
Has anyone produced
Hello Rimas,
Any reason for 2oz Cu? (about 3mil)
I'm sure that this would be difficult to etch to 7mil wide (always some
sideways etching even with spray etching)
Assymettric stackup could be a problem as mentioned.
A 'standard' 6-layer stackup would be;
foil
6mil prepreg
20mil core
5mil
Something that may help you as well, would be to select to surround the
pads with octagons rather than arcs.
Phil.
We looked at it today Dave the mask layer would work except
we still need
to tie the copper to gnd. I think the best solution offered
might be using
a few different
http://dc.ipc.org/resources/tools.htm
This should help you.
regards,
Phil Dutton C.I.D.
-Original Message-
From: Thomas [mailto:[EMAIL PROTECTED]]
Sent: Friday, 26 July 2002 12:43
To: Protel Data Forum (E-mail)
Subject: [PEDA] TQFP footprint
Does anyone know a good source
Hello Michael,
Interesting article I came across some time ago that may be of some use to
you with respect to heatsinking.
I think that it was referenced on the IPC TechNet.
www.geocities.com/Heartland/Hills/5131/thermal.htm
Increased copper weight may help you as well.
Be aware of your PCB's
Hello Daniel,
I hope that you are being careful to not violate any non-disclosure
agreements here
I have used Protel to produce schematics and design boards for many years
and find it an excellent and fair priced tool for the intended job.
(occasional faults and problems along the way)
I'm
Hello Matt,
Make sure that your .bmp is in a known library location with your templates,
and when you insert it into your template file, insert it from that library
location.
If you have it in a 'project' directory for example, and open your design
from the 'recent edits' list, then Protel will
Hello Dennis,
(I feel your pain..)
When you placed the .bmp into your template file does it have the full
path back to the location of the source .bmp file. eg.
L:\Protel\Library\templates\TenixLogo.jpg, not just TenixLogo.jpg.
(we use a .jpg just because it's smaller)
Phil.
-Original
ok, we are pointing to a common network drive.
Standalone machine or from another network would not work.
In P98 we used to put the graphic in the same directory as the schematic
files and point to it without the drive path. This meant that each
project directory had a copy of the graphic.
I've
Hello Don,
I've actually put copy, paste, deselect and clear on my right mouse button
pop-up menu.
Also, tend to deselect-all before any large select operations.
regards,
Phil
(have a good and safe Easter over that side of the island)
-Original Message-
From: Don Ingram
I've missed some of this string.
Surely the new improved Protel is not dropping the .ddb?
We use it and have written Work instructions to cover using them.
Would not like to change tack again..
Phil.
-Original Message-
From: Igor Gmitrovic [mailto:[EMAIL PROTECTED]]
Sent: Monday,
, are there these or similar articles into
German somewhere in the web?
Harald
-Ursprüngliche Nachricht-
Von: DUTTON Phil [mailto:[EMAIL PROTECTED]]
Gesendet: Dienstag, 5. März 2002 04:58
An: 'Protel EDA Forum'
Betreff: Re: [PEDA] controlled impedance traces ?
Have a look
Have a look at UltraCAD's website. Lots of useful info and a calculator.
http://www.eskimo.com/~ultra/calc.htm
There is much to consider when designing high speed boards.
Find from your fab shop the layer spacing of the build that you are using.
distance above reference plane and track
Hello Ian,
Generally, from IPC-T-50, both PCB and PWB are subsets of the more generic
term Printed Board.
PWBs providing point to point wiring only, PCBs providing printed circuit
elements.
Printed Board Assembly, PBA, refers to the assembled board with all of its
components.
(although I've also
Hello Damon,
Just one example.
Our .ddb files contain essentially 3 plotted/configured drawings,
PB Assembly
Schematic
PB Master
I label the filename 'XXX_ABC.ddb'
The XXX is the document number of the PB assembly database.
The A is the issue status of the PB assembly, B is the Schematic and
Hello Colin,
Just left-click the track segment.
You will see 3 pick boxes/nodes on the 45 deg segment.
Left-click between any 2 boxes and you will be able to translate that
segment, maintaining it's length and angular qualities. (easier to do than
describe)
I hope that this achieves what you
Not a problem Colin,
No real difference if SMD or NSMD. Still need thermal relief for good
soldering characteristics.
Just that the SMD type pads tend to be larger. You'll start another
discussion on the pros and cons of SMD and NSMD pads for BGAs. There is
a view that the solder mask defined
Certainly, I believe that there is no need to thermally relieve a via.
The small length of track from the solder pad to the via will provide the
thermal relief without needing a relief on the power/ground plane for the
via.
In the case of a BGA where the power connections are grouped under the
There certainly is Cliff,
I have done this many times. Just create your symbol as with multiple parts
('add a part'in the library editor)like you would for multiple gates or
op-amp packages. When you place the parts on your schematic, pre-assign them
with designators so that an annotation pass
Hello Mike,
You need to have the routing layers that you want to use turned on.
Start placing the track from one of your pads, left click where you want to
change layers (to complete the track on your current layer), press the * key
on your numeric keypad (this will toggle to the next routing
Hello Ivan,
Just hit the '*' key and then one left click to place the via.
regards,
Phil
Phil Dutton C.I.D.
Senior CAD Technician
IPC Certified Interconnect Designer
Tenix Defence Pty Ltd
Electronic Systems Division
Second Avenue, Technology Park,
Mawson Lakes. SOUTH AUSTRALIA 5095
Is there any problem with 'A' compared to 'a' though?
Phil.
Phil Dutton C.I.D.
Senior CAD Technician
IPC Certified Interconnect Designer
Tenix Defence Systems Pty Ltd
Systems Division - Adelaide
Second Avenue, Technology Park,
Mawson Lakes. SOUTH AUSTRALIA 5095
Hello Mark,
I understand your problem. You can assign a width to a net with the 'Design
Rules'.
To be able to pick out a particular connection within the same net to assign
a different width (eg a 'sense' connection in a Power Supply you can use the
'from-to' editor.
Here, you can create a
Jim,
There are more than 1000 Certified Designers worldwide.
Personally, I'm proud to be one of them. As far as I know,it is the only
international qualification, recognising the baseline skills and knowledge
required to be a board designer.
Phil.
Phil Dutton C.I.D.
Senior CAD Technician
IPC
Hello Luo,
Yes, you should use planes. I have found no bug here.
A possibility, have a look under, 'Design', 'Layer Stack Manager'.
Check that you have assigned your nets to the planes correctly.
Phil.
Phil Dutton C.I.D.
Senior CAD Technician
IPC Certified Interconnect Designer
Tenix Defence
I think that you are correct with the 'Paste special' mode.
This has caught me in the past as well.
The way you have set up the planes should work fine.
I always only design '1-up'. I let the manufacturer create the panel array
to suit themselves using their Gerber CAM software. If I want a
Protel 'power planes' go forever.
I place primitives like tracks or area fills on the power planes to create
clearances.
Remember that primitives on power planes are 'anti-copper', and this will
also produce a warning when you run a drc.
I often also pull in the power planes more than the ground
You may be interested in an add-on utility that we have just bought, called
dCSM component / supplier management.
We tried out the beta release, and it looks ok.
www.aspiring-technology.com
is a good place to browse.
Allows you to have a part database, that you can pick your company part
number
names
Hi Phil,
Could you post a screen shot just to clarify?
Cheers
TC
-Original Message-
From: DUTTON Phil [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 22, 2001 10:53 PM
To: Multiple recipients of list proteledausers
Subject: RE: [PROTEL EDA USERS]: Component part names
Sorry
Well said,
My only problem with the Protel conversion errors, are that they are not
sensibly rounded off. For example, I've had hole sizes of 4mm turn into
3.mm.
(also listed separately to a 4.00mm hole)
I believe that the error at such a level is irrelevant if the result were
rounded off to
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