[PEDA] Job Hunting

2003-02-28 Thread Lloyd Good

Hi all,
I know some of you will recognize the name and it's been a while. I am no
longer at my old employer and am seeking something either in PCB design of
which I have 16 years experience or now I have recently added Solidworks 3D
CAD to my repertoire, which comes in handy for PCB integration into
packaging. I also have years of experience in manufacturing and customer
service as well as college instruction. If anyone knows of an opening I
would love to hear about it. I am willing to relocate for the right
opportunity. I am currently in Calgary, Alberta Canada. Please contact me
off forum at [EMAIL PROTECTED] for my cv or resume.

Kindest Regards,
Lloyd Good




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[PEDA] Protel 99SE license

2002-08-26 Thread Lloyd Good


Hello all,
I have a client that is looking for a Protel 99SE license. Does anyone have
one for sale. Please email me off-line at [EMAIL PROTECTED]

Thanks,

Lloyd Good
Circuit Creations
92 Holly Street NW
Calgary AB Canada
T2K 2C8
ph:  (403)282-6445
cell:(403)710-5077




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Re: [PEDA] negation character redux

2002-06-05 Thread lloyd . good


Mira,
I think that Net_names that are meaningful and continuous are much easier to
decipher and track. I hate using spaces in Net names due to the fact that
inevitably one of them is going to get an extra space in the name and won't
connect. These are almost impossible to spot and frustrating to fix. The
under_score is safe and esthetically pleasing way to show Net_names. In
large complex designs I like to know the function of the node as well as
it's label. ie. DATA_RST_EN = data reset enable
Regards,



   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Mira [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, June 05, 2002 4:50 AM
To: Protel EDA Forum
Subject: Re: [PEDA] negation character redux


Abd,
Net_names like this look awful on the schematic and
the printouts. Not recognizable at all.

Mira
--- Abd ulRahman Lomax [EMAIL PROTECTED] wrote:
 At 11:02 AM 6/4/2002 -0700, Bruce Walter wrote:
 Anybody know if there would be a problem using a
 dash (minus sign) as a
 prefix?
 
 I think it works, but as another mentioned, WR will
 be sorted in a 
 different place than -WR.
 
 Personally, I use an asterisk at the end, not
 because it is necessarily the 
 best way, but because it worked in other CAD systems
 and continues to work 
 with Protel. One could also use _not as a suffix,
 which would be totally 
 explicit. And if some program has trouble with
 underscore, shame on the 
 programmer!
 
 Unless you are going to use a program that has a
 trouble with backslash in 
 a net name, which is understandable, using single
 negation to create a bar 
 display is acceptable, but it likewise has the sort
 problem, or does it?
 
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Re: [PEDA] New to Protel and PCB Designing

2002-05-16 Thread lloyd . good

Waheed,
Get out now while you still have your sanity!!! Kidding.
Stay tuned to this forum, there is a wealth of knowledge and experience
here, though some topics turn us into a bunch of squabbling hens.
Before you get too deep into PCB design, the basic correlation between the
logical (schematics) and the physical (PCB) should be very clear. What you
can do in one realm is not always allowed in the other.
Hope you have fun in your endeavor. If you don't enjoy it, get out while you
still have hair because it'll make you pull yours out.

Cheers,



   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Waheed Bajwa [mailto:[EMAIL PROTECTED]]
Sent: Thursday, May 16, 2002 5:31 AM
To: Protel EDA Forum
Subject: [PEDA] New to Protel and PCB Designing


Hello all,

I am new to PCB designing and Protel (99 SE with SP 6)...  I have just
started on the training manuals of protel. I am getting the grasp of it but
what i have noticed during this period is that i lack the basic cycle flow
involved in PCB designing so please could some one guide me in this? The
cycles that are involved in PCB designing from conceptual to the realization
of PCB (as a material thing)... Please use simple terminologies or try to
explain them as I said that I am new to it and words even like footprints
dont make sense to me right now :(

Thanx,
Waheed Bajwa

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Re: [PEDA] Library Management Questions

2002-04-30 Thread lloyd . good

Daniel,
Library management is one of the most difficult things to successfully
organize, in my opinion.
I have experimented with several methods and company philosophies, however I
am of the firm believe that you don't need to have a redundant graphic
symbol for each and every physical component. One of the most important
things to maintain and apply strict rules to admissions is your company part
database. We rely on the Company part number for most of the intelligence on
a part entered in the approved part list.  When your APL is complete, your
designs will be. If you can incorporate a parametric search into the APL
database, you won't get designers/engineers entering in redundant parts.
The reason you need to have a comprehensive part data repository is to link
into the Design database.  I can here all the Users in the Forum groan at
the thought of this, but thanks to Ian Wilson and his Server, I can link my
design file to an excel file in under 30 seconds.

We are currently filling the 16 available data fields in the part attributes
with the data from the repository. We include things like Min/Max temps,
Power consumption, MTBF numbers and FOOTPRINTS. This alone saves countless
errors and look-up time.  Now I must admit, it does rely on the designer to
enter the correct company part number, but we have to trust them (including
myself) to do something right.

Now the question of multi-sequenced footprint pinouts, I have found that
this has no one definitive solution. What I have done for years and promote
is using the letters of the graphic symbol ie Transistors -E=emitter,B=base,
and C=collector; FETs G, S, D; Diodes A  K.  I assume this is what you mean
by item 6 in your questions. Being that these pin identities never change in
schematic, your schematic will always be correct regardless of package. I
always leave my PCB footprints assigned with numeric pad designations, so
when the PCB netlist loads the footprint assigned it will report that
although the component is found, the pad nodes are missing. This forces me
or whomever to look up on the  datasheet (which is linked in the APL
database) to manually change the numeric pad designators to the correct
alpha characters.  While some may say this too time consuming and mundane,
since adopting this procedure, I have never had a package pinout error in
that time.

As far as schematic and PCB footprint libraries go, if you don't standardize
entries at the very least, prepare for a nightmare. I believe that a single
library manager is always the best way to maintain consistency.
And no, I am not looking forward to DXP. 


Regards,



   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Daniel Webster [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, April 30, 2002 10:29 AM
To: 'Protel EDA Forum'
Cc: Tony Pearson
Subject: Re: [PEDA] Library Management Questions






Thanks for your time and help in this matter.


Daniel Webster
PCB Designer
Northern Airborne Technology
Phone: 250-763-2329 ext. 225







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Re: [PEDA] PADS translation error

2002-04-23 Thread lloyd . good

Mr. Lomax,
Thanks for the good idea. I opened the ASCII file and went to the error
lines, but still don't really know what the translator expects to see. The
format is not at all similar to Protel ASCII, but then I didn't expect it to
be either. I did learn the the version of PADS that created this is V3.5, I
suspect that the translator expects PowerPCB 2000 format. 
Has anyone had good results translating files from PADS 2000? 
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Abd ulRahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Monday, April 22, 2002 4:07 PM
To: Protel EDA Forum
Subject: Re: [PEDA] PADS translation error


At 03:26 PM 4/22/2002 -0400, [EMAIL PROTECTED] wrote:
Hi all,
I just tried to import a PADS ascii pcb and while some layers and fills
showed up, only two components came across. I received the following errors
in a report file
-Load Errors : 1612
-Expected number in line: 4518 at position 0 and found this: C10
-Expected number in line: 4519 at position 0 and found this: **CRLF**
-Expected number in line: 4519 at position 0 and found this: **CRLF**
-Expected integer in line: 4519 at position 32

My suggestion: look at line 4519 of the ASCII translation. (I'd 
consider using a text editor with line numbers or Excel to read the file

The ASCII format for CAD files is frequently more or less human-readable. 
(Protel's is even better, being very well documented within the file.)

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[PEDA] PADS translation error

2002-04-22 Thread lloyd . good

Hi all,
I just tried to import a PADS ascii pcb and while some layers and fills
showed up, only two components came across. I received the following errors
in a report file.

-Protel Design System: PADS PowerPCB To Protel 99 SE Translator Report
-PCB ASCII File : rwc016
-Date   : 22-Apr-2002
-Time   : 11:46:11


-Load Errors : 1612
-Expected number in line: 4518 at position 0 and found this: C10
-Expected number in line: 4519 at position 0 and found this: **CRLF**
-Expected number in line: 4519 at position 0 and found this: **CRLF**
-Expected integer in line: 4519 at position 32

Anyone seen this before and have any answers how to fix it.

Regards,



   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.

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Re: [PEDA] bug in protel bom generation?

2002-04-12 Thread lloyd . good

Tim and Brad,
The BOM generator in Protel only considers two fields when sorting, the Part
Type and the footprint. This has been a source of pain for me in the past,
as unless you indicate on the schematic in the part type there is a
difference (ie. 10K 1% vs 10K 5%) these parts will be grouped together as
one, whichever the sorter finds first.
If you ask Ian Wilson he has a Consolidated Partlist Server which I
commissioned last year, that works incredibly well I might add. 
This server is configurable and may well serve your purpose.
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Brad Velander [mailto:[EMAIL PROTECTED]]
Sent: Friday, April 12, 2002 10:56 AM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] bug in protel bom generation?


Tim,
the first source by which schematic symbols are consolidated is the
PartType field. I couldn't find any Protel documentation which defines the
criteria for consolidation in a BOM but I know it starts with the PartType
field. Don't you think that Protel could give the schematic BOM generation a
bit more then a brief paragraph description in either the online help or the
manual?

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com

Visit us at Booth 2G2-09 at CommunicAsia 2002 in Singapore June 18-21.


 -Original Message-
 From: Tim Fifield [mailto:[EMAIL PROTECTED]]
 Sent: Friday, April 12, 2002 9:34 AM
 To: Protel EDA Form
 Subject: [PEDA] bug in protel bom generation?
 
 
 When we generate a BOM in Protel format in P99SE SP6 some parts get
 consolidated even though their libref and several attributes 
 are different.
 Does anybody know why this might be happening?
 
 Tim Fifield

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[PEDA] PCB file translation

2002-04-03 Thread lloyd . good

Hello all,
I just received a pcb file from a subsiduary in Spain. They want us to
manufacture the product for them. Only one little problem, their files are
made with VISULA from ZUKEN-REDAC. Anyone know anything about this S/W and
whether there is a possibility of translating it to Protel?  Or the
alternative is to have it converted directly into Unidoc, which we can't do
either.
Any thoughts?





   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Sean James [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, April 02, 2002 11:28 AM
To: Protel EDA Forum
Subject: [PEDA] BAS FILES


How do I run 3rd party .bas files?

Sean James
PCB Designer
Telecast Fiber Systems
102 Grove Street
Worcester, MA 01603
TEL 508-754-4858 x33
FAX 413-541-6170
www.telecast-fiber.com


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Re: [PEDA] Footprint pads moving during or after copy/paste/move processes.

2002-03-28 Thread lloyd . good

Hi Brad,
I have never seen this problem before, however is it possible that the part
was created using metric units? Perhaps, and this is a stretch, that this
may have arisen from a glitch in the calculation when using imperial ( I'm
assuming you work in imperial units) units on the pcb and in copying and
rotating the component?  
I may just be grasping at air here, but I'd be curious to know if the
metric/imperial conversion played any part.
Cheers,


   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Brad Velander [mailto:[EMAIL PROTECTED]]
Sent: Thursday, March 28, 2002 11:48 AM
To: Protel EDA Forum List Server (E-mail)
Subject: [PEDA] Footprint pads moving during or after copy/paste/move
processes.


Hi all,
why do I usually get these weird ones?

One of our engineers just came to me with an alignment issue for a
couple pads within a footprint on a test pcb. Sure enough two pads within
the 8 pad device are visibly shifted on the board. Checked the PCB file and
the pads are shifted. Checked the library and the part is correct. Better
then all of this so far, the test board involved actually had this section
of circuitry copied from the main board after the main board was completed,
the main board does not have the problem.

Here is the events that led to this problem. I designed the main
(full) pcb, everything is correct. I selected a subsection of the circuit
and copied it to make a small test board. When I pasted this subsection into
the test board I moved, rotated the selection to fit within the test board
outline. Then I edited some component locations and attached pertinent
traces. I did not, read never, unlock the primitives of the problem
footprint.

The result, I have a footprint where three pads are visibly shifted
from their original locations within the footprint. It is a 8 pin ceramic
package with a pinout similar to the number pattern below. The device is
centered over an origin of 0,0 in the footprint library. The first pattern I
show is as it should be, the second pattern is how it turned out, note 2 and
6 pads are shifted alternately left and right, pad three was also shifted
vertically downwards slightly towards the center of the device.


1  2  3 1 2
   3

 80,04  8 0,0 4

 
7  6  5 76 5


Has anybody ever seen this problem? Any ideas on it's cause? How
would you check for it in the future, without checking every single
footprint? Remember, the original board this was copied from is fine, I
didn't unlock the primitives of the component after copying it. All I did
was paste, rotate, move the copied selection.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com

See us at Booth S8155 at NAB 2002 in Las Vegas April 8 - 11.

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Re: [PEDA] Orcad PCB import?

2002-03-28 Thread lloyd . good

Gentlemen,
Thanks for all your responses. I have in fact completed a successful
translation without any noticable losses. I must have been lucky enough to
be given Orcad v9 dsn and max files. So far so good, but was nice to get the
input ahead of time.
Thanks again all,



   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
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of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Thursday, March 28, 2002 12:26 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Orcad PCB import?


At 01:11 PM 3/27/2002 -0500, [EMAIL PROTECTED] wrote:

I have had some success in importing Orcad DSN files as far as schematic
recovery goes, but does anyone know if the PCB from Orcad will import? If
so
what kind of information is lost in the process?

I just did an Orcad Layout 9 (.MAX)import. I saw nothing out-of-place 
except that some text may have been moved a little, which is normal because 
if differing fonts, etc.

Older OrCAD PCB files, I'm not so confident


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[PEDA] Orcad PCB import?

2002-03-27 Thread lloyd . good


I have had some success in importing Orcad DSN files as far as schematic
recovery goes, but does anyone know if the PCB from Orcad will import? If so
what kind of information is lost in the process?
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
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of this e-mail is not the intended recipient, you are hereby notified that
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[PEDA] PDF quality difference 98 and 99SE

2002-03-27 Thread lloyd . good

One of the Engineers came to me today with an interesting item. He showed me
some pdf files of schematics that were generated from Protel 99SE and some
that were generated from Protel 98. The pdf files generated by 99SE had some
very peculiar junction dot shapes and lines that appeared to shift and
stagger. Has anyone else noticed a difference in the quality of the pdf's
generated by the two different versions?
We are using Acrobat 4.0 for writing. PDF writer and distiller.
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
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Re: [PEDA] Accessing an Access Data Base from within Protel

2002-03-22 Thread lloyd . good

Kevin,
I had Ian Wilson write a server that links all the fields except the read
only fields from an excel file. It works similarly to the linking function
inside Protel only this one works in under 8 hours. actually in seconds. It
will even fill the footprint field for you.
Ask him for it, it should be pretty cheap.
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]]
Sent: Thursday, March 21, 2002 8:57 PM
To: proteledaforum
Subject: [PEDA] Accessing an Access Data Base from within Protel


Is it possible to write a Protel basic script that can either retrieve
information from an access data base or drive an external ODBC engine (Using
DDE technology?) or retrive information from an external Excell spreadsheet.

What I am trying to do is update user fields in a schematic from a data
base. Protel does this automatically if a dBase data base is used, but all
my information is in an Access data base.
Posted from Association web site by: Kevin Knight



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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread lloyd . good

Hi Florian,
I have used the Isolator software from T-Tech out of the US. It imports
gerber files and drill files directly then generates its own isolation route
files. It is very effective and easy to use, but not very fast. It's great
for single sided test PCBs but I found it a bit of a pain for complex double
sided. It seems to me that you can't beat the proto-1 service at AP
Circuits. Just my opinion!
www.apcircuits.com
Cheers,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
GE Harris Energy Control Systems Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Florian Finsterbusch [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 8:45 AM
To: Protel EDA Forum
Subject: [PEDA] Software for Isolation Milling


We are considering to build some prototype PCBs by isolation milling.
Has anybody got experience which software is suitable to generate HPGL- or
DXF-Files for the drilling machine from our Protel 99 SE
Gerber-Files?
Is there some free or cheap software available?

Thank you for all of your help!

Florian Finsterbusch

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Re: [PEDA] Software for Isolation Milling

2002-02-28 Thread lloyd . good

Brian,
Actually, when we used the Isolation S/W, it was for a New Hermes Vangard
7000 plotter/miller. It is usually used for sign making, but because it has
the variable speed armature in Z axis and accepts HPGL input, that's what we
used to iso-route PCBs. T-Tech has their own miller/plotter with a
proprietary file exchange, but the S/W exports the isolation routing path
into both DXF and HPGL. We also had some conversion S/W with our plotter to
go from DXF or HPGL to their own file system, but we never used it.
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Brian Guralnick [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 9:05 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Software for Isolation Milling


What type of driller?

Are you talking about just drilling the pads  holes?
Or, are you talking about a board milling machine?

Usually, board milling machines will take the Gerber  process it
specifically for
the milling machine.  As for a hole drilling machine, the 1 of the generated
drill
files might already be in a suitable format for the machine.  Remember,
Protel
generates (if I remember correctly) a .drl, a .drr  a .txt which all
contain the
drill data.  The .txt file should be somewhere close to HPGL  Gerber.  It's
basically a set of  xy coordinates.

Brian Guralnick

-
---
Comedy clips:
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-FatFingers.mp3  -53K
ftp://ftp.point-lab.com/quartus/Public/MP3/Simpsons-Moe-LieDetector.mp3
-166K

RedDwarf fans only - Year 8 - Shrink Kryten interview...
ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-16kbit.mp3  -450K
ftp://ftp.point-lab.com/quartus/Public/MP3/Shrink-Kryten-48kbit.mp3  -1.4M

-
---


- Original Message -
From: Florian Finsterbusch [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Thursday, February 28, 2002 10:45 AM
Subject: [PEDA] Software for Isolation Milling


| We are considering to build some prototype PCBs by isolation milling.
| Has anybody got experience which software is suitable to generate HPGL- or
DXF-Files for the drilling machine from our Protel 99 SE
| Gerber-Files?
| Is there some free or cheap software available?
|
| Thank you for all of your help!
|
| Florian Finsterbusch
|
|

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Re: [PEDA] SMTH was- Software for Isolation Milling

2002-02-28 Thread lloyd . good

Thanks Dennis,
I didn't even know these guys existed. Good pricing. I've always used APC
because I live in the same city, but the savings might be worth the shipping
time. Not to mention our useless Canadian dollar goes a little farther when
staying in-country.
Regards,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
General Electric Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 28, 2002 10:27 AM
To: Protel EDA Forum
Subject: Re: [PEDA] SMTH was- Software for Isolation Milling


yes you can beat AP
SMTH circuits
full spec - dbl sided, sldr mask, legend, fast, about $100
Clem Tang [EMAIL PROTECTED]
http://www.1pcb.com/
(also in Canada)

Dennis Saputelli


[EMAIL PROTECTED] wrote:
 
 Hi Florian,
 I have used the Isolator software from T-Tech out of the US. It imports
 gerber files and drill files directly then generates its own isolation
route
 files. It is very effective and easy to use, but not very fast. It's great
 for single sided test PCBs but I found it a bit of a pain for complex
double
 sided. It seems to me that you can't beat the proto-1 service at AP
 Circuits. Just my opinion!
 www.apcircuits.com
 Cheers,
 
 
GE Energy Services
 __
 
 Lloyd Good
 Development Digitization
 
 Substation Automation Solutions
 GE Harris Energy Control Systems Canada, Inc.
 2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
 Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
 Website: www.gepower.com/geharrisenergy/
 
 NOTICE: The information contained in this e-mail is privileged,
confidential
 and intended solely for the use of the addressee named above. If the
reader
 of this e-mail is not the intended recipient, you are hereby notified that
 any dissemination, distribution or copying of this e-mail is strictly
 prohibited. If you have received this e-mail in error, please notify me
 immediately by telephone (collect) at (1) 403.214.4400 and destroy this
 e-mail as well as any copy. Thank you.
 
 -Original Message-
 From: Florian Finsterbusch [mailto:[EMAIL PROTECTED]]
 Sent: Thursday, February 28, 2002 8:45 AM
 To: Protel EDA Forum
 Subject: [PEDA] Software for Isolation Milling
 

-- 
___
www.integratedcontrolsinc.comIntegrated Controls, Inc.
   tel: 415-647-04802851 21st Street  
  fax: 415-647-3003San Francisco, CA 94110

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[PEDA]

2002-02-26 Thread lloyd . good


This may have been answered previously however, has anyone experienced parts
seemingly outside the board perimeter even though they are placed inside?
I have been passed a ddb file from another and if I ZA- zoom all it
displays an area much greater than the pcb perimeter. I have checked for
hidden part fields outside the board, but that didn't fix it. If I select
outside an area and draw a box around the board, several parts inside are
selected.
I can't remember how to fix this.
Regards,



   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
GE Harris Energy Control Systems Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
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immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Good, Lloyd (PS, GE Harris-Canada) 
Sent: Friday, February 08, 2002 9:56 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Re[3]: View PCB 3D


Ahhh Mr Jenkins,
I was wondering when you would jump into the fray. I've missed your soft
demeanor and objectiveness. It has been so long since I've been indirectly
compared to an aging dweeb and twits. I should have explained that I do
not differentiate between PCB designer and Engineer as the two are not
mutually exclusive. I do consider Protel an Electrical and Electronic
Engineering tool. I don't consider it a Mechanical Engineering tool, nor do
I consider E/E Engineers as capable at packaging design as Mech Engineers.
As far as what Altium/Protel advertises and deliversgee the sales guy
might have stretched the truth a littleNEWS FLASHMarketing didn't
tell the whole truth. Oh my god...
Exactly what myopic eutopia have you been living in?
Regardless, I have grown weary of this banter and my personal assistant is
late bringing my coffee, I'm going to have to jump in my gold-plated golf
cart and track him/her down. He/she is probably playing beach volleyball
with all the guys down in the 3D CAD dept. 

Regards,



Mr Good, Please explain why Protel advertised a 3D-viewer tool as part of
the suite upgrade price  for P99/SE. While you're at it, please explain why
Protel EDA is a PCB-designer's tool and not an  electrical and electronics
engineer's EDA tool as well (as it has been advertised for years). I
realize that many PCB-designers have different motivations than engineers,
but you obviously don't   realize the opposite.

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Re: [PEDA] hidden items outside the board perimeter. (Was: blank)

2002-02-26 Thread lloyd . good

Abd ul,
Thanks, I didn't realize that the autopostion did not work if the comment
fields were hidden. That did the trick. I un-hid the comments, globally
autopositioned all to center (AGAIN!) and everything sync'ed up.
Question, how is it that when viewing the comments, they all appeared to be
centered to start with, yet I had the problem?

Cheers,




   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
GE Harris Energy Control Systems Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
immediately by telephone (collect) at (1) 403.214.4400 and destroy this
e-mail as well as any copy. Thank you.



-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, February 26, 2002 2:01 PM
To: Protel EDA Forum
Subject: Re: [PEDA] hidden items outside the board perimeter. (Was:
blank)


At 12:39 PM 2/26/2002 -0800, Brad Velander wrote:
 have you checked for errant comment fields? This is what I usually
find when I have had this problem. Usually our comment fields are hidden so
we don't know where they really are. Try editing the comment field and
changing the placement option to center. This has almost always fixed the
problem for me.

This only works if the fields are unhidden. Changing the autoposition 
option is ineffective with hidden fields. I'm not sure I'd consider this a 
bug, I can see a use for the behavior. But we have to know about it first!

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] RF footprints

2002-02-20 Thread lloyd . good

Not all problems in design are solved by software tools, however finding an
adequate work around is often easier than adding the functionality to the
tool set. 
I have only had limited experience in RF layout and coincidentally it did
involve an inductor supplying power to an RF transistor.  In schematic I
placed an inductor in the cct to show the function, but using wires shorted
the two nodes together with an explanation on the sheet as to why the
shorting wires were present. They were there to solve the netlist problem
that would exist without their presence. 
On the PCB I created a component with two pads and shorted them with a fill
of calculated length and width, given that I knew what material, frequency
etc the design was for.
When running the DRC the check accepted the short as correct and having
manually routed the PCB I was confident that it was right. BTW the
transceiver did work and passed FCC/DOC testing.

Regards,

Lloyd Good
Engineering Systems Co-ordinator
GE Substation Automation Systems
2728 Hopewell Place NE
Calgary, Alberta, Canada
T1Y 7J7
Tel: (403) 214-4777
Fax:(403) 287-7946
email: [EMAIL PROTECTED]


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Re: [PEDA] Performance difference between 2 of the same machines

2002-02-13 Thread lloyd . good


Bob,
First thing, please get rid of the italisized text in your email. It makes
it very difficult to read. I'm getting old and spent way too much time
looking at a computer screen so any more fuzzy printing makes me think its
my eyes going bad.
Anyway, what Operating system are you running on Computer 1 and is it the
same as Computer 2? If using Windoze NT, I suspect the new computer is
experiencing what we have discussed on the forum as pregnant pauses most
likely caused by the OS not being able to handle the interrupts from the USB
ports. If this is true, my suggestion would be to switch to Windoze 2K Pro.
This OS seems to be very stable and will eliminate the  pregant pause
problem.
Other than that, more information may be required.
Cheers,



 ...OLE_Obj...  
   GE Energy Services
__

Lloyd Good
Development Digitization

Substation Automation Solutions
GE Harris Energy Control Systems Canada, Inc.
2728 Hopewell Place N.E., Calgary, Alberta T1Y 7J7  CANADA
Tel: 403.214.4777,  Dialcomm: 8.498.4777,  Fax: 403.287.7946
Website: www.gepower.com/geharrisenergy/

NOTICE: The information contained in this e-mail is privileged, confidential
and intended solely for the use of the addressee named above. If the reader
of this e-mail is not the intended recipient, you are hereby notified that
any dissemination, distribution or copying of this e-mail is strictly
prohibited. If you have received this e-mail in error, please notify me
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Re: [PEDA] Re[3]: View PCB 3D

2002-02-08 Thread lloyd . good

Ahhh Mr Jenkins,
I was wondering when you would jump into the fray. I've missed your soft
demeanor and objectiveness. It has been so long since I've been indirectly
compared to an aging dweeb and twits. I should have explained that I do
not differentiate between PCB designer and Engineer as the two are not
mutually exclusive. I do consider Protel an Electrical and Electronic
Engineering tool. I don't consider it a Mechanical Engineering tool, nor do
I consider E/E Engineers as capable at packaging design as Mech Engineers.
As far as what Altium/Protel advertises and deliversgee the sales guy
might have stretched the truth a littleNEWS FLASHMarketing didn't
tell the whole truth. Oh my god...
Exactly what myopic eutopia have you been living in?
Regardless, I have grown weary of this banter and my personal assistant is
late bringing my coffee, I'm going to have to jump in my gold-plated golf
cart and track him/her down. He/she is probably playing beach volleyball
with all the guys down in the 3D CAD dept. 

Regards,



Mr Good, Please explain why Protel advertised a 3D-viewer tool as part of
the suite upgrade price  for P99/SE. While you're at it, please explain why
Protel EDA is a PCB-designer's tool and not an  electrical and electronics
engineer's EDA tool as well (as it has been advertised for years). I
realize that many PCB-designers have different motivations than engineers,
but you obviously don't   realize the opposite.

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Re: [PEDA] Re[3]: View PCB 3D

2002-02-07 Thread lloyd . good

Robi et al,
While I agree that the Protel 3D viewer is absolutely useless, we have been
using the 3D utility from Desktop-EDA to export into Solidworks. In
Solidworks we assembly products with multiple PCBs, design the
plastics/metal works, add overlays and create AVI's of the whole assembly,
so that our customers don't have to speak or read any particular language.
We can do clearance checks, show hidden features in otherwise covered
locations, the advantages are endless. To limit oneself by saying, If you
do you homework - properly... is like saying, I don't need a computer, I
have a slide rule that works just fine.
Sounds like some projects are not as complex as others.
IMHO
Lloyd Good

-Original Message-
From: robi artwork [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 07, 2002 5:29 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Re[3]: View PCB 3D


Hallo Waldemar - tut mir Leid dass ich dir da widerspreche - aber::
Hi everyone - sorry that  I disagree with that; but::

I don't see a 3D Viewer as a must - If you do you homework - properly
It seems to me more of a laziness of the engineer  to look after the height 
restictions.
I never had a 3D Viewer - I nevere want one.
If things need to be placed in a low area - you just need to take care of 
it and watch out.
robi

At 13:03 07/02/02 +0100, you wrote:

  Looks nice. But what use is there ?
   From a prototype that has been tested I can make a shot
  with a digital camera. This image is then used for fabrication
  and documentation.
  I realize there might be advantages when working with very
  bulky parts, assuming collisions are visible. But with TQFP
  and 1206 cases, 3D is not that spectacular. Showing off with
  a nicley textured connector, rendered with 10k triangles ?
 -- snipp --

Rene,
 you are right if you are designing baords used in a simple case.
But imagine you are designing for a case where only partly is enough room
to
place even a TANT_C Capacitor, to say nothing of a connector
And now imagine the mechCAD-engeneer beside you is using an 3D-CAD while
you
have to set placement rules and drawings in mech-layers to find out wether
or
not you can place this part here .
Believe me, you will long for a 3D-tool.  :-)


regards

Waldemar



Robi Artwork  -  PCB Design Bureau
PO-Box 199,Lot 33 Jamaica Drive
Deception Bay  Q4508Australia
--
C/o Robi Bittler
Ph: 07-3203 0634
Fx: 07-3203 3958  -  only on request


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Re: [PEDA] Re[3]: View PCB 3D

2002-02-07 Thread lloyd . good

Brad,
I understand the sentiment of the Protel viewer by others in the forum. I
suppose the point that I am trying to make it that Protel is an EDA tool not
a 3D CAD package. I don't expect it to be. I use it for what it is intended,
not for what is not intended. Ergo, I use the 3D export utility and change
programs to complete my intention. Similarily, I would not wear a parachute
to go SCUBA diving, nor vice versa.  Protel is an EDA package, don't expect
it to do your mechanical work. It provides a near useless 3D viewer, yes,
but if this propagates the usage of another program to which the transition
is seamless, then perhaps it has had some use after all. I digress, Protel
should not expand the 3D viewers functionality, it should embed the export
utility to a plethora of 3D programs and/or generic transform genres. STEP,
IGES etc..
Regards,


-Original Message-
From: Brad Velander [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 07, 2002 9:48 AM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] Re[3]: View PCB 3D


Hi Lloyd,
your comments are very true for the Desktop-EDA package. However I
think some of the points expressed were misunderstood. The 'Protel' viewer
is a toy with virtually no useful purpose. Protel needs to align themselves
with the industry and develop a true 3D mechanical interface (sorry forget
the acronym) rather then a viewer. The Protel viewer is useless,
absolutely useless. Would ACAD, Solidworks or any other get away with a
pretty viewer in their products, no you need output suitably formatted for
inclusion in the next level of development tools? Showing a pretty picture
(even one with user defined models) serves no measurable useful purpose.
This is what I think some of the other posters have been trying to say. The
Qual-ECAD or Desktop-EDA tools are a proper path for 3D development, not a
simple Protel viewer.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com

See us at Booth 323 at Satellite 2002 in Washington, DC March 6-8.

snip

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Re: [PEDA] Re[3]: View PCB 3D

2002-02-07 Thread lloyd . good

Many users will not want to have to convert all their libraries to include 
3-D information 
This is my point exactly. Some PCB designers have no interest in the 3D
world, so let's not create a proverbial white elephant inside of Protel. The
functionality you request would add cost, or possibly an add-on package.
Hmmm extra packagessounds like the road the PADs and Orcads have been
down before. And frankly I'm not interested in going down that road again.
You don't use a car in the lake nor do you use a boat on roads, but as long
as you have a boat trailer to transport back and forth to the different
mediums.. (perhaps a flakey analogy!?)
Still disagreeing ...respectfully,
Lloyd


-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 07, 2002 11:24 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Re[3]: View PCB 3D


At 12:49 PM 2/7/2002 -0500, [EMAIL PROTECTED] wrote:
Protel is an EDA package, don't expect
it to do your mechanical work.

Certainly it is not necessary for Protel to do what a true 3-D drafting 
package would do. However, meeting the problems of fitting parts on a PCB, 
which is a very limited subset of the field of 3-D drafting, is mission 
critical for PCB designers.

Many users will not want to have to convert all their libraries to include 
3-D information; but gradually available libraries would come to include 
such information. For the program to be able to accept it is, in my view, 
fundamental. Basically a 3-D model can be associated with any footprint. 
Protel is doing that right now, with automatic assignment of models, just 
as a demonstration. So users who don't need 3-D information could simply 
not make those libraries available, and they would not need to set 3-D
rules.

And once those models are available, and once users can make their own 
models, a user could make an environment model or, ideally, import one from 
a 3-D CAD package, and then detect rule violations in 3-D.

This is not very far from where we are already, and it is a logical step in 
the development of the program. And it would be quite useful for many 
designers.

What is needed:

(1) User ability to make and/or import 3-D models.
(2) Rule checking (similar to present placement rule checking).

This is pretty elementary, compared what is needed for mechanical work.


[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] Re[3]: View PCB 3D

2002-02-07 Thread lloyd . good

Mr Lomax,
I don't believe that I missed your point at all, I just don't agree. There
is no such thing as a simple 3D model. If all you want is simple height,
you might want to follow Robi's advice and calculate the separations with a
pencil and paper. If you need interference checking as you stated in the
follow up email to this one, then you have to consider the complexity of the
components true shape and mating surfaces, if any. 
This is not done simply and if I may say so, not Altium's responsibility. I
agree that Altium would be best served by including/buying/incorporating the
utilities of Desktop-EDA or the Qualecad sort, but leave the 3D world to the
3D CAD softwares. The beauty of this scenario is that it already exists and
works very well. You know, don't re-invent the wheel
The Desktop-EDA solution involving Solidworks is completely bi-directional
and associative. When I send a preliminary layout via export to my 3D CAD
counterpart, he does my interference checks including connector mating,
packaging etc. If something needs to be moved, he does it and sends back the
new layout which I need only to finish routing.
Again, I'd like to apologize for the flakey analogy of boat and car.
Regards,


-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Thursday, February 07, 2002 1:53 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Re[3]: View PCB 3D


At 01:56 PM 2/7/2002 -0500, [EMAIL PROTECTED] wrote:
Many users will not want to have to convert all their libraries to include
3-D information
This is my point exactly. Some PCB designers have no interest in the 3D
world, so let's not create a proverbial white elephant inside of Protel.

Lloyd missed my point. A good implementation will not require users to 
provide 3-D information. It will merely allow them to attach a 3-D model to 
a footprint. Thus there would be no legacy issues.
snip

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Re: [PEDA] Altium preps topological autorouter

2001-12-20 Thread lloyd . good

Sean,
I hope you charge this guy by the hour!!

-Original Message-
From: Sean James [mailto:[EMAIL PROTECTED]]
Sent: Thursday, December 20, 2001 1:27 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Altium preps topological autorouter


To quote Mike Reagan -
What could be simpler and faster than create a part, import a netlist that
associates the part, the netlist assigns the Ref designator?   I don't get
it.  I'm just a simpleton.

I cna't convince a engineer to do his boards  schematics this way, so it
takes forever to create/clean up his schematics, etc. It's a waste of time 7
money not to use the software properly.

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170


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Re: [PEDA] Some new user P99se questions

2001-12-18 Thread lloyd . good

Dave,
With regard to the first item. Which service pack are you running. I seem to
remember this same issue with anything before service pack 4 or 5.  I
remember the PAD net text being black and hard to read. Make sure you are
running at least service pack 5. There are some issues with SP6 that I don't
care for but was forces to change otherwise I would be running SP5 still. I
believe if you install the SP your VIA and PAD net text will be default
black text on a white blank bar.

I'm sure you will get many answers to the rest of your queries.

Personally, I think P98 sucked! I refused to change from 3.5 until 99SE came
out. I think once you get used to the database system, you'll realize how
much better it is.

Cheers,
Lloyd

-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, December 18, 2001 2:38 PM
To: Protel EDA Forum
Subject: [PEDA] Some new user P99se questions




Hi all,

I'm a die-hard p98 user and have just starting to kick the tires of p99se.
From the fiddling around I've done so far I've come across a few minor
items that I hope somebody could help me out with:

(1)   In the PCB editor, how can I change the color for the show pads and
show nets.   I'm using darkish colors for pads, vias, and holes and the
black letters are hard to see.It would be nice to have them either
black or white, nothing too fancy.   In P98 they are white.I fully
realize that I can change my color scheme (pads vias etc) to get around the
problem or just squint alot.

(2)  It seems that I need to have all of my library files in seperate
databases and then point to these lib-db's from my project db.   This was
the only way I could figure out how to do it anyways.Quite a departure
from the p98 way.One possiblity is to have a seperate db for each lib
file.   Another is to group them together in fewer db's.Did I do this
correctly or is there an easier way.

(3) It seems that all of the schematic templates also need to be in there
own db file (a single db?).I think the way it works is if you set that
file as the default in a project db at some point in time then all future
projects will have those templates available, even after you close and
reboot.   Did I get it right?I found this to be pretty confusing a
first and was not exactly sure what was happening.

Thanks for any help!
Dave Lewis








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Re: [PEDA] Merging boards

2001-12-14 Thread lloyd . good

I'm with you Dennis, I never copy the whole board into the panel. I just use
another Mechanical layer (usually 3) to create a panelization drawing and
let the fab house deal with it. We always print out the  panel drawing and
include it in the ECN package. Many of our test fixtures are created for the
boards while still in the panel, but why would I want to make work for
myself. Don't you know that Engineers are inherently lazy!?
Cheers,


-Original Message-
From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
Sent: Friday, December 14, 2001 10:24 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Merging boards


what mike r. was suggesting, which i think is a great idea even though i
don't do it that way myself is the following:
don't panelize the the main layout itself, just draw all the fussy
details of the panel, breakaways etc.
then let the bd shop insert the images as instructed

this was you can have your cake and eat it and you don't need to
maintain a separate 'single' copy for DRC

one time (not using the above method) we panelized a board and one trace
didn't get in the clipboard
half the bds had one trace missing

Dennis Saputelli

Brad Velander wrote:
 
 Mike,
 there is something amiss in your explanation regarding reference
 designators. You can merge multiple boards with the same reference
 designators, again you use the Paste Special command and select the
 Duplicate Reference designator box. I do this all the time, day in and
day
 out for our development boards. You can/will also use the Keep Nets
 selection and you may have ratsnest connections between boards where
similar
 nets occur. But other then that it works just fine. I most heartedly
suggest
 that all design, checking and editing be absolutely complete before you
 merge boards because after merging editing or DRC checking and other
 operations can become very complex because of unrouted nets between
boards,
 duplicate designators and the likes. Keep your original singular boards to
 work on for future editing, keep the merged boards as a separate panelized
 file, edit only the original singular boards when editing is required.
 The problem with merging boards which contain differing or split
 planes is very much more complex. Basically it probably shouldn't be
 attempted unless you are quite experienced or the boards are absolutely
 identical. For this very reason I usually use Mid-layers rather then Plane
 layers and I draw my planes as polygons. This is much more conducive to
 merging multiple boards into a panel. It also gets you around some of the
 limitations/bugs associated with Planes not being DRC'ed properly for
all
 possible errors.
 
 Sincerely,
 Brad Velander.
 
 Lead PCB Designer
 Norsat International Inc.
 #300 - 4401 Still Creek Drive,
 Burnaby, B.C., Canada, V5C 6G9.
 Tel   (604) 292-9089 (direct line)
 Fax  (604) 292-9010
 Website: www.norsat.com
 
 -Original Message-
 From: Mike Reagan [mailto:[EMAIL PROTECTED]]
 Sent: Friday, December 14, 2001 5:31 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Merging boards
 
 Sean wrote:
 
 When I merged 2 boards to create a pallette, 2 of the internal split
planes
 of the 2nd board changed nets. Is there any way to prevent this, or is it
a
 bug?
 
 Sean,
 I am assuming you are panelizing two boards,  which are identical.   If
the
 boards are identical use the Paste Special, and check keep the same nets,
 also check Duplicate reference numbers.  This should work.
 
 If you are attempting to merge two board that are not identical, but share
 the same reference numbers then they can  not be merged.  Is it a bug?  I
 think it is more  the method which Protel chooses to implement not a bug.
I
 agree with it  because it prevents a designer from having parts with
 duplicate reference numbers.  The work around for all penalization is draw
 the panels, the routes, break off tabs on the drill file then ask your
board
 house to panelize the design to your outline. Care must be taken that the
 outlines you create are exact,  as I have had calls from a board house
 because I was 1 mil  off grid.   Also you might want to  add a fab note
for
 the direction of the panels, since a square board can be rotated to fit.
 The third action is to have the fab house return the paste gerber which is
 panelized otherwise you may  have a registration problem with BGAs.
 
 Good Luck
 
 Mike Reagan
 EDSI

-- 
___
www.integratedcontrolsinc.comIntegrated Controls, Inc.
   tel: 415-647-04802851 21st Street  
  fax: 415-647-3003San Francisco, CA 94110

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Re: [PEDA] How to change Netlist lines back to solid lines?

2001-12-13 Thread lloyd . good

While I have set this parameter, it seems that new netlist loading will
still see the new connections use a default grey color which is not the
color I have set. Has anyone else seen this? Possibly a bug?


-Original Message-
From: Thomas [mailto:[EMAIL PROTECTED]]
Sent: Thursday, December 13, 2001 12:02 AM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] How to change Netlist lines back to solid lines?


Right click in a free of the PCB work space, select Options/Colors/ from the
pop up menu, then click in the coloured box next to Connections.

Tom.

-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Thursday, 13 December 2001 10:06 AM
To: Protel EDA Forum
Subject: Re: [PEDA] How to change Netlist lines back to solid lines?


Further to this thread, does anyone know how to set the default color of the
ratsnest lines. I know how to edit them but would prefer that they came up
with the color of my choice everytime they were created.

Regards,
Lloyd

-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, December 12, 2001 4:08 PM
To: Protel EDA Forum
Subject: Re: [PEDA] How to change Netlist lines back to solid lines?




Sounds like the connections have been turned off. You can get them back
again by
doing the
following in PCB:

View - Connections - Show All


This menu also has provision to hide or view individual components nets or
global nets like power/ground.
Its useful when placing parts to see a less cluttered ratsnest.



___

Clive Broome
IDT Sydney Design CentrePh: +61 2 9763 3513
8 Bayswater Dr, HomebushFax:+61 2 9763 3409
Sydney,  NSW, 2127  Email:[EMAIL PROTECTED]
Australia

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Shuping Lew [EMAIL PROTECTED] on 12/13/2001 04:06:41 AM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Clive Broome/sdc)

Subject:  [PEDA] How to change Netlist lines back to solid lines?



Hello, there, Does anybody know why my netlist on the PCB suddenly turned
into hidden lines instead of solid lines? I did not change anything and not
sure how to changed them back to solid lines again. Thanks in advance.

Susan Lew
Quintron Systems, Inc









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Re: [PEDA] Altium Total Support Brochure

2001-12-13 Thread lloyd . good



On Wed, 12 Dec 2001 18:02:23 -0600, Jon Elson wrote:
Abd ul-Rahman Lomax wrote:    


Any comments on the level of support others have gotten?


I've not called for any tech support since Protel moved from California to
Utah. The last time I spoke to someone at Protel, Sam Cox and Vinh Ho were
the two support personnel. I see both their names on the forum list now.
Everything I need as far as support goes I find right here, though after
this many years I hope I know what I'm doing. Seems to me that Altium did
not think through this plan very thoroughly, or did not expect this kind of
backlash.  Didn't the American rebellion start over something like this?

Sam and Vinh, being former employees, I'd be interested to see what you both
think of current developments. Any thoughts you'd like to share gentlemen?

Cheers,

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Re: [PEDA] .TXT File generation

2001-12-13 Thread lloyd . good

Tim,
Under the CAM outputs, you have choices to generate gerbers, NC Drill, Pik
and Place etc. This the the section that you wish to use. Just choose to
generate Pick and Place which gives you two files a *.txt and a *.csv file
of the X/Y co-ordinates for the components. Also choose to generate a
Testpoint report, which will output the X/Y co-ordinates of all your
testpoints, provided that you have set all the testpoints as such. Meaning
checked the testpoint box under the pad attributes menu.

Regards,
Lloyd

-Original Message-
From: Tim Fifield [mailto:[EMAIL PROTECTED]]
Sent: Thursday, December 13, 2001 9:41 AM
To: Protel EDA Form
Subject: [PEDA] .TXT File generation


My production facility (not pcb house) is asking for the following:

X/Y coordinates of components .TXT file
X/Y coordinates of test points/pads in .TXT file

Is it possible to generate those files in P99SE? If so, how?

Tim

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Re: [PEDA] Clipboard to copy from PCB to other Windows apps

2001-12-13 Thread lloyd . good

Steve,
You can export the print preview parts out to a windows metafile, but for
small snips of pcb this is a real lengthy process. You're better to use a
utility (shareware) called Snag-it . This is a great little utility and
very easy to use, you can select portions of the screen or the whole screen
and save in multiple different formats. Try it, let me know how it goes.
Cheers,

http://www.snagit.com/



-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Thursday, December 13, 2001 3:20 PM
To: Protel EDA Forum
Subject: [PEDA] Clipboard to copy from PCB to other Windows apps


I'm trying to grab a clip from a PCB file to copy to another app
(PowerPoint, 
although I can get there via any of a hundred other apps). I can't get the 
copy operation to work such that I can then paste. I recall there being a 
trick to it;  seems like I've done it before, but I can't remember how. Any 
hints?

Steve Hendrix

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Re: [PEDA] How to change Netlist lines back to solid lines?

2001-12-12 Thread lloyd . good

Further to this thread, does anyone know how to set the default color of the
ratsnest lines. I know how to edit them but would prefer that they came up
with the color of my choice everytime they were created.

Regards,
Lloyd

-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, December 12, 2001 4:08 PM
To: Protel EDA Forum
Subject: Re: [PEDA] How to change Netlist lines back to solid lines?




Sounds like the connections have been turned off. You can get them back
again by
doing the
following in PCB:

View - Connections - Show All


This menu also has provision to hide or view individual components nets or
global nets like power/ground.
Its useful when placing parts to see a less cluttered ratsnest.



___

Clive Broome
IDT Sydney Design CentrePh: +61 2 9763 3513
8 Bayswater Dr, HomebushFax:+61 2 9763 3409
Sydney,  NSW, 2127  Email:[EMAIL PROTECTED]
Australia

___










Shuping Lew [EMAIL PROTECTED] on 12/13/2001 04:06:41 AM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Clive Broome/sdc)

Subject:  [PEDA] How to change Netlist lines back to solid lines?



Hello, there, Does anybody know why my netlist on the PCB suddenly turned
into hidden lines instead of solid lines? I did not change anything and not
sure how to changed them back to solid lines again. Thanks in advance.

Susan Lew
Quintron Systems, Inc









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Re: [PEDA] AW: CAMTASTIC GERBER TO PROTEL TRANSLATOR?

2001-12-05 Thread lloyd . good

If possible I would love a copy too, Please.

[EMAIL PROTECTED]

-Original Message-
From: Georg Beckmann [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, December 05, 2001 12:04 AM
To: 'Protel EDA Forum'
Subject: [PEDA] AW: CAMTASTIC GERBER TO PROTEL TRANSLATOR?


I sent it to Abdulrahman Lomax he wanted to bring it to the file section in
this forum.
But anyway, I send it to your e-mail address.

Georg

-Urspr ngliche Nachricht-
Von: Brooks,Bill [mailto:[EMAIL PROTECTED]]
Gesendet: Mittwoch, 5. Dezember 2001 01:47
An: 'Protel EDA Forum'; '[EMAIL PROTECTED]'
Betreff: [PEDA] CAMTASTIC GERBER TO PROTEL TRANSLATOR?


Georg Beckmann mentioned having a little utility to convert the GERBER
output from CAMTASIC to PROTEL compatible Gerber for import to Protel.
Does anyone have this file they can make available to me? I would like to
test it on some boards I am plying with. Could be very useful thanks
Bill Brooks
[EMAIL PROTECTED]


-Original Message-
From: Brooks,Bill [mailto:[EMAIL PROTECTED]]
Sent: Monday, December 03, 2001 9:59 AM
To: 'Protel EDA Forum'; '[EMAIL PROTECTED]'
Subject: Re: [PEDA] AW: imported Gerber info missing


Hi Georg, Could I get a copy of the Gerber translator program you mentioned
in this post?
- Bill Brooks

Bill Brooks
PCB Design Engineer , C.I.D.
DATRON WORLD COMMUNICATIONS, INC
3030 Enterprise Court
Vista, CA 92083
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
mailto:[EMAIL PROTECTED]
IPC Designers Council, San Diego Chapter
http://www.ipc.org/SanDiego/
http://home.fda.net/bbrooks/pca/pca.htm


-Original Message-
From: Georg Beckmann [mailto:[EMAIL PROTECTED]]
Sent: Saturday, October 20, 2001 2:17 AM
To: 'Protel EDA Forum'
Subject: [PEDA] AW: imported Gerber info missing


Thanks for the advice, someone made me a simple program to convert the
gerber files generated by camtastic that protel can inport it.
The program adds the Dnn and cuts the first 3 lines of the gerber
that protel don't understand.

It is a simple DOS program you can start in a dos-box with the name of the
source gerber to convert. The result is a file with the same name but a
gbx instead of a gbr extention. So you have to rename it and preserve your
source somewhere.

With this I was able to import the gerber.

The drills I first imported in camtastic and had to make a tool file.
( In my sources the drill tools and the apertures are only in a text-Doc )

Then I exported the drills as a gerber and imported to protel on a mech
layer. With global change it was possible to add a hole of the same size
then the pad on this layer.

Now I can make the post processes and even make minor changes on this pcb.


-- If anybody wants the program, please let me know, it's free.


Georg

 -Urspr ngliche Nachricht-
 Von: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
 Gesendet: Freitag, 19. Oktober 2001 07:57
 An: Protel EDA Forum
 Betreff: Re: [PEDA] imported Gerber info missing


 At 03:40 PM 10/18/01 -0600, Colby Siemer wrote:
 Ted,
 
 The reason Protel will not import the gerber properly is
 because of the way
 the DCodes are done in the CAMTastic version being used.
 
 Protel needs to have the DCode listed each time, it does not
 assume the last
 used DCode if it is missing.  CamTastic only lists it one
 time until the
 code changes then it lists it again.

 Note that this refers to the D-Code for flash or for draw,
 which is D01 or
 D02, I forget which is which. The line format, at least the
 usual one, is

 X[x1]Y[y1]Dnn*

 where x1 and y1 are integers formatted according to the
 settings. When you
 want to examine a file, it can be useful to set zero
 suppression to none,
 so every coordinate will be the same length. That makes it
 easy to set up
 field in a database.

 Anyway, the RS-274 standard is that a parameter remains the
 same unless it
 is changed. So if you have, for example, two points with the same X
 coordinate, you could draw a line between the two without
 having to specify
 the X coordinate twice. Protel reads this correctly.

 The same thing is true for the D-codes which specify the
 aperture. One does
 not have to specify the aperture over and over again, it
 simply remains
 what it was when it was last set.

 It had never occurred to me that the D-command at the end of
 the line would
 be the same way. But it is. A line like
 X[xvalue]*
 will either draw or flash depending on the last used D-code.
 The asterisk
 is sufficient in that case. (CR/Line Feed is irrelevant to
 Gerber code as I
 recall, but it is usually used, makes it much easier to read!
 And Protel
 might require it, I think.)

 I could not see any option in CAMtastic which would control
 this feature in
 the output. CAMtastic apparently assumes that it is
 universally known;
 indeed, it should be. It was an error for the Protel
 programmers to assume
 that imported gerber was Protel-generated. Yes, they might
 not have wanted
 to implement the full standard, but this item was trivial. It would
 

Re: [PEDA] Unconnected Traces

2001-12-04 Thread lloyd . good

Does anyone know how to get Camtastic to check for these hanging traces?
Cheers,
Lloyd

-Original Message-
From: Ian Capps [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, December 04, 2001 3:53 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Unconnected Traces


Nick

You will need to look into Camtastistic or one of the other Gerber veiwers
to do this as they use different design checking concepts.

It pays to do it in gerber as it will also pick up things like annular ring
on obrounds that protel won't.

Ian Capps

- Original Message -
From: Nicholas Cobb [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, December 05, 2001 1:35 AM
Subject: [PEDA] Unconnected Traces


 Previously when I have released a board for fab I have gotten a call about
 traces that lead to nowhere. These are traces I previously routed and then
 removed the component. Is there any way to check for these kind of traces
in
 Protel?
 Nick Cobb


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Re: [PEDA] Pin gate swapping

2001-11-21 Thread lloyd . good

Why would you want to take a step backwards!

-Original Message-
From: Watnoski, Michael [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, November 21, 2001 7:12 AM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] Pin  gate swapping


My best recommendation would be to toss Protel out and use P-CAD.

Michael



-Original Message-
From: Sean James [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, November 21, 2001 7:48 AM
To: Protel EDA Forum
Subject: [PEDA] Pin  gate swapping


Does anybody know how to get Protel to do gate  pin swapping?

Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove Street
Worcester, MA 01605
(TEL) 508.754.4858 x33
(FAX) 413.541.6170



This message was scanned for viruses on behalf of The Black  Decker
Corporation.

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Re: [PEDA] Pin gate swapping

2001-11-21 Thread lloyd . good

Mr. Lomax
I would hesitate to let the pcb routing dictate the FPGA configuration. It
has been my experience in the past that this can result in disastrous
synthesis. I would suggest that unless you have full control over the FPGA
simulation, synthesis and layout, that it is best to let the FPGA
programming (Xilinx Foundation or fascimile) dictate what pins get connected
to what signal.
Regards,
Lloyd Good

-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, November 21, 2001 12:51 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Pin  gate swapping


At 07:48 AM 11/21/01 -0500, Sean James wrote:
Does anybody know how to get Protel to do gate  pin swapping?

Protel does not support this automatically. But it is not difficult to go 
back and forth between schematic and pcb to accomplish something similar.

And with a complex assignment problem, where we want to improve routing, 
say, for a many-pin FPGA, I created a single-pin part, popped one of it 
onto each interchangeable pin on the schematic, created a footprint for 
this part which was equal in size to one pad of the FPGA, and placed these 
parts on the corresponding swappable pads of the FPGA. Then, while routing 
manually, I could just move them around until I got a good arrangement; 
I'll leave the rest of the process as an exercise for the student... :-)

But it was not at all difficult to transfer this data back to the schematic.

Two hints:

I made a mech layer copy of the FPGA footprint and replaced the actual FPGA 
with that copy while I was working. This allowed me to pick up the pieces 
with ease -- without going through a selection dialog -- but they still 
would snap into place.

It may be easier to make a special symbol for the swapped FPGA than to use 
the original symbol, which would require rerouting the schematic. However, 
if the swappable nets are assigned to the FGPA with net labels instead of 
wires, rerouting is easy.

[EMAIL PROTECTED]
Abdulrahman Lomax
Easthampton, Massachusetts USA

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Re: [PEDA] Protel usage

2001-11-20 Thread lloyd . good

Hi Fred,
Thanks for the reply. I agree that it is our responsibility as Users to
inform and demand that the product perform as advertised. This forum
provides an excellent venue for us to discuss what is and isn't working and
what the market desires for new revisions. However, occasionally it seems
that there are a few Users out there that either don't understand the
program and it's function or want it to do something that it was never
intended to do. As I indicated before, I have seen the evolution of the
software for the last 15 years. It has made some positive steps and some
negative ones. One of my biggest frustrations is seeing a function that used
to work well become one that does not. Overall, I am very pleased with the
direction the program has been going, but the latest shift with the
maintainence agreements that Altium is proposing has me greatly concerned.
Sometimes I might just be over sensitive to all the whining going on in the
forum, but then I don't have children so I am not used to that kind of thing
either, haha. It is somewhat easy to tell the longtime Users from the more
recent in the forum. Speaking of oldtimers,  Mr Lomax (respectfully) What is
your overall general opinion of the developments from AutoTrax 6.0 to DE
99SE?

Regards,
Lloyd Good

-Original Message-
From: Fred A Rupinski [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, November 20, 2001 9:10 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Protel usage



Most of us make the best of it, or we wouldn't be using this software in
the first place. Nevertheless, if we don't complain, and if we don't submit
our needs and preferences, there's little chance that we will get the
quality
software we expect. You have an obligation to yourself to insist that
software vendors provide what they promised, specified, and what you
paid for.

Regards,
Fred A Rupinski


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Re: [PEDA] Protel usage

2001-11-20 Thread lloyd . good

Bill,
Sounds like the exact type of situation we are in. We have old schematics in
Autocad, old pcbs in PCAD and even a few designs in old Orcad. Until
recently, we used the same file managment system you describe and frankly I
did everything I could to get rid of it. What nonsense it was to keep all
the files separate. 
We use much the same part numbering scheme that you do for the individual
files and used to save them in separate subdirectories on a backed up
server. We call our ECO's ECN's but I see just as many as you seem to. It
was the policy that you kept track of what version schematic matched that
version of PCB by the Revision Control Record (RCR) in the ECN. The
product had a vintage number that was represented by the current ECN. So we
had paper controlling electronic files. (cart before horse senario)

We still use RCRs in the ECN, but we no longer break apart the files. We
keep the product number in the ddb file and show the independant
schematic/pcb versions in the file name as well.  Our ECN process is in the
stages of becoming automated as well. So linking one complete source file to
the database is going to be so much easier that linking, schematic, pcb,
gerbers, rev history...etc.
We also duplicate the source output into pdf files for documentation and
release into other departments not running Protel. The print manager works
wonderfully for pcb layers. Yes, it is a pain to configure each time, but it
only takes 30 secs to delete what I don't want and set up what I do. I have
the rebuild set up to only initiate when I click the rebuild button. When
set up, I can print out all the layers I want in any configuration in a
single pdf. To my knowledge, you couldn't do that with the old simplistic
print feature.
The working files are kept in a directory on the server that is accessible
only to the Development Engineers. Once a file change ECN is approved the
source and document pdf's are copied to a release directory for access by
the rest of the company. The only files that ever get separated are the
gerbers which like you are zipped up, then stored with the rest of the
source files for access by the purchasing dept.
Currently working files are divided up into project directories which have
individual access programmed, but we are experimenting with the priviledges
setup inside the Protel ddb file system.

We have re-written our ISO procedures to reflect all the new developments,
and personally, you would have to drag me kicking and screaming to back to
what you have to do. I'm not saying you are doing it wrong or poorly, but
the changes sure seem to be cleaning stuff up for us.

Regards,
Lloyd

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Re: [PEDA] Antwort

2001-11-19 Thread lloyd . good

Ralf, 
I think what Mr Lomax was doing was trying to find a way for our unilingual
cousins to the South to remember what antwort means, not it's literal
translation.
Auf wiedersehen,


-Original Message-
From: Ralf Gütlein [mailto:[EMAIL PROTECTED]]
Sent: Monday, November 19, 2001 10:12 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Antwort


From: Abd ul-Rahman Lomax [EMAIL PROTECTED]
 For English speakers to remember this, Ant = back, as in anterior, and 
 wort, I would guess, not knowing German, would be the same as English 
 ward. So, backward.

Not *completely* correct, though near to it.
The german wort is the same as the english word, so the
meaning is back-word, or, the older form ans-wer ;-)

Cheers,
Ralf


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Re: [PEDA] Protel usage

2001-11-19 Thread lloyd . good

 Regarding the questions about 3D and autorouter, what parts of Protel do
 you actually use?

I have made my own comments to Mr. Rupinski's disection. Hope you don't mind
my plagerism.

- SchematicYES  My only concern is that I wish the ERC checking was
a little more comprehensive. 

- Global Editing YES  This works just fine. Once you learn the nuances,
its effective and easy.

- ReportBOMYESThis should allow complete user control
(Absolutely!!)

- PCBYESCompared to others I've used in the past 15 years, it's
intuitive and easy to use.

- PowerprintYes, at first I hated it, now I love this way to print,
makes making single PDF files from pcb layers so much easier.

- CAM ManagerYES

- SimulatorYESOnly used once, wish this was covered better by
the documentation.

- AutoRouterNEVER, and have serious concerns about layout people who
do. (Unless using Spectra)

- 3D ViewerYESCompletely useless! As I have said previously,
Protel should buy the export applications from Desktop-EDA. 3D export to
IDF/STEP/IGES or Solidworks is a necessity for real and efficient product
integration. I can't even begin to tell you how this has improved the
relationship between PCB and Mechanical design.

- PLDI would if I had the time to learn this part. 

- Arrange ComponentsNo, 

- AutoPlacerNo,

- PCB MiterNo

- Signal IntegrityUsed once, will definitely keep trying it.

- Database LinkYES, but this used to work in Client 3.x, it has
since been totally screwed up!!
Takes way to long to be useful, and our company NEEDs it to work properly.
ARE YOU LISTENING PROTEL!

- LibraryNo, Protel libraries have never been reliable or adequate.
I lost all confidence when the QFP-100 only had 80 pins.

- Send By MailNever tried.

- CamtasticYESI have used it to convert old gerbers into
something Protel can load.

- Intuitive InterfaceIf you have ever used PADS, you'll think Protel
is one the MOST intuitive programs out there. I have never seen a more User
hostile interface than PADS.

- SDK EDA server - YES, but not myself. I have had some servers built
for me by others, again not covered particularly well but the documentation.

- ProductivityThis is a function of the User, I have used Protel
since the DOS Autotrax days and have seen the rise and fall of productivity.
The worst version of Protel ever produced in my opinion was Protel 98, and a
tie for the best is Protel for Windows 2.8 PCB and DE99SE given that you
have to judge each one at it's time of deployment. Obviously 99SE is more
powerful, but can you imagine trying to run it on a 1991 top-of-the-line PC.
I think not.
No software is perfect or free from bugs, just look at Windoze, however you
can either work around it and make the best of it or sit there and complain.
Yes I would like some things fixed, but considering what else is out there,
I am making the best of the current situation.

Regards,
Lloyd Good

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Re: [PEDA] Protel usage

2001-11-19 Thread lloyd . good

I'm with you, Tony. You couldn't pay me to go backwards into the old
separated file method. Our designs use a numbering scheme which in the past
meant having to look up on paper records which version of schematic matched
what version of pcb. The ddb file system makes it fast and idiot proof.

-Original Message-
From: Tony Karavidas [mailto:[EMAIL PROTECTED]]
Sent: Monday, November 19, 2001 4:00 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Protel usage


I love the design explorer. When I revisit a design from a year or more ago,
I can see everything I was up to at the time. Oh, I did 2 protos...Oh, here
was production gerber set 2, etc...

I just got a call to change some hole sizes on a board so I called up and
'old' design, globally changed  some hole sizes, went to the CAM manager and
pressed F9 - voila! New gerbers were ready to go. I didn't have to remember
squat! I'm glad the old scattered-on-your-harddrive approach is gone. You
can still have it that way, just don't use the integrated DDB file.

Tony





 -Original Message-
 From: Brooks,Bill [mailto:[EMAIL PROTECTED]]
 Sent: Monday, November 19, 2001 1:54 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Protel usage


 This examination of the Protel package usage is a good exercise... Protel
 should pay attention to this.

 rant mode on

 My pet peeve with the Protel Explorer concept is that I have to open
 everything, in a specific place, without any changes in the windows
 environment, in order to get the design up and running to edit
 it... I can't
 keep my users from being confused about the stupid thing... I just want it
 to go away. I want the option to disable the stupid thing and use the
 program like it was in the 98 version... without all the bugs..
 At least it
 made sense to everyone back then. Archiving files, Rev Control,
 argh... must
 be done manually anyways... with or without it.

 They have added a layer of complexity that was not wanted or needed... I
 presume that it simplifies the desire to do their paranoid
 licensing checks
 over the network... but it provides me with nothing but trouble... no net
 value to the company...

 I prefer a KISS (Keep It Simple Stupid) approach... One program one
 function... Windows explorer does ALL that is needed to handle
 organization
 of files... PCB should read PCB's. Schematic should read Schematics, PLD
 should do PLD's... SIM should simulate.. this things do not need to be
 hidden inside an extra layer of hierarchy.. I archive just the
 .pcb and .sch
 and throw away the ddb file... the backups... the superfluous
 junk files...
 This is in order to capture the important files for archiving... I do not
 use the 1 file for all files approach to Protel, I use the Windows file
 system to keep the files out where we can see them... where we don't get
 confused about which file is which.. and what rev is what...etc...

 The ability to do IPC-356 Netlist out or ODB++ file output, or the GENCAM
 format might be useful... If it doesn't make our lives more
 complex than it
 has too..

 I dislike what the Autorouter does, It breaks the DRC rules and
 creates more
 cleanup for the designer...  I'm sure it makes sales though...
 looks awesome
 in the demo... If they ever did make it do what it was advertised to do it
 would be worth the extra cash

 I don't do sim, signal integ, pld, 3D, The print manager is sucky... and
 buggy... and makes me repeat the setup steps over and over with every edit
 session I set up...the 3D implementation is a... not too funny joke... A
 good translator to solidworks would be way more useful... The CAM
 manger is
 ... well could be better... still have to set it up every time...

  And the 'Microsoft' approach to releasing software before there is good
 beta testing and debug... is just poor customer relations... Protel has a
 reputation of being the 'Jack of all Trades' and Master of
 none... and when
 do we get to put our feet up on the desk like that guy who's in
 the picture
 on the box?

 Rant mode off

 As a caveat, I still like Protel better than PADS... (which truly
 sucks with
 terrific force...) all things are relative...after all :)
 Still wish they had not used the Explorer concept as a required
 option.. it
 sucks.

  - Bill Brooks (don't quote me...I use sarcasm as a tool... lol)


 -Original Message-
 From: Jon Elson [mailto:[EMAIL PROTECTED]]
 Sent: Monday, November 19, 2001 12:34 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Protel usage


 [EMAIL PROTECTED] wrote:
 The following is my usage of Protel

  - Schematicyes
  - PCB   yes
  - Powerprint   yes
  - CAM Manageryes
  - Simulatorsometimes - still have great difficulty
 providing models for
 many components.

  - Autorouter   yes - usually try it on every board, and usually
 take the
 best result from a few trials and finish/clean-up by hand.
 I trick
 myself into 

Re: [PEDA] 3D PCBs

2001-11-15 Thread lloyd . good

Colin et al,
Further to your point, if Altium / Protel or whatever you want to call them
now were smart, they would buy out the 3D export features from Desktop-eda
and incorporate them into the next version.
The 3D viewer that Protel offered with the SE version is what prompted me to
contact Desktop-eda about the creation of an IDF exporter in the first
place. Consequently, after a few months of trying, it was easier to switch
from Pro-E to Solidworks for what we were trying to accomplish, but in the
end we have a system that is unbelievably efficient for
mechanical/electrical integration.
JMHO,
Lloyd

-Original Message-
From: Colin Weber [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, November 14, 2001 1:55 PM
To: Protel EDA Forum
Subject: Re: [PEDA] 3D PCBs


I produce 3D PCBs quite often. We do not however bother with nice or 
accurate looking
components, rather, just extruded figures. http://www.qualecad.com/ will do 
this easily.
This software can also accept custom library components developed in a 
mechanical
CAD system.

The Protel 3D addon is just pathetic and I hold no hope for it. Sorry but 
it just is crap.

The http://www.desktop-eda.com.au/ company does have fully functioning 
addons for
3D also. The have an interface for Autocad and Solidworks. The reason we 
didn't go
with it was that we did not want to build yet another library of components 
to maintain.
Without a full time librarian that is too much work. Also, the purchase 
cost of a
mechanical CAD system was required.

Fred, can you live with rectangles and cylinders to represent your boards? 
I can email
you an example of how they look if you want. You won't see cute looking 
colour bands
around your resistors but I think the picture is reasonable and 
representative. The best
part is these 3D baords are a cinch to produce.



--
At 01:41 PM 15/11/2001 -0500, you wrote:

I don't have an answer,  but I have also been wondering how this is
done.  And wondering if there is some 3D data which needs to be added
somewhere?

Also if it is not on the bug list already (P99SP6) The 3D viewer seems
to display several of the DB9 (and many other connectors) from the legacy
libraries upside down.  In other words placing the component on the
top side,  it appears in the 3D viewer,  as if the component has been
populated from the bottom side,  as if the topside was the solder
side.

---Phil
A new addon server is being develop by desktop-eda. This will allow,
apparently, the interface with mechanical 3d modelling and pcb 3d
modelling. Full control of the 3d-ing etc.
Dont quote me on this though.
Wayne Trow

You cannot currently. I say currently because I HOPE Protel does something
useful with this feature. We've been waiting to see for a couple years now.
Tony

 To the best of my knowledge, there is no way to generate custom
components
 for use in 3D renderings for 99SE.
There is a program called Protel/IDF Interface, I don't know how well it
works, but you can set the height of the components, and the width and
depth are set by the overlay.
I've tried using Protel 3D interface before, but didn't have much luck;
any odd shaped boards and it doesn't like it, lots of other errors to,
like connectors sometimes looking correct and other times being a hugh
grey block (which covers half the board).
I've given up trying to use it, I just let our mechanical department
model it (give them a few measurements for main components, connectors,
etc).
Steve

Fred,
To the best of my knowledge, there is no way to generate custom components
for use in 3D renderings for 99SE.
Tim

I would like to use a 3D rendering of a prototype PCB for a project 
proposal. The rendering
  displays abnormal looking components at custom footprint locations. This 
is completely
  unacceptable for a professional proposal. Using 99SE SP6, can anyone tell 
me how I can
  generate realistic custom components for use in 3D renderings?
Regards,
Fred A Rupinski
PS I submitted this question to technical supportagain.

--



Regards,

Colin Weber

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Re: [PEDA] Anyone heard of a GENCAD.CAD file?

2001-09-26 Thread lloyd . good

Rob,
If you send me the file I have a PCAD file convertor, you may lose some hole
information but most everything comes across okay. What ever doesn't can be
fixed in Protel.
Regards,

Lloyd Good
Engineering Systems Co-ordinator
GE Substation Automation Systems
2728 Hopewell Place NE
Calgary, Alberta, Canada
T1Y 7J7
Tel: (403) 214-4777
Fax:(403) 287-7946
email: [EMAIL PROTECTED]


-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, September 26, 2001 8:28 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Anyone heard of a GENCAD.CAD file?




Will the latest version pull in a PCAD binary file?

My current problem is we have the old PCAD binary file, but no machine
running the old PCAD, and the old file would take a week to pull in  to the
new PCAD and check . Since the board house lost the program for the flying
probe tester, I'd rather make them upgrade their software than have to go
back and try to regenerate a PDIF file.

In the future we intend to supply  IPC-D-356A files unless we really have
to supply the PCB file.

Thanks,

Rob





[EMAIL PROTECTED] on 09/25/2001 06:21:41 PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  Re: [PEDA] Anyone heard of a GENCAD.CAD file?




Yes very familiar with Genrad.
Unless you have the latest version which includes the new Protel file
convertor, you need to export your Protel PCB file out in Version 2.8 ASCII
format. Then Genrad has a program convertor called Alchemist which converts
to GenCad.cad files.
Hope that helps

Lloyd Good
Engineering Systems Co-ordinator
GE Substation Automation Systems
2728 Hopewell Place NE
Calgary, Alberta, Canada
T1Y 7J7
Tel: (403) 214-4777
Fax:(403) 287-7946
email: [EMAIL PROTECTED]


-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, September 25, 2001 3:20 PM
To: Protel EDA Forum
Subject: [PEDA] Anyone heard of a GENCAD.CAD file?




Our board house is asking for a GENCAD.CAD file for their flying probe
tester which I believe is made by GenRad.

Has anyone ever heard of this format?

Is this actually a format that Protel will produce, but named wrong?

GenRads web site is less than usefull since anything that might have
information in it is login protected.

The current board that is at issue was done in an OLD version of PCAD which
we don't have running and PCAD 2001 doesn't like the design because the
people who did it thought they were clever and combined power planes and
signal layers in a painful way. So we can't generate the GENCAD.CAD file
for them or the PDIF file they say they could also take. Of course if they
hadn't lost the program they did a year and half ago for this board they
wouldn't have this problem.

thanks,


Rob







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Re: [PEDA] PADs conversion

2001-09-17 Thread lloyd . good

Hello all,
Has anyone had any success in converting old (versions 2  3) PADs files
into Protel?
We have a company that we purchased whose old files are in these formats and
need some conversion utility to do many file conversions.
Please advise.

Lloyd Good
Engineering Systems Co-ordinator
GE Substation Automation Systems
2728 Hopewell Place NE
Calgary, Alberta, Canada
T1Y 7J7
Tel: (403) 214-4777
Fax:(403) 287-7946
email: [EMAIL PROTECTED]

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Re: [PEDA] Diode pads

2001-09-07 Thread lloyd . good

Now that we've finished bashing Brad, let's all have a group hug...yeeuck!

I'm not too concerned how many use the 123 method though it seems the EBC AK
is the majority. My original question was whether anyone else has a problem
with CAE software and the EBC method.
This CBtest part of GENRad seems to choke on the K of diodes and the GDS of
fets but not the EBC part of transistors. Does anyone else have this problem
and have you found a work around other than the test Engineer changing the
pad designators globally. Changing the pads works, but there is a risk that
the file could leak out of his dept and into the released section of files,
which would be disastrous.
Regards,

Lloyd Good
Engineering Systems Co-ordinator
GE Substation Automation Systems
2728 Hopewell Place NE
Calgary, Alberta, Canada
T1Y 7J7
Tel: (403) 214-4777
Fax:(403) 287-7946
email: [EMAIL PROTECTED]


-Original Message-
From: Brad Velander [mailto:[EMAIL PROTECTED]]
Sent: Thursday, September 06, 2001 6:51 PM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] Diode pads


Jeff,
thanks for your kind words. I wasn't really in need of support but
it seems that my comments made people see red to the point where they failed
to appreciate the context of my statements. Hopefully my post earlier today
helped to refocus the context that I had intended.

Brad Velander,
Lead PCB Designer,
Norsat International Inc.,
#300 - 4401 Still Creek Dr.,
Burnaby, B.C., V5C 6G9.
Tel. (604) 292-9089 direct
Fax (604) 292-9010
website www.norsat.com


 -Original Message-
 From: Jeff Stout [mailto:[EMAIL PROTECTED]]
 Sent: Thursday, September 06, 2001 3:53 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Diode pads
 
 
SNIP
 
 Jeff Stout
 P.S.  I'm not that pure either. I use AK for diodes...  bad, 
 bad, bad.'

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Re: [PEDA] [PROTEL EDA USERS]: Designator conventions?!

2001-05-07 Thread lloyd . good

Hi all,
Even the term Designator conventions smacks of oxymoron. I am trying to
create a company library database and SOP for design. I have many Engineers
with various cultural backgrounds, some of which use some pretty weird ID's
and symbols. Before I institute my 10 commandments, I would love to see some
Designator conventions used by all of you. Please include as many as
possible in your replies. The more ammunition the better. 
Note- I would prefer more North Amercian conventions as we are a N.A
company. 
Thanks,

Lloyd Good
GE Harris Energy Control Systems Canada Inc.
2728 Hopewell Place NE
Calgary, AB, Canada T1Y 7J7
(403) 214-4777



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Re: [PEDA] [PROTEL EDA USERS]: Library Management

2001-05-07 Thread lloyd . good

David,
I couldn't agree with you more.
With regards to library management, we have had a horrific experience with
designers creating their own libraries and project libraries etc. Countless
errors have been produced by this and finally I took the initiative, much to
some designers dismay, to create a standard company library to include only
the parts not found in the existing libraries and a much reduced DEVICE
library. We have one library manager and he is responsible for any new part
construction. Yes it does slow the design process somewhat, but it
eliminates rework due to mistakes. I have indicated before that we have a
very diverse cultural menagerie of designers and with each making their own
version of the same part, well you can imagine the schematic nightmare. We
have also done this to our pcb footprint library. No footprint is used
without the manufacturing dept approval of the footprint first after its
creation.
When we use outside contractors, the same rules apply, we supply our pcb
footprint library on CD.
Just what we are doing. Seems to be working.

Lloyd Good
GE Harris Energy Control Systems Canada Inc.
2728 Hopewell Place NE
Calgary, AB, Canada T1Y 7J7
(403) 214-4777


-Original Message-
From: David Cary [mailto:[EMAIL PROTECTED]]
Sent: Friday, February 23, 2001 1:05 PM
To: Multiple recipients of list proteledausers
Subject: Re: [PROTEL EDA USERS]: Library Management






Dear Andy Lintz,

I've been wodering about this myself. Why does everyone have to re-invent
the
wheel ?

Andy Lintz asked for library advice:
 I want to set up a system to maintain orderly control over my parts and
boards.   Some of you seasoned pros probably have some good advice on the
topic
that might get me started off on the right path.

There are so many library files and it seems impossible to tell where a
given
part originated from once it is in a design.  Is it wise to make a company
library of only the parts actually used, and copy individual parts to this
company maintained library?

I've been trying to do that. But it seems that all the other designers have
their own ideas on how to organize a library, so we've ended up with an
individual library for each person. When a person takes over a project (or
when
he wants to use a part originally used on someone elses's project), stuff
gets
copied into his personal library.

I keep thinking there ought to be a better way.

Is it correct that the libraries are only accessed when a part is first
placed,
when the 'update parts from cache' in Schematic Editor is executed, or when
the
'Update PCB' in the PCB Footprint Editor is executed?  (The libraries are
not
used or needed each time the design is opened, right?)

Yes. If you email a .sch or .pcb file to me, I can view it, even though
I
don't have any of your libraries. By using Design | Make Project Library I
can
extract a library of symbols from your schematic, or Design | Make Library
to
extract a library of footprints from your layout.


If I execute a 'Make Library' command from inside a schematic or pcb
design, do
all parts then reference that new library instead of whatever library they
were
originally placed from?

No. Stuff inside a schematic or pcb always references the cache embedded in
that
same .sch or .pcb file. Those things never reference any library.

Often I would like to know which library a particular item came from. But
unfortunately, with Protel 99SE s.p. 6, it's impossible to find out which
library it came from.

What is general practice on the use of the library read-only fields and
part
fields?  Are company part numbers usually assigned to one of the part
fields,
one of the library fields, or not at all in Protel?  (If its the library
fields,
I think that means a unique library part for each value of resistor and cap)
...
Andrew Lintz

Good question. The designer next door to me has a unique library symbol for
each
value of resistor and cap on his schematics; the Lib Ref field (symbol
name)
contains the company part number.

Another method I've seen for naming schematic symbols (which Baldwin insists
on
calling a ``gate decal'') and naming footprints (which Baldwin calls a ``pcb
decal''):
  PCB Design Guidelines:Naming Conventions
  http://www.baldwin-tech.com/designgu.htm

I keep thinking there ought to be a better way.

--
David Cary



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Re: [PEDA] Printing schematics

2001-05-07 Thread lloyd . good

Hello all,

One thing I have never figured out is how to arrange the order of the sheets
in a project so that they are in the order that I want, and that they print
in that order. Has anyone ever bothered to figure it out and could you
please enlighten me?!

Regards,

Lloyd Good
GE Harris Energy Control Systems Canada Inc.
2728 Hopewell Place NE
Calgary, AB, Canada T1Y 7J7
(403) 214-4777


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Re: [PEDA] .Legend on the Drill Drawing layer.

2001-05-07 Thread lloyd . good

I may be wrong but as I understand it, gerber layers don't have holes in the
pads. So it would seem reasonable to assume that your total 2030 is 0mm.
Unless your talking about the NC drill files in which case I'm talking
through my hat and you're in trouble.
Regards,

Lloyd Good
GE Harris Energy Control Systems Canada Inc.
2728 Hopewell Place NE
Calgary, AB, Canada T1Y 7J7
(403) 214-4777


-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, April 04, 2001 2:34 AM
To: Protel EDA Forum
Subject: [PEDA] .Legend on the Drill Drawing layer.


Dear Members,

I always trust the drill chart which protel creats on the drill drawing
layer, (with a special string .Legend on the drill drawing layer). But This
time, when I check the gerber file, I find that the drill chart does not
match the actual holes well. From the hole size editor, I get the number of
0.4mm holes is 2026, and 1.5mm holes is 4, But from the gerber file, It says
that there are 2030 holes with 0mm dia, and no holes with 1.5mm dia. Does
anyone else come across that? Or How can I solve that? Any inputs would be
great appraciate.

BTW, I am quite busy these days. Maybe I will not respond your mail
promptly, But I can hear the voice from you all, and thanks very much for
your kindly responses.

The best wishes to you all.

Luo.



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Re: [PEDA] Gold Emersion

2001-05-07 Thread lloyd . good

Can anyone direct me to some research papers published about the advantages
and disadvantages of using Gold emersion on mulitlayer pcbs. I have only
heard information from pcb vendors but would like to see something
published. Any documentation that includes manufacturing results would be
great.
Thanks in advance.

Lloyd Good
Engineering Systems Co-ordinator
GE Harris Energy Control Systems Canada Inc.
2728 Hopewell Place NE
Calgary, AB, Canada T1Y 7J7
* +1 (403) 214-4777
* +1 (403) 287-7946


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Re: [PEDA] Gold Emersion

2001-05-07 Thread lloyd . good

Hi Brad,
My understanding is that gold emersion is great for fine pitch, better
conduction, excellent shelf life, and reduction in board warp due to
inconsistent board cooling and thermal shock as it occurs with HASL.
My Manufacturing people are worried because, the profile temps in the oven
need to be higher in order to get the solder to wick and flow. How does this
affect board warp? I would hypothesize that because the profile is a gradual
increase there is no thermal shock as in HASL but what are the other
factors and effects.
I checked out that website and it has some information but not enough to do
adequate research.
Any comments?


Lloyd Good
Engineering Systems Co-ordinator
GE Harris Energy Control Systems Canada Inc.
2728 Hopewell Place NE
Calgary, AB, Canada T1Y 7J7
* +1 (403) 214-4777
* +1 (403) 287-7946


-Original Message-
From: Brad Velander [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, April 17, 2001 11:35 AM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] Gold Emersion


Lloyd,
here is a relatively good reference source:

http://www.merix.com/main_res.html

Select DFM and proceed to the section on plating.

What is your question? Possibly I have some answer if I knew the
precise question. I have several other papers in printed form on various
board platings and relative performances (not really specific but generic
comparisons, if you know what I mean. Lots of talk but little specific
detailed comparisons).

Sincerely,

Brad Velander
Lead PCB Design
Norsat International Inc.
#100 - 4401 Still Creek Dr.,
Burnaby, B.C., Canada.
V5C6G9.
voice: (604) 292-9089 (direct line)
fax:(604) 292-9010
email: [EMAIL PROTECTED]
www: www.norsat.com


 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
 Sent: Tuesday, April 17, 2001 10:18 AM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] Gold Emersion
 
 
 Can anyone direct me to some research papers published about 
 the advantages
 and disadvantages of using Gold emersion on mulitlayer pcbs. 
 I have only
 heard information from pcb vendors but would like to see something
 published. Any documentation that includes manufacturing 
 results would be
 great.
 Thanks in advance.
 
 Lloyd Good
 Engineering Systems Co-ordinator
 GE Harris Energy Control Systems Canada Inc.
 2728 Hopewell Place NE
 Calgary, AB, Canada T1Y 7J7
 * +1 (403) 214-4777
 * +1 (403) 287-7946



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Re: [PEDA] Netlist error?

2001-05-07 Thread lloyd . good

This is a new one for me.
I have a heiarchical design with 8 pages. Everything passes the ERC and from
the observation, looks fine but when I try to generate a netlist it seems to
not connect one page. Even the power ports on that one page create their own
nodes. So if the rest of the design has a net called GND, this page also has
a net called GND which should be connected to the other GND net, but isn't.
I'm scratching my head on this one. I tried to rejoin the page on the
project sheet by using the -Tools-Create symbol from Sheet. This was not
successful. The really weird thing is that the power ports which should be
global aren't being connected. 
Any suggestions?!

Lloyd Good
Engineering Systems Co-ordinator
GE Harris Energy Control Systems Canada Inc.
2728 Hopewell Place NE
Calgary, AB, Canada T1Y 7J7
* +1 (403) 214-4777
* +1 (403) 287-7946


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Re: [PEDA] Netlist error?

2001-05-07 Thread lloyd . good

Thanks all for your input. What I serendipidiously discovered was many short
fragments of wires scattered throughout this particular sheet which created
junctions between nodes that shouldn't have been connected. I went through
the hard copy to see what connections were valid and eliminated the wrong
connections. Viola.fixed. Apparently Protels ERC checker did not pick up
the multiple connections for what ever reason. I even made sure the multiple
net name check was on. It may have to do with the sheet not having many net
labels on the connectionsnot sure.
Thanks again,

Lloyd Good
Engineering Systems Co-ordinator
GE Harris Energy Control Systems Canada Inc.
2728 Hopewell Place NE
Calgary, AB, Canada T1Y 7J7
* +1 (403) 214-4777
* +1 (403) 287-7946


-Original Message-
From: Terry Harris [mailto:[EMAIL PROTECTED]]
Sent: Monday, May 07, 2001 10:19 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Netlist error?


On Mon, 07 May 2001 11:08:40 -0400, you wrote:

I cleaned up this schematic from another designer who didn't realize power
ports were global, so he placed ports on all the sheets routing GND, VCC
etc. Now that it's all cleaned up, I get this disjointed GND net. The VCC
net seems to be connecting as do all the other netshuh?

Ahh, that could be a tricky area - I seem to remember something about using
port connections to isolate power nets between sheets. 

Like supplying static RAM with a battery backed VCC by placing it on a
separate sheet and connecting power with ports. 

There may even be an example in the handbook or somewhere. 

I don't know exactly how it was supposed to work or if it is still supposed
to work like that. Make double sure you don't have any GND ports left on
the sheet (or sheet symbols). 


Cheers, Terry.


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