Re: [PEDA] Altium Release Protel DXP
On 07:00 AM 30/07/2002 +0100, Terry Harris said: ..SNIP..I'm sure - but it isn't going to change anything soon - the only question for most of us is do we want DXP instead of 99SE and if so do we want it as much as the upgrade price. I remember some of the promises about DXP that were on the Protel web site, something about new design database storage systems allowing designers to manage their designs and work the way they want to work. DXP has one new storage system and it is less flexible and less capable than the 99SE system. The only advantage seems to be you can open a file without having to put it in a database first - pretty much like Protel PCB could 15 years ago. No argument from me on this. Ian * Tracking #: 289C3AC48CBB03429951976FE3F5B3FC008F1888 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Altium Release Protel DXP
Stefan, I think your problem is lack of RAM - You really need 512MB of RAM, not KB! To get Windows XP to run in half a megabyte is incredible! Actually, I realise it's a typo, and if DXP needs more than the half a gigabyte that you have then I'm stunned. I'd have thought that it would use a swap file before it reported out of memory errors. What memory usage does the 'Task Manager' report? Steve. -Original Message- From: Electrodev [mailto:[EMAIL PROTECTED]] Sent: 30 July 2002 11:27 To: 'Protel EDA Forum' Subject: Re: [PEDA] Altium Release Protel DXP Hi, Has anybody else had the message Program too big to fit into memory on the trial version. My system :P4 2GHz 512 Kb 23Gb free XP Pro File downloaded without a problem and is the correct size. Help! Stefan * Tracking #: BE06FA110E7DC242B756958BDC21262A50E67524 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Altium Release Protel DXP
No need to apologise - I realised it was a typo - I should apologise for the sarcasm! Do you get this error when you try to install the software, or after the install, when you run it? If it's when you try to install it, then I think you are probably correct about the bad file. I have seen this when I've tried to run a corrupt file. If, however, the installation goes ok, then it probably isn't a bad file, as it would almost certainly report a crc error or similar when you installed. Good luck. Steve. -Original Message- From: Electrodev [mailto:[EMAIL PROTECTED]] Sent: 30 July 2002 12:33 To: 'Protel EDA Forum' Subject: Re: [PEDA] Altium Release Protel DXP Sorry Steve Not 512kB 512MB plenty still unused with page file. Think it might be download error even if file looks good. Getting the CD and will just have to wait. Thanks for response Stefan * Tracking #: CF2DFAE8C786C1449CDCAECC2DC9302C797677E2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] OT: HTML
Hi all I'm tweaking my Eudora. Does this mail contains HTML? How does it look with an no-html-client? Thanks Edi Im Hof + IH electronic+ Phone: ++41 52 320 90 00 + + Edi Im Hof + Fax: ++41 52 320 90 04 + + Doernlerstrasse 1, Sulz + URL: http://www.ihe.ch + + CH-8544 Rickenbach-Attikon + E-Mail: [EMAIL PROTECTED] + + Switzerland + + * Tracking #: B00D239EFE5E8543BAFC0363B4730F2451B61D3E * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] OT: HTML
Edi Im Hof wrote: Hi all I'm tweaking my Eudora. Does this mail contains HTML? How does it look with an no-html-client? It seems that it's plain text e-mail and looks OK. Wojciech Oborski * Tracking #: B1D9B50068079848AE2FA4D94D89A2463BB77828 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] OT: HTML
Hi Edi, The email I received is plan text, I'm using Outlook 2002. Darren Moore -Original Message- From: Edi Im Hof [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 30 July 2002 23:02 To: Protel EDA Forum Subject: [PEDA] OT: HTML Hi all I'm tweaking my Eudora. Does this mail contains HTML? How does it look with an no-html-client? Thanks Edi Im Hof * Tracking #: D369430BF5350148A0DCBEA42EB7AE3DD3D7E122 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Manual edit for adding net classes?
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Re: [PEDA] DXP Discussion
Ian wrote, Just a brief comment before the discussion really hots up. My comments: Ian,follow the context of the messages on this forum from release of 99 to present. The earlier tone from these discussions was nothing but frustration. Some of us were mad as hell at simple things not working like INSTALL. There is no reason for mature software to take a 3 year step backwards for simple tasks like copy, select, install, etc.I think the tone of the feedback to follow in the next few months will reflect the same tone that was discussed in 99 early years. Contructive input is years away Lets try to make the discussion constructive. Altium do watch this list and I would guess they would be watching this as one of their prime sources of feedback. I disagree,This is expensive software. I purchase $49.00 software and complain to store managers if my $49.00 package doesnt work, why shouldnt ALTIUM receive heat from us about not correcting bugs and not meeting our expectations. We are the paying customer. SIMPLE AS THAT If I take ALTIUMS attitude with my customers, I would be out of business. We can bag DXP - that is really easy. Can we do the harder stuff of being constructive? We can bag DXP? I too participated in the BETA program, but unlike some who choose to invest 100 hours debugging a program that wasn't ready for prime time, I looked at for the features I wanted and they weren't there. I evaluated the program for my requirements in less than 5 minutes. PROTEL programs no longer meets my design requirements, simple as that. I would expect the current program is finally ready for Beta testing by all the users who wish to pay for it. I just spent the last several years figuring out how 99SE works, what makes it crash, how not to make it crash and how to get around long compilations that send my computer to PLUTO. I wont spend the same time this time with a program that offers no clear advantage to upgrading. How is that for constructive? I will sit back and read all of the DXP input now Mike Reagan EDSI * Tracking #: 8F71C4C0EBD99A44A6DCA9CE6224F55C32D84C88 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Manual edit for adding net classes?
Re: [PEDA] Manual edit for adding net classes?
Yes but as I mentioned I have over 40nets and want to add the net classes in a text format so I can do it all at once (like an INI file or the old place txt file where you could place components by XY co-ordinates we did that for placing test points in specified locations -- you sure didn't want to do that one at a time. Fran -Original Message- From: Steve Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 9:53 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Manual edit for adding net classes? Fran, Design Netlist Manager Select the far left Add button. Name your net class and select the nets you wish to add to this new class and hit the arrow key. Regards, Steve Smith Product Engineer Staco Energy Products Co. Web Site: www.stacoenergy.com -Original Message- From: Frances Wheeler [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:41 AM To: Protel EDA Forum Subject: [PEDA] Manual edit for adding net classes? I have some PCI traces that I want to add the lengths up -- From the connector to the resistor pin 1 = 1 length (which is critical and has a not to exceed) From the resistor pin 2 to BGA pin = 2nd length The above to distances must be added together and not to exceed 2.5 inches In the rules I can add a net and a net class together, sooo I wanted to make a bunch of net classes but it's tedious to do one at a time - is there a file I can edit. As the net class is in fact going to be only one net there are over 40 such nets to add up. Any suggestions Fran * Tracking #: 7957B880BF5285439BBDF79AB632F21B2BDB4A55 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Manual edit for adding net classes?
Yes I know that I can get all the information on lengths etc with the report file (net status) I can select each net 1 at a time, I want to add this to the rules I want to input a txt file with the net classes in a less tedious manner -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:03 AM To: Protel EDA Forum Subject: Re: [PEDA] Manual edit for adding net classes? In a message dated 7/30/2002 10:48:55 AM Eastern Daylight Time, [EMAIL PROTECTED] writes: I have some PCI traces that I want to add the lengths up -- From the connector to the resistor pin 1 = 1 length (which is critical and has a not to exceed) From the resistor pin 2 to BGA pin = 2nd length The above to distances must be added together and not to exceed 2.5 inches In the rules I can add a net and a net class together, sooo I wanted to make a bunch of net classes but it's tedious to do one at a time - is there a file I can edit. As the net class is in fact going to be only one net there are over 40 such nets to add up. There's a tool within Protel to do this, but as I recall I had to add it to the menu manually; I think it wasn't there by default. I have a Measure Selection under the Reports menu, which maps to PCB:MeasureSelectedObjects. Since it works on the current selection it should be able to do exactly what you want. Steve Hendrix * Tracking #: 5750F4037BA4794385E959200441E3EAB0EDC758 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PCB houses
Dennis, no I didn't mean 1 oz. foil or starting copper weight, I meant 1 oz. plating. I thought that my comment was fairly clear but I guess not. I had also mentioned that they have an automated plating line which supposedly was their reason for only plating one weight of copper without screwing up their line for varying plating thickness. As I mentioned, Daniel says he has had different experiences with Enigma, so now I am in the dark about why we were told they only plated 1 oz. Cu. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED]] Sent: Monday, July 29, 2002 6:13 PM To: Protel EDA Forum Subject: Re: [PEDA] PCB houses just to clarify terms here don't you really mean 'starting weight' 1oz copper not '1 oz plating'? 1/2 oz starting wt is used for finer pitch and lines and 2 oz for some power applications the traditional tin lead plating is in addition to that Dennis Saputelli * Tracking #: A8C2DED5D263AB418172C67F406A6727ECE3176F * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PCB houses
I don't have a real answer here so perhaps it would be wiser to keep quiet but maybe there's a reason this company is called Enigma ??? ;) Like in making their specs top secret even for customers? Best Regards, Matt Tudor , MSEE http://www.gigahertzelectronics.com - Original Message - From: Brad Velander [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 11:17 AM Subject: Re: [PEDA] PCB houses Dennis, no I didn't mean 1 oz. foil or starting copper weight, I meant 1 oz. plating. I thought that my comment was fairly clear but I guess not. I had also mentioned that they have an automated plating line which supposedly was their reason for only plating one weight of copper without screwing up their line for varying plating thickness. As I mentioned, Daniel says he has had different experiences with Enigma, so now I am in the dark about why we were told they only plated 1 oz. Cu. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED]] Sent: Monday, July 29, 2002 6:13 PM To: Protel EDA Forum Subject: Re: [PEDA] PCB houses just to clarify terms here don't you really mean 'starting weight' 1oz copper not '1 oz plating'? 1/2 oz starting wt is used for finer pitch and lines and 2 oz for some power applications the traditional tin lead plating is in addition to that Dennis Saputelli * Tracking #: A8C2DED5D263AB418172C67F406A6727ECE3176F * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Manual edit for adding net classes?
I haven't looked into it, but I believe this could be done, by saving the pcb to an ASCII file then editing the text there. Rob Frances Wheeler [EMAIL PROTECTED] on 07/30/2002 11:09:21 AM Please respond to Protel EDA Forum [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] cc:(bcc: Rob LaMoreaux/DSPT) Subject: Re: [PEDA] Manual edit for adding net classes? Yes but as I mentioned I have over 40nets and want to add the net classes in a text format so I can do it all at once (like an INI file or the old place txt file where you could place components by XY co-ordinates we did that for placing test points in specified locations -- you sure didn't want to do that one at a time. Fran -Original Message- From: Steve Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 9:53 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Manual edit for adding net classes? Fran, Design Netlist Manager Select the far left Add button. Name your net class and select the nets you wish to add to this new class and hit the arrow key. Regards, Steve Smith Product Engineer Staco Energy Products Co. Web Site: www.stacoenergy.com -Original Message- From: Frances Wheeler [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:41 AM To: Protel EDA Forum Subject: [PEDA] Manual edit for adding net classes? I have some PCI traces that I want to add the lengths up -- From the connector to the resistor pin 1 = 1 length (which is critical and has a not to exceed) From the resistor pin 2 to BGA pin = 2nd length The above to distances must be added together and not to exceed 2.5 inches In the rules I can add a net and a net class together, sooo I wanted to make a bunch of net classes but it's tedious to do one at a time - is there a file I can edit. As the net class is in fact going to be only one net there are over 40 such nets to add up. Any suggestions Fran * Tracking #: 7957B880BF5285439BBDF79AB632F21B2BDB4A55 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
Just downloaded DXP demo yesterday and rejoined the forum (missed any earlier discussion). My initial impressions: To compare the product I choose an 8-channel amplifier board that is one of six identical cards used in a 48 transducer system. Of course this was very tedious to do (or tedious to maintain, take your pick) with 99SE methods for handling multiple channels and the even the auto routing of a single two-sided card was ridiculously complex and loaded with vias. The interesting thing about the test is that the card layout by hand is actually quite simple and can be routed by someone with minimal experience (me) with no vias and nice trace hugging. To facilitate comparison, I created the auto routing test PCB from my hand layout by locking those traces that clearly reflected choices that I was making to influence the layout, both design and aesthetic, (like power rails and initial signal fanouts from connectors). DXP routes the card essentially the same as my hand layout in about 1.5 minutes, but with about 6 vias. 99SE failed to complete the route and makes a mess of what it does complete, with about 40 vias left standing. BOTH PACKAGE WILL IDENTICALLY UNROUTE SOME OF THE LOCKED TRACES when cleaning the board between tests. Since they do this identically to some (not all) of the unconnected prerouted stubs I used to influence the layout, I assume this is the identical software still in place. If the multichannel features work at all, they will be a big win for me and huge step in the right direction. I will let you know. If the flat file project methods work reliably, that is also a plus as it reflects the way most programming IDE's work with complete independent access to files, the file dates, etc. My guess is: no more trips to PLUTO! So for moderate level projects like I have, DXP might be a big win. On the other hand it may not be as improved as I would like. Even a quick cursory test revealed that the old bugs are still there. But other problems with 99SE were more limiting than the few bugs I learned to tolerate. These things made 99SE largely unworkable (PLUTO effect and multichannel maintenance, etc). regards, Tim Hutcheson Institute for Human and Machine Cognition 40 S. Alcaniz St. Pensacola, FL 32503 805-202-4461 * Tracking #: 6C599303C0C24742B2C84717B879B55BD05BC46C * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PCB houses
Or maybe the owner's name is E. (Edward) Nigma ? (That was the real name of one of Batman's nemeses, the Riddler). Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com - Original Message - From: mariusrf [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 11:33 AM Subject: Re: [PEDA] PCB houses I don't have a real answer here so perhaps it would be wiser to keep quiet but maybe there's a reason this company is called Enigma ??? ;) Like in making their specs top secret even for customers? Best Regards, Matt Tudor , MSEE http://www.gigahertzelectronics.com - Original Message - From: Brad Velander [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 11:17 AM Subject: Re: [PEDA] PCB houses Dennis, no I didn't mean 1 oz. foil or starting copper weight, I meant 1 oz. plating. I thought that my comment was fairly clear but I guess not. I had also mentioned that they have an automated plating line which supposedly was their reason for only plating one weight of copper without screwing up their line for varying plating thickness. As I mentioned, Daniel says he has had different experiences with Enigma, so now I am in the dark about why we were told they only plated 1 oz. Cu. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED]] Sent: Monday, July 29, 2002 6:13 PM To: Protel EDA Forum Subject: Re: [PEDA] PCB houses just to clarify terms here don't you really mean 'starting weight' 1oz copper not '1 oz plating'? 1/2 oz starting wt is used for finer pitch and lines and 2 oz for some power applications the traditional tin lead plating is in addition to that Dennis Saputelli * Tracking #: A8C2DED5D263AB418172C67F406A6727ECE3176F * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Manual edit for adding net classes?
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Re: [PEDA] Altium Release Protel DXP
Try removing your mouse . . . Just kidding - just kidding . . . JaMi - Original Message - From: Stephen Casey [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 5:15 AM Subject: Re: [PEDA] Altium Release Protel DXP John, I'm glad it works for you. It doesn't work for me yet. I did install to NOT the default install path (I put it in '\altium', rather than '\program files\altium'), so I uninstalled, and then re-installed to the default path, just in case. Anyway, it still doesn't work, which is a shame, as I would love to try it out. Steve. -Original Message- From: John Ross [mailto:[EMAIL PROTECTED]] Sent: 29 July 2002 12:39 To: Protel EDA Forum Subject: [PEDA] Altium Release Protel DXP Just D/L it Altium, Thanks for the proper metric support, NOT! in SCH for PCB directives layout. First thing I tried, as the lack of PCB rules definition in SCH their translation in 98/99/SE was years behind anyone else. * Tracking #: 818E3996FB41B3A090169FAB27397F0DF461 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Altium Release Protel DXP
Jami, that was truly funny!! :) -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:14 AM To: Protel EDA Forum Subject: Re: [PEDA] Altium Release Protel DXP Try removing your mouse . . . Just kidding - just kidding . . . JaMi - Original Message - From: Stephen Casey [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 5:15 AM Subject: Re: [PEDA] Altium Release Protel DXP John, I'm glad it works for you. It doesn't work for me yet. I did install to NOT the default install path (I put it in '\altium', rather than '\program files\altium'), so I uninstalled, and then re-installed to the default path, just in case. Anyway, it still doesn't work, which is a shame, as I would love to try it out. Steve. -Original Message- From: John Ross [mailto:[EMAIL PROTECTED]] Sent: 29 July 2002 12:39 To: Protel EDA Forum Subject: [PEDA] Altium Release Protel DXP Just D/L it Altium, Thanks for the proper metric support, NOT! in SCH for PCB directives layout. First thing I tried, as the lack of PCB rules definition in SCH their translation in 98/99/SE was years behind anyone else. * Tracking #: 818E3996FB41B3A090169FAB27397F0DF461 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
Ian, This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? Talk about George Orwellean 1984 doublespeak . . . JaMi - Original Message - From: Ian Wilson [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 11:26 PM Subject: [PEDA] DXP Discussion Hello all, Just a brief comment before the discussion really hots up. There is lots to like about DXP. There is lots to re-learn. There is lots that is the same. There is lots to dislike. Lets try to make the discussion constructive. Altium do watch this list and I would guess they would be watching this as one of their prime sources of feedback. We can bag DXP - that is really easy. Can we do the harder stuff of being constructive? All that said, I am ready to call something rubbish when I think it is. There are a number of us that will be somewhat circumspec as the NDA beta testers signed does cover some info we may have received. Also, IMO, I think it is well worthwhile letting fresh eyes pass comment without too much prompting. Ian Wilson * Tracking #: A153AA0099921341A1FD9A73CE937F13AA986D52 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
Part of the beta agreement was to not disclose things that transpired during the beta period. That would seem to imply good or bad. The comments made on this list should be 'freshly formed' from the released demo that everyone has access to right now, not from what beta people saw in the past. -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:45 AM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] DXP Discussion Ian, This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? Talk about George Orwellean 1984 doublespeak . . . JaMi - Original Message - From: Ian Wilson [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 11:26 PM Subject: [PEDA] DXP Discussion Hello all, Just a brief comment before the discussion really hots up. There is lots to like about DXP. There is lots to re-learn. There is lots that is the same. There is lots to dislike. Lets try to make the discussion constructive. Altium do watch this list and I would guess they would be watching this as one of their prime sources of feedback. We can bag DXP - that is really easy. Can we do the harder stuff of being constructive? All that said, I am ready to call something rubbish when I think it is. There are a number of us that will be somewhat circumspec as the NDA beta testers signed does cover some info we may have received. Also, IMO, I think it is well worthwhile letting fresh eyes pass comment without too much prompting. Ian Wilson * Tracking #: A153AA0099921341A1FD9A73CE937F13AA986D52 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] HTML in e-mail == naughty
Forum members: I don't know how it's happening, but some of the messages posted to this list override the default fonts on my e-mail program (Outlook Express). I suspect that some of us have our e-mail programs set up to format message text in HTML. While this may look neat to you, I ask that you please consider using plain text only (no HTML). I'd rather see e-mail in the font I choose, not what you think is best. Also, HTML wastes bandwidth and storage. Thanks. BTW, it probably looks like I am using HTML in this message. It's OE's fault, when I reply to a message, the reply takes on the formatting of the original message (g!). If it's not HTML causing this, I don't know where OE gets it's ideas of font overrides... Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com * Tracking #: 3A5AA7E78ECD9F42BC5C3BBD846BCD5BC47F22C7 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] PREFIX SUBJECT HEADERS
Guys and Gals, It looks like this list is going to get very very busy here in the next few weeks with all of the various threads that are going to be popping up with DXP, and the ongoing fun with 99 SE. I was wondering whether or not we all might want to do ourselves a favor and come up with some kind of convention that will help us track the subject of a thread that we are trying to follow, while at the same time not miss something important and help someone who has a problem and needs some help, just because of the clutter of messages. I would therefore pose the following to the members of the forum to stimulate discussion on an acceptable solution. 1. ) Do nothing - just live with everything as it is. 2. ) Offload everything related to DXP to the Protel Development Fourm list. I myself do not think that this is the answer, but maybe that is what the rest of you want to do. 3. ) Create a DXP Users Forum and move all DXP related stuff there. Again, not my preference, as I believe that DXP and 99SE may be to closely intertwined. 4. ) Prefix the SUBJECT field of all messages with either a 1 or 3 letter PREFIX which would immediately identify it as either P99 of DXP related, for example, in the subject line: P99 - Mouse Bug; or DXP - Mouse Bug Still Here, or possibly using only one letter: P - Mouse Bug; or D - Mouse Bug Still Here (I know, everybody just loves my example, come on, its a joke!). Actually, we probably don't even need the - after the 1 or 3 letters if we just leave a space before the actual subject. This initial indicator of a either 1 or a few letters would let everyone know which product the email applied to, so that they could skip it if they were not interested. Most importantly, this would not take up too much room in the subject line, and yet at the same time it would allow messages to be sorted by Product in the subject field. Food for thought. JaMi * Tracking #: 7AD83503E400D8489A71542F11EBC46EFB315CBC * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
Tony, Thank you for the reminder, I don't think I have disclosed anything other than reinforcing any commentary that I have posted here for the past year and long before dXP was a gleam in the Kangaroo's eye. I believe Andrew Jenkins past comments on here also reflect the poor response from Protel to fix bugs and make 99SE more usable.I wish they would sell me the old 99 code, let me hire some of their programmers to polish an already good program like 99SE. It is a very good program , it just could be better without having to write code from the floor up. Mike Reagan EDSI - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 10:54 AM Subject: Re: [PEDA] DXP Discussion Part of the beta agreement was to not disclose things that transpired during the beta period. That would seem to imply good or bad. The comments made on this list should be 'freshly formed' from the released demo that everyone has access to right now, not from what beta people saw in the past. -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:45 AM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] DXP Discussion Ian, This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? Talk about George Orwellean 1984 doublespeak . . . JaMi - Original Message - From: Ian Wilson [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 11:26 PM Subject: [PEDA] DXP Discussion Hello all, Just a brief comment before the discussion really hots up. There is lots to like about DXP. There is lots to re-learn. There is lots that is the same. There is lots to dislike. Lets try to make the discussion constructive. Altium do watch this list and I would guess they would be watching this as one of their prime sources of feedback. We can bag DXP - that is really easy. Can we do the harder stuff of being constructive? All that said, I am ready to call something rubbish when I think it is. There are a number of us that will be somewhat circumspec as the NDA beta testers signed does cover some info we may have received. Also, IMO, I think it is well worthwhile letting fresh eyes pass comment without too much prompting. Ian Wilson * Tracking #: A153AA0099921341A1FD9A73CE937F13AA986D52 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] (No Subject)
Hi everybody, I am a Graduate student and I am currently working on designing a PCB for a Xilinx FPGA. I have started using Protel-99-SE trial version for the same. Recently I noticed that the support site of Protel offers 2 documents to ATS members (altium total support) members which I might have use for. Now I think it may be unethical but still I think I need these 2 application notes.I was hoping somebody in this group who is also an ATS member could help me out with this.They ask for a valid 9-digit Serial (License) Number . The document names are : 1) Attributes for FPGA Devices and 2) Protel DXP Xilinx Interface and the link is http://www.protel.com/resources/tutorials/index.html hope someone helps Anand Kulkarni _ Supercharge your e-mail with a 25MB Inbox, POP3 Access, No Ads and NoTaglines -- LYCOS MAIL PLUS. http://www.mail.lycos.com/brandPage.shtml?pageId=plus * Tracking #: 60F1D03235BBB44DA204BFF1518CCD98F66C6544 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
Hi Mike, My comment was more focused on Jami's comment to Ian: This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? I hinted that it might be possible for Ian to not say too much because of the NDA. Tony -Original Message- From: Michael Reagan (EDSI) [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 2:36 PM To: Protel EDA Forum Subject: Re: [PEDA] DXP Discussion Tony, Thank you for the reminder, I don't think I have disclosed anything other than reinforcing any commentary that I have posted here for the past year and long before dXP was a gleam in the Kangaroo's eye. I believe Andrew Jenkins past comments on here also reflect the poor response from Protel to fix bugs and make 99SE more usable.I wish they would sell me the old 99 code, let me hire some of their programmers to polish an already good program like 99SE. It is a very good program , it just could be better without having to write code from the floor up. Mike Reagan EDSI - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 10:54 AM Subject: Re: [PEDA] DXP Discussion Part of the beta agreement was to not disclose things that transpired during the beta period. That would seem to imply good or bad. The comments made on this list should be 'freshly formed' from the released demo that everyone has access to right now, not from what beta people saw in the past. -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:45 AM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] DXP Discussion Ian, This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? Talk about George Orwellean 1984 doublespeak . . . JaMi - Original Message - From: Ian Wilson [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 11:26 PM Subject: [PEDA] DXP Discussion Hello all, Just a brief comment before the discussion really hots up. There is lots to like about DXP. There is lots to re-learn. There is lots that is the same. There is lots to dislike. Lets try to make the discussion constructive. Altium do watch this list and I would guess they would be watching this as one of their prime sources of feedback. We can bag DXP - that is really easy. Can we do the harder stuff of being constructive? All that said, I am ready to call something rubbish when I think it is. There are a number of us that will be somewhat circumspec as the NDA beta testers signed does cover some info we may have received. Also, IMO, I think it is well worthwhile letting fresh eyes pass comment without too much prompting. Ian Wilson * Tracking #: A153AA0099921341A1FD9A73CE937F13AA986D52 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PREFIX SUBJECT HEADERS
How about just including DXP anywhere in the Subject if it's DXP related and not 99SE or prior? I think most of us have some sort of mail filter that could sort it. I current use the PEDA string to get it into a Protel mail folder, away from my regular inbox. I could search for DXP to subdivide if further. Tony -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 11:23 AM To: Protel EDA Forum Cc: JaMi Smith Subject: [PEDA] PREFIX SUBJECT HEADERS Guys and Gals, It looks like this list is going to get very very busy here in the next few weeks with all of the various threads that are going to be popping up with DXP, and the ongoing fun with 99 SE. I was wondering whether or not we all might want to do ourselves a favor and come up with some kind of convention that will help us track the subject of a thread that we are trying to follow, while at the same time not miss something important and help someone who has a problem and needs some help, just because of the clutter of messages. I would therefore pose the following to the members of the forum to stimulate discussion on an acceptable solution. 1. ) Do nothing - just live with everything as it is. 2. ) Offload everything related to DXP to the Protel Development Fourm list. I myself do not think that this is the answer, but maybe that is what the rest of you want to do. 3. ) Create a DXP Users Forum and move all DXP related stuff there. Again, not my preference, as I believe that DXP and 99SE may be to closely intertwined. 4. ) Prefix the SUBJECT field of all messages with either a 1 or 3 letter PREFIX which would immediately identify it as either P99 of DXP related, for example, in the subject line: P99 - Mouse Bug; or DXP - Mouse Bug Still Here, or possibly using only one letter: P - Mouse Bug; or D - Mouse Bug Still Here (I know, everybody just loves my example, come on, its a joke!). Actually, we probably don't even need the - after the 1 or 3 letters if we just leave a space before the actual subject. This initial indicator of a either 1 or a few letters would let everyone know which product the email applied to, so that they could skip it if they were not interested. Most importantly, this would not take up too much room in the subject line, and yet at the same time it would allow messages to be sorted by Product in the subject field. Food for thought. JaMi * Tracking #: 7AD83503E400D8489A71542F11EBC46EFB315CBC * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
From Alan Todd (Altium) when I asked for some clarification on the NDA: To make any comments about work arounds or techniques you have found is OK and I would encourage you to do so if you wish as this helps spread the collective knowledge of the application. The sort of topics that you should not discuss are details about issues that existed in earlier versions that were fixed. I don't personally see much that is of great concern with this project, but if in doubt, just ask yourself if it could have been discovered without having been involved in the Beta project, it should be OK. I hope this makes things a little bit clearer Frank At 02:35 PM 7/30/2002 -0700, Mike Reagan wrote: Tony, Thank you for the reminder, I don't think I have disclosed anything other than reinforcing any commentary that I have posted here for the past year and long before dXP was a gleam in the Kangaroo's eye. I believe Andrew Jenkins past comments on here also reflect the poor response from Protel to fix bugs and make 99SE more usable.I wish they would sell me the old 99 code, let me hire some of their programmers to polish an already good program like 99SE. It is a very good program , it just could be better without having to write code from the floor up. Mike Reagan EDSI - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 10:54 AM Subject: Re: [PEDA] DXP Discussion Part of the beta agreement was to not disclose things that transpired during the beta period. That would seem to imply good or bad. The comments made on this list should be 'freshly formed' from the released demo that everyone has access to right now, not from what beta people saw in the past. -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:45 AM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] DXP Discussion Ian, This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? Talk about George Orwellean 1984 doublespeak . . . JaMi - Original Message - From: Ian Wilson [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 11:26 PM Subject: [PEDA] DXP Discussion Hello all, Just a brief comment before the discussion really hots up. There is lots to like about DXP. There is lots to re-learn. There is lots that is the same. There is lots to dislike. Lets try to make the discussion constructive. Altium do watch this list and I would guess they would be watching this as one of their prime sources of feedback. We can bag DXP - that is really easy. Can we do the harder stuff of being constructive? All that said, I am ready to call something rubbish when I think it is. There are a number of us that will be somewhat circumspec as the NDA beta testers signed does cover some info we may have received. Also, IMO, I think it is well worthwhile letting fresh eyes pass comment without too much prompting. Ian Wilson * Tracking #: A153AA0099921341A1FD9A73CE937F13AA986D52 * Frank Gilley Dell-Star Technologies (918) 838-1973 Phone (918) 838-8814 Fax [EMAIL PROTECTED] http://www.dellstar.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] (No Subject) - FPGA editor
I recently had a look into the subject of FPGA and Protel. I was told the FPGA router is still taken from the manufacturer (in your case XILINX). Meaning you're just using Protel to draw the schematics and send the netlist to the other tool doing the FPGA. These tools from various manufacturers are free available on the net. Since the programming interface is also in that manufacturer tool, I tend to fail recognizing the advantage of having Protel drawing the schematic. One advantage of not having the FPGA in protel is : The FPGA is a chip with pins and its internal is hidden. This allows the FPGA, in the EEPROM-type case to act as copy protection. Further, you won't have the library of functions that the XILINX tool offers. I admittedly never tried the FPGA feature of Protel. Rene * Tracking #: F1F7B1EF0462EB4F808DFB51FEE10A74C1861F3F * -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com commercial newsgroups - http://www.talkto.net Anand Kulkarni wrote: Hi everybody, I am a Graduate student and I am currently working on designing a PCB for a Xilinx FPGA. I have started using Protel-99-SE trial version for the same. Recently I noticed that the support site of Protel offers 2 documents to ATS members (altium total support) members which I might have use for. Now I think it may be unethical but still I think I need these 2 application notes.I was hoping somebody in this group who is also an ATS member could help me out with this.They ask for a valid 9-digit Serial (License) Number . The document names are : 1) Attributes for FPGA Devices and 2) Protel DXP Xilinx Interface and the link is http://www.protel.com/resources/tutorials/index.html * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
Hi, I didn't participate in the Beta test. However I may recall incorrectly that the Beta test NDA applied only during the term of the test and not after. I did the beta on 98 and I seem to recall that these were the terms. Maybe I'm wrong, does anyone have a copy of the DXP BETA NDA handy. Joe - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 2:49 PM Subject: Re: [PEDA] DXP Discussion Hi Mike, My comment was more focused on Jami's comment to Ian: This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? I hinted that it might be possible for Ian to not say too much because of the NDA. Tony -Original Message- From: Michael Reagan (EDSI) [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 2:36 PM To: Protel EDA Forum Subject: Re: [PEDA] DXP Discussion Tony, Thank you for the reminder, I don't think I have disclosed anything other than reinforcing any commentary that I have posted here for the past year and long before dXP was a gleam in the Kangaroo's eye. I believe Andrew Jenkins past comments on here also reflect the poor response from Protel to fix bugs and make 99SE more usable.I wish they would sell me the old 99 code, let me hire some of their programmers to polish an already good program like 99SE. It is a very good program , it just could be better without having to write code from the floor up. Mike Reagan EDSI - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 10:54 AM Subject: Re: [PEDA] DXP Discussion Part of the beta agreement was to not disclose things that transpired during the beta period. That would seem to imply good or bad. The comments made on this list should be 'freshly formed' from the released demo that everyone has access to right now, not from what beta people saw in the past. -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:45 AM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] DXP Discussion Ian, This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? Talk about George Orwellean 1984 doublespeak . . . JaMi - Original Message - From: Ian Wilson [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 11:26 PM Subject: [PEDA] DXP Discussion Hello all, Just a brief comment before the discussion really hots up. There is lots to like about DXP. There is lots to re-learn. There is lots that is the same. There is lots to dislike. Lets try to make the discussion constructive. Altium do watch this list and I would guess they would be watching this as one of their prime sources of feedback. We can bag DXP - that is really easy. Can we do the harder stuff of being constructive? All that said, I am ready to call something rubbish when I think it is. There are a number of us that will be somewhat circumspec as the NDA beta testers signed does cover some info we may have received. Also, IMO, I think it is well worthwhile letting fresh eyes pass comment without too much prompting. Ian Wilson * Tracking #: A153AA0099921341A1FD9A73CE937F13AA986D52 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] P99 Xilinx support
Anand Kulkarni wrote: Hi everybody, I am a Graduate student and I am currently working on designing a PCB for a Xilinx FPGA. I have started using Protel-99-SE trial version for the same. Recently I noticed that the support site of Protel offers 2 documents to ATS members (altium total support) members which I might have use for. Now I think it may be unethical but still I think I need these 2 application notes.I was hoping somebody in this group who is also an ATS member could help me out with this.They ask for a valid 9-digit Serial (License) Number . The document names are : 1) Attributes for FPGA Devices and 2) Protel DXP Xilinx Interface I have tried to make Protel 99SE work for Xilinx FPGAs, but never had any luck. I sent a number of messages to Protel (now Altium) support, but they were not able to provide any help. I have corresponded with several people who also tried this, and none of us ever got it to work for FPGAs. I think it can be made to work for the CPLD parts with some difficulty. The problems I ran into were that the schematic library parts for the FPGAs were automatically converted from some other format, and a systematic error left connection dots off nearly all the clock lines. So, you get a raft of FF without clock errors. Also, after getting past that, the XNF files that would be needed to pass the hdl description to Xilinx's tools were not acceptable to the Xilinx programs. I sent the syntax error messages to Protel, but they never responded. The first document you mention may apply to both P99 and DXP, but the 2nd article is clearly for DXP, and probably won't help you with P99. I am the registered contact for TWO fully licensed P99SE sites, but I can't get into these documents, either! They promised they would not abrogate their agreement to continue to support P99SE users who bought before the advent of ATS, but that is apparently not true. I guess you have to plead your case. We all know how responsive Altium has been! Jon * Tracking #: 98EB3CAB2B373B42A18649952A31E1A401C9CF9C * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Schematic Import (WAS: Hot Linking)
OK, So everything seems to be ok except that when I look at a parts attributes after an import nothing seems to change. This is what I'm doing. Export 1. In Schematic Editor. FileExportExport Schematic to Database. 2. I choose Part as my selected primitive. 3. I choose X and Y Loc, Lib Ref, Footprint, Designator, Part Type as my Selected Attributes. 4. Tick Include Sheet Name. 5. Click Ok. Now I Open the Part.DBF and change only the Lib Ref on one component (R1 in this case) I save the Part.DBF and I says do you want to overwrite it? I click yes. Then it says PART.DBF may contain features that are not compatible with DBF 4 (dBASE IV). Do you want to keep the workbook in this format? (I'm thinking this may be a clue) I click yes. Then back in Protel I go. 1. FileImportImport Schematic from Database. 2. Click Part in attributes, browse to the correct database file name. 3. Import Options: Scope - Current Project, Action - Update Only 4. Mapped Attributes XYLOCATION, LIBREF, DESIGNATOR, and SHEET_PATH. 5. Set Key Fields XYLOCATION, DESIGNATOR, and SHEET_PATH. (This should mean that only the Lib Ref feild is updated, right?) 6. Click ok. 7. Wait while Protel chews away 8. When all is finished, go to R1 on schematic, double click on it and Lib Ref has not changed! RRHH! :) Somebody please tell me something I'm missing Tim * Tracking #: 1C522C924BDB6748B8134F884910BC0DB700B0C7 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PREFIX SUBJECT HEADERS
i agree and i vote for #4 Dennis Saputelli JaMi Smith wrote: Guys and Gals, It looks like this list is going to get very very busy here in the next few weeks with all of the various threads that are going to be popping up with DXP, and the ongoing fun with 99 SE. I was wondering whether or not we all might want to do ourselves a favor and come up with some kind of convention that will help us track the subject of a thread that we are trying to follow, while at the same time not miss something important and help someone who has a problem and needs some help, just because of the clutter of messages. I would therefore pose the following to the members of the forum to stimulate discussion on an acceptable solution. 1. ) Do nothing - just live with everything as it is. 2. ) Offload everything related to DXP to the Protel Development Fourm list. I myself do not think that this is the answer, but maybe that is what the rest of you want to do. 3. ) Create a DXP Users Forum and move all DXP related stuff there. Again, not my preference, as I believe that DXP and 99SE may be to closely intertwined. 4. ) Prefix the SUBJECT field of all messages with either a 1 or 3 letter PREFIX which would immediately identify it as either P99 of DXP related, for example, in the subject line: P99 - Mouse Bug; or DXP - Mouse Bug Still Here, or possibly using only one letter: P - Mouse Bug; or D - Mouse Bug Still Here (I know, everybody just loves my example, come on, its a joke!). Actually, we probably don't even need the - after the 1 or 3 letters if we just leave a space before the actual subject. This initial indicator of a either 1 or a few letters would let everyone know which product the email applied to, so that they could skip it if they were not interested. Most importantly, this would not take up too much room in the subject line, and yet at the same time it would allow messages to be sorted by Product in the subject field. Food for thought. JaMi * Tracking #: DD8C70D62997D84EA923832CD106790D1A9059E4 * -- ___ www.integratedcontrolsinc.comIntegrated Controls, Inc. tel: 415-647-04802851 21st Street fax: 415-647-3003San Francisco, CA 94110 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] (No Subject) - FPGA editor
One reason to get the drawing in Protel and then export it to the Xilinx tools is that the schematic editor of Xilinx is not, how shall I put it, particularly convenient. I myself have done some designs in it while the rest of the board was done in Protel. This got me out of my hum on more than one occasion. I did attempt to write a server for Protel99SE that created the netlist, however this proved to be cumbersome as the netlists of the individual primitives needed to be included in the main netlist too. Can be done, but I never finished it. As to all functions offered by Xilinx; their tools are reasonably documented and can be executed from either from within such a server, or just seperately and then have an external netlist (the Protel one) as input to the tools. Presently I also use Atmel FPGAs for which I did write a server to create EDIF netlists as well as manage the 'user macros' and be a interface toward the Atmel FPGA tools. The advantage for me is that I can use Protel (with which I am familiar) so I can concentrate on the design, not the tools. Just my two pennies. Greetings, Jan Martin Wagenaar At 21:13 (30-7-02), you wrote: I recently had a look into the subject of FPGA and Protel. I was told the FPGA router is still taken from the manufacturer (in your case XILINX). Meaning you're just using Protel to draw the schematics and send the netlist to the other tool doing the FPGA. These tools from various manufacturers are free available on the net. Since the programming interface is also in that manufacturer tool, I tend to fail recognizing the advantage of having Protel drawing the schematic. One advantage of not having the FPGA in protel is : The FPGA is a chip with pins and its internal is hidden. This allows the FPGA, in the EEPROM-type case to act as copy protection. Further, you won't have the library of functions that the XILINX tool offers. I admittedly never tried the FPGA feature of Protel. Rene * Tracking #: F1F7B1EF0462EB4F808DFB51FEE10A74C1861F3F * -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com commercial newsgroups - http://www.talkto.net Anand Kulkarni wrote: Hi everybody, I am a Graduate student and I am currently working on designing a PCB for a Xilinx FPGA. I have started using Protel-99-SE trial version for the same. Recently I noticed that the support site of Protel offers 2 documents to ATS members (altium total support) members which I might have use for. Now I think it may be unethical but still I think I need these 2 application notes.I was hoping somebody in this group who is also an ATS member could help me out with this.They ask for a valid 9-digit Serial (License) Number . The document names are : 1) Attributes for FPGA Devices and 2) Protel DXP Xilinx Interface and the link is http://www.protel.com/resources/tutorials/index.html * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Checking if Protel 2002-07-29 Digest intact.
Does anyone know if the Protel 2002-07-29 Digest was intact. I only received one email in the attachments. I was looking forward to reading all the comments about the new DXP. Maybe one of you antipodean or insomniac readers could tell me by a personal email whether it was sent properly because we have just moved over to Groupwise as our email program and I suspect that's the problem. Thanks __ The contents of this e-mail are privileged and/or confidential to the named recipient and are not to be used by any other person and/or organisation. If you have received this e-mail in error, please notify the sender and delete all material pertaining to this e-mail. __ * Tracking #: DEA1880247689547B418E3D2AB4BB8310D65CBD7 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Altium Release Protel DXP
Hey, I removed my CPU and RAM, and found an old Dell Mouse from 1989, and now it's all working fine! JaMi, I laughed out loud when I read your post. Nice sense of humour! Steve. -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: 30 July 2002 18:14 To: Protel EDA Forum Subject: Re: [PEDA] Altium Release Protel DXP Try removing your mouse . . . Just kidding - just kidding . . . JaMi - Original Message - From: Stephen Casey [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, July 29, 2002 5:15 AM Subject: Re: [PEDA] Altium Release Protel DXP John, I'm glad it works for you. It doesn't work for me yet. I did install to NOT the default install path (I put it in '\altium', rather than '\program files\altium'), so I uninstalled, and then re-installed to the default path, just in case. Anyway, it still doesn't work, which is a shame, as I would love to try it out. Steve. -Original Message- From: John Ross [mailto:[EMAIL PROTECTED]] Sent: 29 July 2002 12:39 To: Protel EDA Forum Subject: [PEDA] Altium Release Protel DXP Just D/L it Altium, Thanks for the proper metric support, NOT! in SCH for PCB directives layout. First thing I tried, as the lack of PCB rules definition in SCH their translation in 98/99/SE was years behind anyone else. * Tracking #: 818E3996FB41B3A090169FAB27397F0DF461 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
This is really scarey, you beta'd the thing and you cant say anything more constructive yourself? Tony, I felt very strong that the platform (99SE) was and is superior to anything else in the price range. A few minor tweaks, a few lines of code taken out to optimize long compilations, and an autorouter, even if it meant a separate package to sell at additional costs would have done it for me. Maybe some enhancements to the high speed design rules , Protel...Sell us a separate autorotuing package with an interface that I can use other programs. Mike Reagan * Tracking #: D51E2786DF504A4D8B7B8807A501A22A946D0CE5 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] OT Windows installer trashed on win2000
I was getting ready to install the DXP demo and so was 'cleaning' my system by uninstalling some other stuff ;) After removing several items, the windows (un)installer said: The Windows Installer Service could not me accessed. This can occur if you are running Windows in safe mode, or if the Windows Installer is not correctly installed... No sh*t! I looked on the MS website to 'repair', 'recover', etc and can't find anything useful. Does anyone know how to fix or re-install the Windows Installer service? I found an update in SP2 on their site, but of course I can't install it!!! * Tracking #: CC98AFA5ABA0EF4C9845080C1374F10A95C2131F * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
You're wrong. The NDA applies for afterwards too. The NDA covers the NDA too, I guess. The beta was a lot of tiring work, so let's forget about the beta and focus on the release. You do your purchase decision on the release and not on the beta. The beta is gone ... Rene Joe Sapienza wrote: Hi, I didn't participate in the Beta test. However I may recall incorrectly that the Beta test NDA applied only during the term of the test and not after. I did the beta on 98 and I seem to recall that these were the terms. Maybe I'm wrong, does anyone have a copy of the DXP BETA NDA handy. Joe * Tracking #: 25284C275862004BB70022416264B2185EE1D717 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Copper pours on outer layers
Question to smartest of smartest designers out there: Here is the delima, we have a board appox 24 x 30 ( a very large backplane) , many thousands of connections, every layer controlled impedance. The boards are used for high speed tele comminications switching and data monitoring. ( No the the tele com industry is not dead). The designs are as many as 28 layers, some approching .250 inch in thickness, a very expensive baord to design and manufacture. On the outer layers we avoid placing traces, since we embed the entire design, The outer layer are copper pours tied to gnd to reduce EMI and to maintain controlled Z on the next inner layer. The copper is poured on both the top and bottom layers. Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI * Tracking #: C05FC4455FDD074E8E0D19C321C392CAC217810D * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] HTML in e-mail == naughty
Brad: I don't want to start Font Wars, having just been an innocent bystander of Mouse Wars. But I wish there was a way for me to make these e-mails appear My Way. I can't even control how my replies look. Your company default has hijacked me! Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com - Original Message - From: Brad Velander [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 2:48 PM Subject: Re: [PEDA] HTML in e-mail == naughty Ivan, the other option that you may be seeing is Rich Text Format. That allows varying fonts, colour fonts and other advanced text formatting options. This is our company default. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Bagotronix Tech Support [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:54 AM To: Protel EDA Forum Subject: Re: [PEDA] HTML in e-mail == naughty Forum members: I don't know how it's happening, but some of the messages posted to this list override the default fonts on my e-mail program (Outlook Express). I suspect that some of us have our e-mail programs set up to format message text in HTML. While this may look neat to you, I ask that you please consider using plain text only (no HTML). I'd rather see e-mail in the font I choose, not what you think is best. Also, HTML wastes bandwidth and storage. Thanks. BTW, it probably looks like I am using HTML in this message. It's OE's fault, when I reply to a message, the reply takes on the formatting of the original message (g!). If it's not HTML causing this, I don't know where OE gets it's ideas of font overrides... Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com * Tracking #: 72E42CD67BA3FD47AD7C3E7E882715AE62BD6494 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] (No Subject) - FPGA editor
I'm using Altera FPGAs exclusively, since the tools are an effort in itself. I also find the handling of MaxPlus2 rather awful, Quartus2 is a bit better. The functionality they provide is far beyond just a schematic editor. They allow me have graphic modules ( forget the VHDL for now) to make a hierarchical design. Beside the TTL family there are wizards that allow me to generate a N-bit adder/fifo/whatever, with/without clockenable/inputenable/outputenable. How do I get that functionality in Protel ? Since I do many projects that are not really specified, but I estimate the future digial functionality to be implemented with say 64 Flipflops, I take a 3064 without having an idea about the inside. While the pcb is being manufactured I start thinking about the inside. Many times, the final content of the FPGA is adapted after experiments on the customers site. This all is also simpler when it doesn't involve Protel. On the board the FPGA is a chip with some connections. Rene * Tracking #: 43A0831A0DA7EB4AB206010D02FFA7AB15EDE225 * -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com commercial newsgroups - http://www.talkto.net TheLight wrote: One reason to get the drawing in Protel and then export it to the Xilinx tools is that the schematic editor of Xilinx is not, how shall I put it, particularly convenient. I myself have done some designs in it while the rest of the board was done in Protel. This got me out of my hum on more than one occasion. I did attempt to write a server for Protel99SE that created the netlist, however this proved to be cumbersome as the netlists of the individual primitives needed to be included in the main netlist too. Can be done, but I never finished it. As to all functions offered by Xilinx; their tools are reasonably documented and can be executed from either from within such a server, or just seperately and then have an external netlist (the Protel one) as input to the tools. Presently I also use Atmel FPGAs for which I did write a server to create EDIF netlists as well as manage the 'user macros' and be a interface toward the Atmel FPGA tools. The advantage for me is that I can use Protel (with which I am familiar) so I can concentrate on the design, not the tools. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] (No Subject)
The documents that you are requesting are also included in the free trial version of Protel DXP. Look in the DXP help menu Articles and Tutorials. John Williams - Original Message - From: Anand Kulkarni [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 11:38 AM Subject: [PEDA] (No Subject) Hi everybody, I am a Graduate student and I am currently working on designing a PCB for a Xilinx FPGA. I have started using Protel-99-SE trial version for the same. Recently I noticed that the support site of Protel offers 2 documents to ATS members (altium total support) members which I might have use for. Now I think it may be unethical but still I think I need these 2 application notes.I was hoping somebody in this group who is also an ATS member could help me out with this.They ask for a valid 9-digit Serial (License) Number . The document names are : 1) Attributes for FPGA Devices and 2) Protel DXP Xilinx Interface and the link is http://www.protel.com/resources/tutorials/index.html hope someone helps Anand Kulkarni * Tracking #: 0670FB63F806BF4FB698940699649E1517165AB2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] OT Windows installer trashed on win2000
put in the win2000 cd and boot from it. select repair when asked what you want to do it will rumble on the disk for a while and might reboot . if it reboots select repair again ( always specify automatic. this will put back any missing or modified system files. eventually it will tell you to remove the disk and boot normally ( it cna reboot up to 3 times before it prompts you to remove the cd once that is done i suggest you install service pack 2 Tony Karavidas wrote: I was getting ready to install the DXP demo and so was 'cleaning' my system by uninstalling some other stuff ;) After removing several items, the windows (un)installer said: The Windows Installer Service could not me accessed. This can occur if you are running Windows in safe mode, or if the Windows Installer is not correctly installed... No sh*t! I looked on the MS website to 'repair', 'recover', etc and can't find anything useful. Does anyone know how to fix or re-install the Windows Installer service? I found an update in SP2 on their site, but of course I can't install it!!! * Tracking #: CC98AFA5ABA0EF4C9845080C1374F10A95C2131F * -- -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- _ // Vincent Himpe // _ ___/ Lab Manager / \ \ / / /ST Microelectronics /___\ \ / / / 5510 Six Forks Road . Suite 200 /__//_/__/ Raleigh NC 27612 Tel : (919) 850 6070 Fax : (919) 850 6689 e-mail : [EMAIL PROTECTED] -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
before pouring , switch off the online DRC , 'Pour over same net' and 'remove dead copper' since you have only that on thse layers no need to have the pouring algorithm look for this stuff. that should speed it up somewhat Michael Reagan (EDSI) wrote: Question to smartest of smartest designers out there: Here is the delima, we have a board appox 24 x 30 ( a very large backplane) , many thousands of connections, every layer controlled impedance. The boards are used for high speed tele comminications switching and data monitoring. ( No the the tele com industry is not dead). The designs are as many as 28 layers, some approching .250 inch in thickness, a very expensive baord to design and manufacture. On the outer layers we avoid placing traces, since we embed the entire design, The outer layer are copper pours tied to gnd to reduce EMI and to maintain controlled Z on the next inner layer. The copper is poured on both the top and bottom layers. Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI * Tracking #: C05FC4455FDD074E8E0D19C321C392CAC217810D * -- -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- _ // Vincent Himpe // _ ___/ Lab Manager / \ \ / / /ST Microelectronics /___\ \ / / / 5510 Six Forks Road . Suite 200 /__//_/__/ Raleigh NC 27612 Tel : (919) 850 6070 Fax : (919) 850 6689 e-mail : [EMAIL PROTECTED] -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
Michael Reagan (EDSI) wrote: Question to smartest of smartest designers out there: Not sure if I qualify :-) snip Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI If an internal ground plane has an appropriate copper pattern for the outer layers, just tell the board shop to use that artwork for both the inner layer and outer layer - just because Protel thinks the *.gtl file is the top layer, doesn't mean you _must_ use that as the top layer. (Or if one of the existing planes isn't suitable, make another one that is!) * Tracking #: 02B75B177BAC5F4E9CAA58158C227486F226FF99 * -- Peter Bennett TRIUMF 4004 Wesbrook Mall, Vancouver, BC, Canada GPS and NMEA info and programs: http://vancouver-webpages.com/peter/index.html * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
Can't you simply use a ground plane (usually internal, of course, you probably already have one) and tell the pcb house to use it as the top and/or bottom too? Richard At 04:33 PM 7/30/2002 -0700, you wrote: Question to smartest of smartest designers out there: Here is the delima, we have a board appox 24 x 30 ( a very large backplane) , many thousands of connections, every layer controlled impedance. The boards are used for high speed tele comminications switching and data monitoring. ( No the the tele com industry is not dead). The designs are as many as 28 layers, some approching .250 inch in thickness, a very expensive baord to design and manufacture. On the outer layers we avoid placing traces, since we embed the entire design, The outer layer are copper pours tied to gnd to reduce EMI and to maintain controlled Z on the next inner layer. The copper is poured on both the top and bottom layers. Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI * Tracking #: C05FC4455FDD074E8E0D19C321C392CAC217810D * Cheesecote Mountain CAMAC, 24 Halley Drive; Pomona, NY 10970 voice: 845 364 0211, fax: 845 362 6947, www.cmcamac.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
I'd try splitting the pours: a large area pour with large track widths and a large pour grid, plus small regional pours wherever the coarse-grained nature of the large pour has clearances that are larger than you want. John Haddy -Original Message- From: Michael Reagan (EDSI) [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 31 July 2002 9:33 AM To: Protel EDA Forum Subject: [PEDA] Copper pours on outer layers Question to smartest of smartest designers out there: Here is the delima, we have a board appox 24 x 30 ( a very large backplane) , many thousands of connections, every layer controlled impedance. The boards are used for high speed tele comminications switching and data monitoring. ( No the the tele com industry is not dead). The designs are as many as 28 layers, some approching .250 inch in thickness, a very expensive baord to design and manufacture. On the outer layers we avoid placing traces, since we embed the entire design, The outer layer are copper pours tied to gnd to reduce EMI and to maintain controlled Z on the next inner layer. The copper is poured on both the top and bottom layers. Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI * Tracking #: C05FC4455FDD074E8E0D19C321C392CAC217810D * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
Thanks Vince, We do all of your mentioned tricks, it still takes hours. As a matter of fact anytime I layout a design I turn off DRCs when I a place parts, I turn on only clearance constraints and hide gnd and plane nets after I start to manually route critical lines. This allows my computer to work with me and not work the DRCs. Also I do not set up any rules until I need them. It really speeds things up, But large designs copper pours with a jillion pixels takes hours Mike - Original Message - From: vincent mail [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Wednesday, July 31, 2002 2:23 PM Subject: Re: [PEDA] Copper pours on outer layers before pouring , switch off the online DRC , 'Pour over same net' and 'remove dead copper' since you have only that on thse layers no need to have the pouring algorithm look for this stuff. that should speed it up somewhat Michael Reagan (EDSI) wrote: Question to smartest of smartest designers out there: Here is the delima, we have a board appox 24 x 30 ( a very large backplane) , many thousands of connections, every layer controlled impedance. The boards are used for high speed tele comminications switching and data monitoring. ( No the the tele com industry is not dead). The designs are as many as 28 layers, some approching .250 inch in thickness, a very expensive baord to design and manufacture. On the outer layers we avoid placing traces, since we embed the entire design, The outer layer are copper pours tied to gnd to reduce EMI and to maintain controlled Z on the next inner layer. The copper is poured on both the top and bottom layers. Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI * Tracking #: C05FC4455FDD074E8E0D19C321C392CAC217810D * -- -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- _ // Vincent Himpe // _ ___/ Lab Manager / \ \ / / /ST Microelectronics /___\ \ / / / 5510 Six Forks Road . Suite 200 /__//_/__/ Raleigh NC 27612 Tel : (919) 850 6070 Fax : (919) 850 6689 e-mail : [EMAIL PROTECTED] -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
If you set the track size to a larger value the pours take less time. Also make the trace larger than the grid and pour vertical (or horizontal) hatch only. i.e. 24mil track width 20mil grid size This is faster since the polygon does not have to generate horizontal and vertical. If the outer layers literally have no signal traces, then use a ground plane layer ( make sure unconnected pads mid layer pads box is checked in gerber layer setup). Years ago, (pre 99SE) I merged a ground plane and top layer for an RF board. I had to manually place clearances (tracks) on the plane layer for any tracks on the top layer. Then I made notes for the board house to do the merging when they generated the artwork. You might be able to do it yourself with Camtastic (just guessing) or some other Gerber editor. Duane -Original Message- From: Michael Reagan (EDSI) [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 4:33 PM To: Protel EDA Forum Subject: [PEDA] Copper pours on outer layers Question to smartest of smartest designers out there: Here is the delima, we have a board appox 24 x 30 ( a very large backplane) , many thousands of connections, every layer controlled impedance. The boards are used for high speed tele comminications switching and data monitoring. ( No the the tele com industry is not dead). The designs are as many as 28 layers, some approching .250 inch in thickness, a very expensive baord to design and manufacture. On the outer layers we avoid placing traces, since we embed the entire design, The outer layer are copper pours tied to gnd to reduce EMI and to maintain controlled Z on the next inner layer. The copper is poured on both the top and bottom layers. Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI * Tracking #: C05FC4455FDD074E8E0D19C321C392CAC217810D * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
Mike, I don't work on boards as _humongous_ as yours but have done similar on a smaller scale. Here are a few suggestions: (1) Break up your pour into many smaller tiles so that any later rework can be completed with just a local re-pour on one of the tiles.Its pretty easy to repour a bunch of polys in a batch: select the polys you want, exec MOVE SELECTION but don't move any thing at all, and say YES to re-pouring. (2) Disable any un-needed design rules before you pour. The time a pour takes increases logarithmicly with the number of design rules (or so it seemed to me). I don't know how one might be able to merge another copper layer with top/bottom copper. Initially I was thinking an internal plane layer could be used for this. I think you could manage to get the proper artwork on the internal plane layer easy enough. The solder mask layer could be exported and imported to an internal plane which would give you the oversize pads of the required clearance. Unfortunately, when you were done you would have a negative, not a positive image. The gerber of the internal plane is negative too which doesn't help. If you had another program (GCprevue??) to change the internal plane to positive image it might just work. Then you could just paste it right on the top/bottom copper layers.Sounds kind of messy and tedious to me. Good luck Dave Lewis Michael Reagan (EDSI) [EMAIL PROTECTED] on 07/30/2002 04:33:02 PM Please respond to Protel EDA Forum [EMAIL PROTECTED] To:Protel EDA Forum [EMAIL PROTECTED] cc: Subject: [PEDA] Copper pours on outer layers Question to smartest of smartest designers out there: Here is the delima, we have a board appox 24 x 30 ( a very large backplane) , many thousands of connections, every layer controlled impedance. The boards are used for high speed tele comminications switching and data monitoring. ( No the the tele com industry is not dead). The designs are as many as 28 layers, some approching .250 inch in thickness, a very expensive baord to design and manufacture. On the outer layers we avoid placing traces, since we embed the entire design, The outer layer are copper pours tied to gnd to reduce EMI and to maintain controlled Z on the next inner layer. The copper is poured on both the top and bottom layers. Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI * Tracking #: C05FC4455FDD074E8E0D19C321C392CAC217810D * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
Hi there, The only problem with simply file swapping the top layer with an internal plane is you would not have any pads for the components since they are hogged out on planes. That's why you ultimately have to merge the two layers, but thats a problem since they are oposite polarity images. Having the board house merge the layers is a good idea. Unfortunately you won't be able to really browse and inspect the final artwork (gerber files) as easily before you send the files out. Maybe the merge could be done in Camtastic or some other prog? Dave Lewis Peter Bennett [EMAIL PROTECTED] on 07/30/2002 02:27:30 PM Please respond to Protel EDA Forum [EMAIL PROTECTED] To:Protel EDA Forum [EMAIL PROTECTED] cc: Subject: Re: [PEDA] Copper pours on outer layers Michael Reagan (EDSI) wrote: Question to smartest of smartest designers out there: Not sure if I qualify :-) snip Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI If an internal ground plane has an appropriate copper pattern for the outer layers, just tell the board shop to use that artwork for both the inner layer and outer layer - just because Protel thinks the *.gtl file is the top layer, doesn't mean you _must_ use that as the top layer. (Or if one of the existing planes isn't suitable, make another one that is!) * Tracking #: 02B75B177BAC5F4E9CAA58158C227486F226FF99 * -- Peter Bennett TRIUMF 4004 Wesbrook Mall, Vancouver, BC, Canada GPS and NMEA info and programs: http://vancouver-webpages.com/peter/index.html * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
Something I forgot to mention: If the parts are surface mount then the internal plane has no hog-outs at all for the pads. Thats why you might be interested in using the soldermask layer instead. Dave Lewis [EMAIL PROTECTED] on 07/30/2002 03:19:57 PM Please respond to Protel EDA Forum [EMAIL PROTECTED] To:Protel EDA Forum [EMAIL PROTECTED] cc: Subject: Re: [PEDA] Copper pours on outer layers Hi there, The only problem with simply file swapping the top layer with an internal plane is you would not have any pads for the components since they are hogged out on planes. That's why you ultimately have to merge the two layers, but thats a problem since they are oposite polarity images. Having the board house merge the layers is a good idea. Unfortunately you won't be able to really browse and inspect the final artwork (gerber files) as easily before you send the files out. Maybe the merge could be done in Camtastic or some other prog? Dave Lewis Peter Bennett [EMAIL PROTECTED] on 07/30/2002 02:27:30 PM Please respond to Protel EDA Forum [EMAIL PROTECTED] To:Protel EDA Forum [EMAIL PROTECTED] cc: Subject: Re: [PEDA] Copper pours on outer layers Michael Reagan (EDSI) wrote: Question to smartest of smartest designers out there: Not sure if I qualify :-) snip Copper pours of this size are poured last because they are time consuming. The pours can take 4 hours, and even longer if they are not right the first time. Question to any of the best out there.can we avoid a copper pour and merge a gnd layer to the top? Does anyone have a method or suggestion to merge copper to flood the top layer. Is there a quicker method? We are using 99SE on aa 1 gig cpu with 512 meg. Mike Reagan EDSI If an internal ground plane has an appropriate copper pattern for the outer layers, just tell the board shop to use that artwork for both the inner layer and outer layer - just because Protel thinks the *.gtl file is the top layer, doesn't mean you _must_ use that as the top layer. (Or if one of the existing planes isn't suitable, make another one that is!) * Tracking #: 02B75B177BAC5F4E9CAA58158C227486F226FF99 * -- Peter Bennett TRIUMF 4004 Wesbrook Mall, Vancouver, BC, Canada GPS and NMEA info and programs: http://vancouver-webpages.com/peter/index.html * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] (No Subject) - FPGA editor
Rene Tschaggelar wrote: I recently had a look into the subject of FPGA and Protel. I was told the FPGA router is still taken from the manufacturer (in your case XILINX). Meaning you're just using Protel to draw the schematics and send the netlist to the other tool doing the FPGA. These tools from various manufacturers are free available on the net. Since the programming interface is also in that manufacturer tool, I tend to fail recognizing the advantage of having Protel drawing the schematic. Have you ever used one of the Aldec-based FPGA tools? That is what Xilinx used as the sch- (x)HDL section of their tools. The very old one was bad, then last version they used had improved to passable. Then, they replaced the Aldec schematic entry with their own program. It is abominable! It is almost always necessary to erase a net to move a wire, or even relabel a net in many cases. Truly the worst schematic entry program I've ever seen! Protel 99SE schematic entry is so many light years ahead of Xilinx, it is like comparing programming minicomputers through the console switches to C++. Yes, using an external sch editor would be more keystrokes, chance of error, etc. But, when it takes half an hour to change one signal name, the extra effort would be minute. Apparently, there is a large EDA manager as the 'front panel' of the Xilinx tools, and you can splice in scripts to use external editors, library managers and sch-HDL compilers. Now that I know that Protel fixed the Xilinx FPGA translator bug in 99SE SP5, I will have to try this out on the next project. One advantage of not having the FPGA in protel is : The FPGA is a chip with pins and its internal is hidden. This allows the FPGA, in the EEPROM-type case to act as copy protection. Further, you won't have the library of functions that the XILINX tool offers. The sch. library for most FPGAs are pretty public, and I think Protel already has them. There were problems in some of the schematic level versions of this, years ago, but I think the pre-compiled macros are OK. I admittedly never tried the FPGA feature of Protel. I did. In the abstract, it seemed to work quite well. When I went to compile for specific Xilinx chips, things went bad. The Protel digital simulator is also pretty nice and fast to use (minimal keystrokes). The latest Xilinx simulator won't let you graphically edit timing diagrams. You have to compile a VHDL testbench as ASCII text every time you want to move an edge! I mean, what a step BACKWARDS! These guys are still in the IBM punch-card, mainframe batch processing mindset! Jon * Tracking #: 67AFF37B2B45474BBF60ACB726758B9791C7DCB6 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Customizing protel (Toggle Layer Toolbar)
The file for the toolbar is at the following link: http://groups.yahoo.com/group/protel-users/files/ Sorry, I wasn't clear about where I uploaded the file to. The zip file includes an readme file with details on how to install it. Darren Moore -Original Message- From: Darren [mailto:[EMAIL PROTECTED]] Tony all, I have uploaded some files to add a Toolbar to toggle on and off the following layers: TopOverlay TopSignal BotSignal BotOverlay Mech 1 Mech 2 Mech 3 Mech 4 It includes icon's for the buttons also. Darren Moore * Tracking #: 5A6C570C03872F4A8254F6127CB58560A106F4A7 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Copper pours on outer layers
Peter and All If an internal ground plane has an appropriate copper pattern for the outer layers, just tell the board shop to use that artwork for both the inner layer and outer layer - just because Protel thinks the *.gtl file is the top layer, doesn't mean you _must_ use that as the top layer. (Or if one of the existing planes isn't suitable, make another one that is!) Peter have you actually done it I think this is the answer I am looking for Mike * Tracking #: 190B5DF1C1EC844FA5AD2C7A7E0E1D1971E76167 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
Mike, 100% Correct. Bob Wolfe Mike wrote I disagree,This is expensive software. I purchase $49.00 software and complain to store managers if my $49.00 package doesnt work, why shouldnt ALTIUM receive heat from us about not correcting bugs and not meeting our expectations. We are the paying customer. SIMPLE AS THAT If I take ALTIUMS attitude with my customers, I would be out of business. * Tracking #: 4674DEEDCD013E439E7F284399F3388A5D4A23BE * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Checking if Protel 2002-07-29 Digest intact.
Paul, You can go look at the archive at Protel-Users-PEDA-Archive at hahoo groups. JaMi - Original Message - From: Paul Gaastra [EMAIL PROTECTED] To: [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 12:53 PM Subject: [PEDA] Checking if Protel 2002-07-29 Digest intact. Does anyone know if the Protel 2002-07-29 Digest was intact. I only received one email in the attachments. I was looking forward to reading all the comments about the new DXP. Maybe one of you antipodean or insomniac readers could tell me by a personal email whether it was sent properly because we have just moved over to Groupwise as our email program and I suspect that's the problem. Thanks __ The contents of this e-mail are privileged and/or confidential to the named recipient and are not to be used by any other person and/or organisation. If you have received this e-mail in error, please notify the sender and delete all material pertaining to this e-mail. __ * Tracking #: DEA1880247689547B418E3D2AB4BB8310D65CBD7 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
On 09:46 PM 30/07/2002 -0400, Robert M. Wolfe said: Mike, 100% Correct. Bob Wolfe Mike wrote I disagree,This is expensive software. I purchase $49.00 software and complain to store managers if my $49.00 package doesnt work, why shouldnt ALTIUM receive heat from us about not correcting bugs and not meeting our expectations. We are the paying customer. SIMPLE AS THAT If I take ALTIUMS attitude with my customers, I would be out of business. So do I - I think the heat should be bloody hot but also constructive. I have never held back on saying something is no good. But I usually try to offer some way in which it could be better or some reason for why an alternative is better. If you or Mike think I was suggesting going soft on Altium, by suggesting we be constructive in our criticism, I am sorry I created that impression. Since the program is more expensive than most we use, that is all the more reason why constructive criticism is more valuable for all of us. Most of us are not in the position of being able to change CAD/CAE packages easily so we have to be part of the process in making the package we have to work with work better. You can either be part of the process or you can simply complain. Which is it to be? In either case Altium will know what you don't like, but only in one will your comments be useful in making the damn thing better. Those with long memories will recall the process I went through on the release of P98 and P99. They will also see the results of some of the active engagement by a number of us in the changes from P99 to P99SE. BTW - maybe it is different in different places. To bag something in Australia is anything but a compliment - it means to denigrate it. I am saying it is easy for us to denigrate the software (always is after all). But at the same time can we rise above this and say why it is bad and how it could be better. I used the phrase We can bag DXP - that is really easy. Are some of you taking this to mean that I am saying DXP is good, or go soft on Altium? Where does the impression that I am suggesting going soft on Altium come from? Bye for now, Ian * Tracking #: 6383462D5F58A040B85F523C1D99005EE4E56B57 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP info
So I'm checking out the flash demos today on Altiums site and notice an image of Palm or Handspring device flashing by, like it has something to do with DXP. Then I'm poking around the Innoveda site and notice an image of Palm or Handspring device in this PDF file: http://www.innoveda.com/products/datasheets/ppcb.pdf What's up with that? What the marketing twist to including this image? Why not some woman in a bikini, or a hot rod, or a season pass to the Raider's games. Do these companies imply the handheld was designed using their software? Will the s/w footprint fit in a handheld? (hee hee, not even) why why why?? * Tracking #: 94934F918895C2439EA4D7046F6E383ECD19B0C5 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
In the US, 'to bag' generally means the same thing. I think some places it means to 'capture' or 'get lucky' but I'm not sure where... -Original Message- From: Ian Wilson [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 7:14 PM To: Protel EDA Forum Subject: Re: [PEDA] DXP Discussion On 09:46 PM 30/07/2002 -0400, Robert M. Wolfe said: Mike, 100% Correct. Bob Wolfe Mike wrote I disagree,This is expensive software. I purchase $49.00 software and complain to store managers if my $49.00 package doesnt work, why shouldnt ALTIUM receive heat from us about not correcting bugs and not meeting our expectations. We are the paying customer. SIMPLE AS THAT If I take ALTIUMS attitude with my customers, I would be out of business. So do I - I think the heat should be bloody hot but also constructive. I have never held back on saying something is no good. But I usually try to offer some way in which it could be better or some reason for why an alternative is better. If you or Mike think I was suggesting going soft on Altium, by suggesting we be constructive in our criticism, I am sorry I created that impression. Since the program is more expensive than most we use, that is all the more reason why constructive criticism is more valuable for all of us. Most of us are not in the position of being able to change CAD/CAE packages easily so we have to be part of the process in making the package we have to work with work better. You can either be part of the process or you can simply complain. Which is it to be? In either case Altium will know what you don't like, but only in one will your comments be useful in making the damn thing better. Those with long memories will recall the process I went through on the release of P98 and P99. They will also see the results of some of the active engagement by a number of us in the changes from P99 to P99SE. BTW - maybe it is different in different places. To bag something in Australia is anything but a compliment - it means to denigrate it. I am saying it is easy for us to denigrate the software (always is after all). But at the same time can we rise above this and say why it is bad and how it could be better. I used the phrase We can bag DXP - that is really easy. Are some of you taking this to mean that I am saying DXP is good, or go soft on Altium? Where does the impression that I am suggesting going soft on Altium come from? Bye for now, Ian * Tracking #: 6383462D5F58A040B85F523C1D99005EE4E56B57 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] HTML in e-mail == naughty
Hello, I believe this has to do with the default encoding used by the e-mail program of the sender's original post. I have OE6 set to reply in plain text only and I have always seen the same thing as you do, up 'till just now. When I click on 'View' 'Encoding' ... for this e-mail I saw the default was set to 'Chinese Traditional (Big5)'. I changed the encoding to 'Western European (Windows)', clicked on another e-mail then clicked back to the one I changed. Lo' and behold the change stuck! While typing this, it looks like my default settings... so I closed and saved this e-mail in 'Drafts' and closed OE6. When I reopened, HOT DAMN! And the posts from Luo; Yu-Ming are also much easier to read. I have been wondering about this for quite some time. Sometimes, all I need is a swift boot to the head to figure things out. Thank you for stirring the noodles, Ivan! Cheers! Drew - Original Message - From: Bagotronix Tech Support [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 1:30 PM Subject: Re: [PEDA] HTML in e-mail == naughty Brad: I don't want to start Font Wars, having just been an innocent bystander of Mouse Wars. But I wish there was a way for me to make these e-mails appear My Way. I can't even control how my replies look. Your company default has hijacked me! Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com - Original Message - From: Brad Velander [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Tuesday, July 30, 2002 2:48 PM Subject: Re: [PEDA] HTML in e-mail == naughty Ivan, the other option that you may be seeing is Rich Text Format. That allows varying fonts, colour fonts and other advanced text formatting options. This is our company default. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Bagotronix Tech Support [mailto:[EMAIL PROTECTED]] Sent: Tuesday, July 30, 2002 10:54 AM To: Protel EDA Forum Subject: Re: [PEDA] HTML in e-mail == naughty Forum members: I don't know how it's happening, but some of the messages posted to this list override the default fonts on my e-mail program (Outlook Express). I suspect that some of us have our e-mail programs set up to format message text in HTML. While this may look neat to you, I ask that you please consider using plain text only (no HTML). I'd rather see e-mail in the font I choose, not what you think is best. Also, HTML wastes bandwidth and storage. Thanks. BTW, it probably looks like I am using HTML in this message. It's OE's fault, when I reply to a message, the reply takes on the formatting of the original message (g!). If it's not HTML causing this, I don't know where OE gets it's ideas of font overrides... Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com * Tracking #: 72E42CD67BA3FD47AD7C3E7E882715AE62BD6494 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP Discussion
InterestingIn my neck of the woods (NW US), to bag something is to abandon it as useless, but without extreme prejudice Brian At 07:32 PM 7/30/02 -0700, you wrote: In the US, 'to bag' generally means the same thing. I think some places it means to 'capture' or 'get lucky' but I'm not sure where... * Tracking #: F89D03FC4C3FC14E9ADC95FB81F22D9EE5A6763E * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Heavy OT. Was: Altium Release Protel DXP from Steve Casey
Hey, I removed my CPU and RAM, and found an old Dell Mouse from 1989, and now it's all working fine! JaMi, I laughed out loud when I read your post. Nice sense of humour! Steve. Steve, the guys in the office around me looked at me like I am crazy because I laughed out loud when I read *your* post. Let me see wether i can beat it. Had the same problem until I installed cat.sys one of the best mousedrivers I ever saw. now my mouse is running. Waldemar * Tracking #: 7756C205928F9C478DC2640974296596235BC7A1 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
