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• 2012/03/26 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jeremy Bennett
• 2012/03/26 Re: [OpenRISC] [Openrisc] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
• 2012/03/25 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Olof Kindgren
• 2012/03/25 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Olof Kindgren
• 2012/03/25 Re: [OpenRISC] Lint warnings in ORPSoCV2 Olof Kindgren
• 2012/03/25 Re: [OpenRISC] SIGBUS when trying to boot Linux on Atlys Stefan Kristiansson
• 2012/03/25 Re: [OpenRISC] SIGBUS when trying to boot Linux on Atlys Jonas Bonn
• 2012/03/25 [OpenRISC] SIGBUS when trying to boot Linux on Atlys Moritz Fischer
• 2012/03/25 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Julius Baxter
• 2012/03/25 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
• 2012/03/25 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
• 2012/03/25 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Julius Baxter
• 2012/03/25 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Julius Baxter
• 2012/03/25 Re: [OpenRISC] Patch to make ORPSoCV2 stop on test case errors R. Diez
• 2012/03/25 Re: [OpenRISC] Patch to make ORPSoCV2 stop on test case errors Julius Baxter
• 2012/03/25 [OpenRISC] Lint warnings in ORPSoCV2 R. Diez
• 2012/03/24 Re: [OpenRISC] Patch Matthew Hicks
• 2012/03/24 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Julius Baxter
• 2012/03/24 Re: [OpenRISC] Patch to fix Verilator warning "Signal is not driven: result_cust5" Julius Baxter
• 2012/03/24 [OpenRISC] Suggestion to change the default memory type to "exitnops" in or1ksim R. Diez
• 2012/03/24 Re: [OpenRISC] Build order and other issues with or1ksim R. Diez
• 2012/03/23 Re: [OpenRISC] Patch Stefan Kristiansson
• 2012/03/23 Re: [OpenRISC] How to clear the BSS section on start-up R. Diez
• 2012/03/23 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero R. Diez
• 2012/03/23 Re: [OpenRISC] Patch Matthew Hicks
• 2012/03/23 Re: [OpenRISC] Patch Jeremy Bennett
• 2012/03/23 Re: [OpenRISC] How to clear the BSS section on start-up Jeremy Bennett
• 2012/03/23 Re: [OpenRISC] Problems in the build toolchain Dmytriy Grytsay
• 2012/03/22 [OpenRISC] How to clear the BSS section on start-up R. Diez
• 2012/03/22 [OpenRISC] Patch R. Diez
• 2012/03/22 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
• 2012/03/22 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
• 2012/03/21 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero R. Diez
• 2012/03/21 Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite Jeremy Bennett
• 2012/03/21 Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite Stefan Kristiansson
• 2012/03/21 Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite Jeremy Bennett
• 2012/03/21 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
• 2012/03/21 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero R. Diez
• 2012/03/21 Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite R. Diez
• 2012/03/21 Re: [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite Jeremy Bennett
• 2012/03/20 [OpenRISC] How to set the timeout in DejaGnu/expect for the or1ksim test suite R. Diez
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Matthew Hicks
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
• 2012/03/20 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Jeremy Bennett
• 2012/03/20 Re: [OpenRISC] or1ksim should not initialise the CPU registers to zero Matthew Hicks
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Matthew Hicks
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
• 2012/03/20 [OpenRISC] or1ksim should not initialise the CPU registers to zero R. Diez
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Stefan Kristiansson
• 2012/03/20 [OpenRISC] Patch to make ORPSoCV2 stop on test case errors R. Diez
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Matthew Hicks
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation R. Diez
• 2012/03/20 Re: [OpenRISC] Problems in the build toolchain Jeremy Bennett
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jonas Bonn
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jeremy Bennett
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jonas Bonn
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Jonas Bonn
• 2012/03/20 Re: [OpenRISC] Minor clarifications about R0 in the architecture specification Stefan Kristiansson
• 2012/03/20 [OpenRISC] Minor clarifications about R0 in the architecture specification R. Diez
• 2012/03/20 [OpenRISC] Problems in the build toolchain kruger
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jeremy Bennett
• 2012/03/20 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Jeremy Bennett
• 2012/03/19 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Stefan Kristiansson
• 2012/03/19 Re: [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation Matthew Hicks
• 2012/03/19 [OpenRISC] Minor issues running or1ksim's test suite against ORPSoCV2's RTL simulation R. Diez
• 2012/03/18 Re: [OpenRISC] Build order and other issues with or1ksim Jeremy Bennett
• 2012/03/16 Re: [OpenRISC] Build order and other issues with or1ksim R. Diez
• 2012/03/16 Re: [OpenRISC] Build order and other issues with or1ksim Jeremy Bennett
• 2012/03/16 [OpenRISC] Patch to fix Verilator warning "Signal is not driven: result_cust5" R. Diez
• 2012/03/16 [OpenRISC] Build order and other issues with or1ksim R. Diez
• 2012/03/10 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/03/10 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/03/10 Re: [OpenRISC] [Openrisc] toolchain Peter Gavin
• 2012/03/10 Re: [OpenRISC] [Openrisc] toolchain Peter Gavin
• 2012/03/09 Re: [OpenRISC] openOCD question Franck Jullien
• 2012/03/09 Re: [OpenRISC] openOCD question Ouabache Designworks
• 2012/03/08 Re: [OpenRISC] openOCD question Ouabache Designworks
• 2012/03/08 Re: [OpenRISC] openOCD question Julius Baxter
• 2012/03/08 [OpenRISC] openOCD question Franck Jullien
• 2012/03/07 Re: [OpenRISC] [Patch] l.lws support patch Stefan Kristiansson
• 2012/03/07 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/03/07 Re: [OpenRISC] Cannot build GDB 7.2 under Cygwin Jeremy Bennett
• 2012/03/07 Re: [OpenRISC] Test suite strategy Jeremy Bennett
• 2012/03/07 Re: [OpenRISC] Cannot build GDB 7.2 under Cygwin R. Diez
• 2012/03/07 Re: [OpenRISC] Test suite strategy Ouabache Designworks
• 2012/03/07 Re: [OpenRISC] Cannot build GDB 7.2 under Cygwin Julius Baxter
• 2012/03/07 Re: [OpenRISC] Test suite strategy Julius Baxter
• 2012/03/06 Re: [OpenRISC] Test suite strategy Matthew Hicks
• 2012/03/06 [OpenRISC] Anonymous Subversion check-out only for the OpenRISC repository R. Diez
• 2012/03/06 [OpenRISC] Test suite strategy R. Diez
• 2012/03/03 [OpenRISC] Cannot build GDB 7.2 under Cygwin R. Diez
• 2012/03/01 [OpenRISC] Pratical FPGA programming with OpenRISC at OSHUG, London 29 March Jeremy Bennett
• 2012/03/01 [OpenRISC] [Fwd: Re: [Openrisc] toolchain] Marcus Erlandsson
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 [OpenRISC] [Patch] l.lws support patch Jeppe Græsdal Johansen
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Olof Kindgren
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Olof Kindgren
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain + new JTAG debugger Olof Kindgren
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Marcus Erlandsson
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Giuseppe Scrivano
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain + new JTAG debugger Fredrik Bruhn
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain R. Diez
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain BAKIRI
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain BAKIRI
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Marcus Erlandsson
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Marcus Erlandsson
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Olof Kindgren
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
• 2012/02/29 Re: [OpenRISC] [Openrisc] toolchain Jonas Bonn
• 2012/02/28 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/28 Re: [OpenRISC] [Openrisc] toolchain Jeremy Bennett
• 2012/02/28 Re: [OpenRISC] toolchain Julius Baxter
• 2012/02/28 Re: [OpenRISC] toolchain Peter Gavin
• 2012/02/28 Re: [OpenRISC] toolchain Julius Baxter
• 2012/02/28 [OpenRISC] toolchain Peter Gavin
• 2012/02/28 Re: [OpenRISC] Another OpenOCD bug? Julius Baxter
• 2012/02/28 Re: [OpenRISC] Another OpenOCD bug? Jeppe Græsdal Johansen
• 2012/02/28 Re: [OpenRISC] A typo error on latest openrisc_arch_draft.odt XueBrian
• 2012/02/28 [OpenRISC] Another OpenOCD bug? Steve Battazzo
• 2012/02/27 Re: [OpenRISC] The rtl-tests target in ORPSoC always indicates success (with a zero exit code), even if all tests faill Olof Kindgren
• 2012/02/24 Re: [OpenRISC] The rtl-tests target in ORPSoC always indicates success (with a zero exit code), even if all tests faill Ouabache Designworks
• 2012/02/24 [OpenRISC] The rtl-tests target in ORPSoC always indicates success (with a zero exit code), even if all tests faill R. Diez
• 2012/02/23 Re: [OpenRISC] Change bugurl to bugzilla Olof Kindgren
• 2012/02/23 Re: [OpenRISC] or1200_wb_biu question Olof Kindgren
• 2012/02/23 Re: [OpenRISC] [Openrisc] [PATCH] Allow setting boot address as a parameter Olof Kindgren
• 2012/02/23 Re: [OpenRISC] [PATCH] Convert static wires to localparam Olof Kindgren
• 2012/02/23 Re: [OpenRISC] [PATCH] retry_cnt is not used when OR1200_WB_RETRY is undefined Olof Kindgren
• 2012/02/23 Re: [OpenRISC] [PATCH] Remove unused register ic_inv_q Olof Kindgren
• 2012/02/23 Re: [OpenRISC] [PATCH] Fix implicit integer widths Olof Kindgren
• 2012/02/22 Re: [OpenRISC] [PATCH] Fix implicit integer widths Julius Baxter
• 2012/02/22 Re: [OpenRISC] [PATCH] Remove unused register ic_inv_q Julius Baxter
• 2012/02/22 Re: [OpenRISC] [PATCH] retry_cnt is not used when OR1200_WB_RETRY is undefined Julius Baxter
• 2012/02/22 Re: [OpenRISC] [PATCH] Convert static wires to localparam Julius Baxter
• 2012/02/22 Re: [OpenRISC] [Openrisc] [PATCH] Allow setting boot address as a parameter Julius Baxter
• 2012/02/22 Re: [OpenRISC] Add 2 byte to align Ethernet IP header Olof Kindgren
• 2012/02/22 [OpenRISC] Add 2 byte to align Ethernet IP header Stefan Strålsjö
• 2012/02/21 Re: [OpenRISC] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Stefan Kristiansson
• 2012/02/21 Re: [OpenRISC] [Openrisc] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Olof Kindgren
• 2012/02/21 Re: [OpenRISC] [Openrisc] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Jason Zheng
• 2012/02/20 Re: [OpenRISC] [Openrisc] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Olof Kindgren
• 2012/02/20 Re: [OpenRISC] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Jason Zheng
• 2012/02/20 Re: [OpenRISC] xilinx_ddr2_if.v clock domain crossing in orpsoc atlys implementation Stefan Kristiansson
• 2012/02/15 Re: [OpenRISC] [PATCH] Fix implicit integer widths Pekon Gupta
• 2012/02/14 [OpenRISC] [PATCH] Remove unused register ic_inv_q Olof Kindgren
• 2012/02/14 [OpenRISC] [PATCH] retry_cnt is not used when OR1200_WB_RETRY is undefined Olof Kindgren
• 2012/02/14 Re: [OpenRISC] [PATCH] Fix implicit integer widths Olof Kindgren
• 2012/02/14 Re: [OpenRISC] [PATCH] Fix implicit integer widths Ouabache Designworks
• 2012/02/14 Re: [OpenRISC] [PATCH] Fix implicit integer widths Olof Kindgren
• 2012/02/14 [OpenRISC] [PATCH] Convert static wires to localparam Olof Kindgren
• 2012/02/14 Re: [OpenRISC] [PATCH] Add ordb2a libgloss port Olof Kindgren
• 2012/02/14 Re: [OpenRISC] [PATCH] Fix implicit integer widths Stefan Kristiansson
• 2012/02/14 [OpenRISC] [PATCH] Fix implicit integer widths Olof Kindgren
• 2012/02/07 Re: [OpenRISC] Propose new SVN contributor Anantha Olof Kindgren
• 2012/02/07 Re: [OpenRISC] Propose new SVN contributor Anantha Jeremy Bennett
• 2012/02/07 Re: [OpenRISC] Propose new SVN contributor Anantha Julius Baxter
• 2012/02/07 [OpenRISC] Propose new SVN contributor Anantha Jeremy Bennett
• 2012/02/06 Re: [OpenRISC] [PATCH] Add ordb2a libgloss port Olof Kindgren
• 2012/02/06 Re: [OpenRISC] [PATCH] Add ordb2a libgloss port Julius Baxter
• 2012/02/06 [OpenRISC] [PATCH] Allow setting boot address as a parameter Olof Kindgren
• 2012/02/06 [OpenRISC] [PATCH] Add ordb2a libgloss port Olof Kindgren
• 2012/02/02 [OpenRISC] status of OpenRISC MP Emilio G. Cota
• 2012/02/01 Re: [OpenRISC] newlib Gnu toolchain for openrisc 1200 Julius Baxter
• 2012/01/30 Re: [OpenRISC] newlib Gnu toolchain for openrisc 1200 Jeremy Bennett
• 2012/01/30 Re: [OpenRISC] [Openrisc] Make GCC emit correct immediates for unsigned, sign-extended values Joern Rennecke
• 2012/01/30 Re: [OpenRISC] [Openrisc] Make GCC emit correct immediates for unsigned, sign-extended values Jeremy Bennett
• 2012/01/29 Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
• 2012/01/29 Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Matthew Hicks
• 2012/01/29 Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Ouabache Designworks
• 2012/01/29 Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Matthew Hicks
• 2012/01/29 Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
• 2012/01/29 Re: [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Ouabache Designworks
• 2012/01/29 [OpenRISC] [RFC] Architecture update - Exception Vector Base Address Stefan Kristiansson
• 2012/01/29 [OpenRISC] Make GCC emit correct immediates for unsigned, sign-extended values Julius Baxter
• 2012/01/24 Re: [OpenRISC] Wishbone reset signal handled asynchronously in most OpenRISC-related cores Ouabache Designworks
• 2012/01/24 [OpenRISC] Wishbone reset signal handled asynchronously in most OpenRISC-related cores R. Diez
• 2012/01/23 Re: [OpenRISC] [Openrisc] [OPENOCD PATCH] or1k: Fix gcc 4.6.1 build failure (unused reg_cache_index) Julius Baxter
• 2012/01/22 [OpenRISC] Help testing a script to mirror the OpenRISC Subversion repositories to Git repositories R. Diez
• 2012/01/22 [OpenRISC] [OPENOCD PATCH] or1k: Fix gcc 4.6.1 build failure (unused reg_cache_index) Stefan Kristiansson
• 2012/01/18 Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Jeremy Bennett
• 2012/01/18 Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Olof Kindgren
• 2012/01/18 Re: [OpenRISC] Multiple copies of the OpenRISC RTL core in the Subversion repository Julius Baxter

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