Re: [PEDA] [PROTEL EDA USERS]: converting protel drawings to otherformats

2001-05-07 Thread rlamoreaux



We just print them to Adobe Acrobat so everyone can view but not change the
files

Rob




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Re: [PEDA] [PROTEL EDA USERS]: Printing to PDF...

2001-05-07 Thread rlamoreaux



PDFWriter works for me from Schematic, but then it was installed with
Acrobat 4.0 so it may be a different version.

Rob


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Re: [PEDA] Windows 2000 Professional fatal exception errors

2001-05-07 Thread rlamoreaux



I suspect that the project was closed with a print preview window open. So
when Protel starts up and goes to preview the page it asks the Windows
printer driver for the Printer attributes. This causes the driver to try to
ask the printer for it's settings to which there is no answer since the
printer is off. Something doesn't recover well from this be it the printer
driver or Protel.

I have seen NT machines hang programs that tried to print to Network
printers that were not available, so this is not necessarily Protel's
fault. It would be nice if it recovered for Windows though.

Rob


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Re: [PEDA] Slow database query

2001-08-03 Thread rlamoreaux



I looked at the database stuff when they first added it and never used it
since everthing we had at that job (and this one too) was in Access not
dBase.

I keep asking for an access link, but no sign of it yet. The ulitmate would
be a parts picker that would query the company database and then put in the
correct schematic part with all the correct fields filled in (pcb
footprint, company part number, value, etc.).

Now that would be a useful server for Protel to add.



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Re: [PEDA] Signal Integrity dialog locks up.

2001-08-07 Thread rlamoreaux



I've used the Signal intergrity  utility and it was helpful and matched
what I was seeing on the problem design I inherited. I wish the problem I
currently have (1 buffer and 8 or 64 memory chips) could be run in it, but
it would be difficult with two boards and a connector involved not to
mention the design being done in an old version of PCAD.  I have not had
Protel hang in quite a while, and the last time I found was due to improper
spice simulation values on parts in the schematic.  I just pulled it up on
a smaller design and nd ran some signals without any glitches or delays.  I
do wish it would just update the waveanalyzer everytime instead of opening
a new window since I end up getting tons of windows.

I have found that Protel is sensitive to DLL HELL, and I have had similar
problems when using WIn9x with other programs written with Borland tools
(delphi). At one point I found multiple versions of a Borland DLL were
causing problems. I also had a plug in install go screwy and I ended up
unistalling Protel and reinstalling.

Sorry you're having such troubles. Have your checked the rest of your
Windows Systems' integrity?

And no I am not in love with Protel. I do feel it is the best value
currently for a company doing small quantities  and thus not able to
justify $40K+ for two seats.

Rob


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Re: [PEDA] Public open-source PCB software. was- Changes to the Protel company name

2001-08-07 Thread rlamoreaux



I thought Delphi was Pascal Prettified.

You mean Delphi isn't Pascal? What is different and why is it so much
better than C++?

I've programmed in C, Assemblers, Basic, Visual Basic, Pascal and C++, and
I would take C++ over the others for a large program in a heartbeat. C and
assembler are good for embedded code on a microcontroller, and VB is great
for doing prototypes or test programs. The only thing I found Pascal good
for was what it was originally developed for, Teaching Programming. I did
watch a friend try to get Borlands C++ Builder to work properly with an OCX
he had worked on developing. It was so buggy when it came to importing DLLs
that he and the customer both regretted their decision to use C++ builder
instead of Visual C++.

Rob





Rene Tschaggelar [EMAIL PROTECTED] on 08/07/2001 05:50:28 PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  Re: [PEDA] Public open-source PCB software. was- Changes to the
  Protel company name




There is no way to come up to speed on such a project in another language
than delphi. Why are the competitiors blown to pieces, not because they
were
dummies, they used the wrong tools. The language must be efficient in
development
the IDE, meaning RAD has to be efficient. No C++, no nothing except delphi.

Rene
--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com


chris mackensen wrote:


 Perhaps another solution:  now, I am not saying that Protel should open
it's
 code doors... we need to pay them money to give us tech support ;-)...
 however, they should do a complete rewrite (start a new project in the
RAD
 environment, from scratch, borrowing some known good code from old and
 current versions) and adopt some modern standards (like not using mutated
 pascal/Delphi :-).  That's my opinion... get rid of tinker toy Delphi...
 (but leave it as an extensibility option for those so inclined)...






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Re: [PEDA] Router crashes (P99SE/SP6)

2001-08-08 Thread rlamoreaux



Have you tried moving the files to the local drive, disconnecting the
network and logging in locally to the computer before running?

I've had tasks that were using a shared drive hang for extended periods
when the machine the share was on was turned off.

At least remove the libraries from your project if they are going to be
unavailable since from what I can tell Protel leaves them open whenever you
have the server (PCB) running.

Rob







Andy Gulliver [EMAIL PROTECTED] on 08/08/2001 05:44:41 AM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel User Group [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  [PEDA] Router crashes (P99SE/SP6)




I'm having a bit of bother with the autorouter [cue cries of 'and you're
surprised?'].

Specifically, when I start it routing on a 3-4 hour job before heading home
at the end of the day there's a high probability of client99se.exe not
responding, with 100% CPU utilisation showing in Task Manager when I get in
next day.  All status/time messages are frozen, as is the whole of
Client99SE, and of course it doesn't even backup the .pcb during the hour
or
so it actually runs.

I'm running Protel (Proteum?) on a P3/800MHz with 384Mbyte RAM under
Windoze
2000.  Two possible clues are (a) after about 6pm the PC in the office with
the shared directory containing our company Protel library files is shut
down and (b) my PC gets an auto update of Sophos antivirus from our central
server, this usually happens at least once overnight.  I'd guess that the
router doesn't need the libraries to be accessible, but the Sophos update
could be significant.

Can anyone shed any light on the cause (and hopefully fix for) this crash?

Regards

Andy Gulliver


No trees were destroyed in the sending of this message. However, a large
number of electrons were significantly inconvenienced.






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Re: [PEDA] Rotate components with drag tracks

2001-08-08 Thread rlamoreaux



The drill size editor was on Protel's download page. can't help on the
others.

Rob





Richard Thompson [EMAIL PROTECTED] on 08/08/2001 06:53:25
AM

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To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  [PEDA] Rotate components with drag tracks




Hi gurus,

Can anyone tell me if there is a process i can assign to a button or key
for
toggling
 (T)ools/(P)references/Component drag (Connected Tracks/None) on Protel
99SE
SP6

I am fed up moving components without tracks (just nets) and not being able
to rotate them!!! then having to go all through the menus.  Surely you
should be able to rotate a component if its only got nets assigned and no
tracks?   Even Dos Cadstar could do this(and even with tracks connected
too)

oh, and I used to have a menu item in pcb (i think in edit) something like
drill size editor that allowed me to see all drill sizes used and change
accordingly. For some reason it has dissappeared, Anyone know where this
process/server lives. i can't seem to find it anywhere.

I realise these are dumb questions and appoligise profusely. (i am not
worthy) ;-)

Thanks

Rich Thompson
www.laney.co.uk






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Re: [PEDA] multipage schematic question

2001-08-13 Thread rlamoreaux




I always use Create Symbol from Sheet to create the sheet symbols. This way
  it gets the right sheet name and ports and everything. Of course I
  have also done the old close and forget to save thing too.



Rob



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Re: [PEDA] ddb transfer failure ??

2001-08-14 Thread rlamoreaux



It was determined a while back that closing a DDB with a print preview open
caused problems when the ddb was opened and the printer the preview was
using was no longer available. If you left the print preview open and he
has a diffferent printer this could be causing the problem.

Of course for mechanical people I just export an AutoCad 13 or 14 DWG.
They seem to like that better than the PCB itself.

Rob





Robison Michael R CNIN [EMAIL PROTECTED] on 08/13/2001 06:57:19
PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   'Protel EDA Forum' [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  Re: [PEDA] ddb transfer failure ??




libraries was what i was thinking too, and it still could be that.  to
be honest, i'm a configuration pig.  i've got several jobs in this ddb,
and i'm almost positive that some of the jobs call libraries from
another ddb.  but the job i wanted him to see used no libraries.  i
just brute-force plunked down pads and traces and slapped some
silkscreen notations on it. no footprints at all.

but its the entire ddb that won't open, not the specific job, so maybe
the libraries are a problem.  that could be messy to fix.  i'll look into
it.

thanks, miker

 -Original Message-
 From:   Jon Elson [SMTP:[EMAIL PROTECTED]]
 Sent:   Monday, August 13, 2001 5:43 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] ddb transfer failure ??



 Robison Michael R CNIN wrote:

  it isn't broke on my system...  ivan just can't open it on his
  machine.  like i said, since i can't send him an actual powsup.pcb,
  i sent him the whole darned ddb.  maybe thats not the way to move
  a job from one pc to another, but thats the method i tried, anyway.

 Well, why CAN'T you mail him the PCB?  You CAN export it from the DDB,
and
 you'll get a PCB file.  He will get asked to specify a DDB on his system.

  bottom line:  the ddb works fine on my machine.  i email it to
  him and get the access violation error.  maybe all the information
  was not contained in the ddb.

 I'm guessing libraries, but not sure.

 Jon






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Re: [PEDA] Protel 99 cannot auto-route BGA components

2001-08-14 Thread rlamoreaux



Have you run a full DRC and made sure that there are no conflicting design
rules. I have seen this in the past when there were design rule issues that
made the board unroutable. One thing in particular is if you have no keep
out defined in which case the router can't find the edge of the board.

ROb





[EMAIL PROTECTED] on 08/13/2001 07:58:06 AM

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To:   proteledaforum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  [PEDA] Protel 99 cannot auto-route BGA components




I have been unable to autoroute a 10 layer design which has 2 fine grid BGA
packages. Protel support has not been able to assist me and has cause a 3
MONTH delay of this design. Protel's auto-router simply locks-up or does
not initialize. The autorouter give no reason for the problem and Protel is
either unwilling or unable to address the problem. Therefore, I am under
the impression that there is a major software problem with respect to the
autorouter and BGA components. Has anyone else seen this problem? If any
other user has had this problem or know of a fix, PLEASE contact me
([EMAIL PROTECTED]). Thanks you for any feedback.

Loop.
Posted from Association web site by: Gerard Vanderloop



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Re: [PEDA] PCB selection filtering and Layer change

2001-08-14 Thread rlamoreaux



Select inside the area then double click on a component and uncheck the
selection box. Next change the scope to global and click OK. This will
deselect all components. Another way is to use the global change to select
all tracks and then use unselect outside to unselect outside the area of
interest.


to change the leayer after you have selected the tracks is done with the
global change also. This time you double click on a track then change it's
layer, select global and then select the match by selection box. This will
change all tracks than match the selected attrinbute to that layer.

The global change is quite powerful, but a little confusing to learn.

Rob





Ken Pelic [EMAIL PROTECTED] on 08/14/2001 01:18:15 PM

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To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  [PEDA] PCB selection filtering and Layer change




I am in the heat of first prototype routing and would like to know if
Protel
has the following abilities:

1) Selection filter - in the PCB, can I change some setting to cause only
certain object-types to be selected, i.e. can I select Inside Area and have
Protel only select tracks (not components)?
So far the only way I know to pinpoint select a track is to Toggle
Selection
and click on every track segment I am interested in...tedious.

2) Layer change on a selection - Having selected a group of routes on a
given layer, can I assign that selection (as a group) to a different layer?

Any suggestions would be appreciated.

Ken Pelic
Avistar Systems






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Re: [PEDA] can't add component library access ??

2001-08-14 Thread rlamoreaux



Try just selecting the ddb that the library is in and adding it.

I suspect that your changing the file type to lib  is causing it to list
the backup .lib file stored in the windows files system, where the original
lib is stored in the ddb file. When you select the ddb file it will add all
the libraries in that ddb.

Rob







Robison Michael R CNIN [EMAIL PROTECTED] on 08/14/2001 03:53:58
PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   'Protel EDA Forum' [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  [PEDA] can't add component library access ??




hello,

its been a while since i built a component library and it was kinda
tricky the first time so i just kept adding to the same lib and using
it for all my jobs.  now i've come to where i need to create a new
library and i'm having some trouble.  i created the library with no
problem:  file/new/ and selected the schematic library icon.  but
when i go back to my schematic, select the browse sch tab and hit
add/remove and browse down in the change library file list dialog
box to the ddb that my new lib was created in, and change the file
type to lib, i only get a listing for the BACKUP of tmod.lib.

thats not right, is it?  on a hunch, i closed the tmod.lib that i created
and tried again, thinking that maybe it couldn't access an open file,
but that didn't change anything.

why is it that the change library dialog only wants to offer me a
backup of the tmod.lib and not the lib itself?  what am i doing wrong?

thanks, miker







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Re: [PEDA] IGNORE COMP LIB ACCESS POST

2001-08-14 Thread rlamoreaux



We have a company library in it's own ddb that is (relatively) controlled.
When the gerbers are created we create a library from the project which is
then stored with the project. This way we don't get burned later when the
global library gets changed or lost. We had this problem with the Viewlogic
files created in our closed California office. They had many different
libraries and we couldn't find some of them, so we couldn't load the
design.  Protel is better this way since the part is stored in the
schematic or pcb, but having the project library makes it better for the
archives.

Rob





Mike Ingle [EMAIL PROTECTED] on 08/14/2001 04:30:13 PM

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To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  Re: [PEDA] IGNORE COMP LIB ACCESS POST




Just a note on this,  I kept getting burned by version ocntrol,  as you
change filenames to save back old versions, the library files stay with the
old filename until you update the pointer.  I have finally decided to have
a
design file which is only for libraries, and not include library files in
designs.  Any better ideas out there for library management?

Mike

-Original Message-
From: Robison Michael R CNIN [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, August 14, 2001 1:07 PM
To: 'Protel EDA Forum'
Subject: [PEDA] IGNORE COMP LIB ACCESS POST


i figured it out...  i needed to add the entire project ddb, not the
specific component library.  when i added the entire project ddb,
the new tmod.lib showed up in the access list.  it wasn't exactly
intuitive, but there's not a lot of that in protel anyway.

miker

 -Original Message-
 From:   Robison Michael R CNIN
 Sent:   Tuesday, August 14, 2001 2:54 PM
 To: 'Protel EDA Forum'
 Subject: [PEDA] can't add component library access ??

 hello,

 its been a while since i built a component library and it was kinda
 tricky the first time so i just kept adding to the same lib and using
 it for all my jobs.  now i've come to where i need to create a new
 library and i'm having some trouble.  i created the library with no
 problem:  file/new/ and selected the schematic library icon.  but
 when i go back to my schematic, select the browse sch tab and hit
 add/remove and browse down in the change library file list dialog
 box to the ddb that my new lib was created in, and change the file
 type to lib, i only get a listing for the BACKUP of tmod.lib.

 thats not right, is it?  on a hunch, i closed the tmod.lib that i created
 and tried again, thinking that maybe it couldn't access an open file,
 but that didn't change anything.

 why is it that the change library dialog only wants to offer me a
 backup of the tmod.lib and not the lib itself?  what am i doing wrong?

 thanks, miker







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Re: [PEDA] DXF anomoly

2001-08-15 Thread rlamoreaux



I gave up on DXF export since everytime I've done it AutoCad has complained
that it doesn't understand the file. Other programs with DXF import would
understand it but not AutoCad. With P99SE there is a DWG export that seems
to work great, or at least our CAD department has not complained about it.

Rob


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Re: [PEDA] How to create a IPC-356 or Mentor-Neutral netlist with Protel 99SE?

2001-08-22 Thread rlamoreaux



 Beside the gerber-files, the manufacturer wants us to deliver a netlist
in
 the IPC-356 or Mentor-Neutral format.


This was talked about a month or two ago. In the Cam manager create a
testpoint output and then select IPC-D-356A. Now set the options you want
(I select all of them) and when you generate the gerbers it will generate
the netlist that the board house can use.

Easy but not intuitive when your trying to generate it after the gerbers
have gone out.

Rob





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Re: [PEDA] How to create a IPC-356 or Mentor-Neutral netlist with Protel 99SE?

2001-08-22 Thread rlamoreaux



 Rob,
 Has your board houses had any problems with the IPC-D-356A netlist
generated
 in Protel?  I thought there were some problems with Protel's netlist
 generator.  I am also getting alot of request for IPC-D-356A netlist

I haven't actually sent them anything since I found it would generate it.
They did say that they would love to get the IPC-D-356A netlist, and we
prefer it to them generating a netlist from the gerbers since it will
prevent us from one of those nasty in the gerber but not in the source
problems. I looked at the files and it is a simple format that they should
not have problems with (I Hope).

Rob







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Re: [PEDA] tenting vias

2001-08-22 Thread rlamoreaux



4)  If (1) is yes, what do I tell the PCB fab house to get them to tent the
vias?  Is it as simple as tent the vias?


You select the vias, and check the box marked tenting in their property
page. The Protel won't remove solder mask in the gerber.

Rob







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Re: [PEDA] Printing problems

2001-08-27 Thread rlamoreaux



Did you install the print previewer in 98 before upgrading?

I had to deinstall and reinstall Protel 99SE from scratch because some DLL
or registry setting was messed up by some addon I installed.

Usually when I get weird exceptions like this I have found them to be
because of an old DLL. Before going back to Protel 98 I'd uninstall
everything to do with Protel, then do a fresh install of Protel99SE and
service pack 6. Doing this on my Win2k machine cleaned up all the strange
exceptions. I just wish it would give a closing Protel dialog box when it
takes 20 seconds of doing nothing to close.

Oh and I just tested print preview with the Win2k driver for a Laserjet 4M
Plus with no problem on my Win2k machine.

Rob






Kathy Quinlan [EMAIL PROTECTED] on 08/27/2001 01:47:16 PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  Re: [PEDA] Printing problems




I know the feeling, I searched the KB about printing problems as our
archives indicate someone else was sending Protel reports on printing
crashes under win2k, but no issues came up :o(

I have tried printing to my Canon BJC4650 with the same problem Exception
occured in PCBPrint: PrintPreview

As I said schematics are fine, just not PCB's.

I went to HP's site and upgraded my laserjet driver also but still no go
:o(

Any Ideas or is it only fixable by dropping back to Protel 98 ???


Regards,

Kat.

- Original Message -
From: Andrew J Jenkins [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Monday, August 27, 2001 10:48 PM
Subject: Re: [PEDA] Printing problems


 On 10:28 PM 8/27/2001 +0800, Kathy Quinlan wrote:
 Hi all,
 
 I am running Protel 99SE with SP6 under WIN2K SP2.
 
 when I try to print a PCB I get an access violation in module address
034de544.
 
 
 Schematic diagrams print out fine :o)
 
 The printer I am trying to print to is a local (ie attached to this PC)
HP 4l.

 Someone else probably knows better, but I think the HP4 laser jet has/had
problems with a great many applications (as I recall, back when it was a
hot item, ~1992, many apps crashed when attempting to print to the
device). You might start by trying to update the driver, and/or check Hp's
site for troubleshooter info. I did a quick search for you at Protel's (um,
I mean Altium) site, (http://www.protel.com)  but either the KB is busted,
poorly written, or simply no longer contains any entries regarding the HP4L
(I am almost positive that it once did...)

 FWIW,

 aj


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Re: [PEDA] Explain: Duplicate sheet number error on DRC please

2001-08-28 Thread rlamoreaux



Sheet numbers are under Document Options  on the organization tab to the
left of the document title. The only problem I can think of from duplicate
numbers would be if you told the netlister/synchronizer to append sheet
number to local nets.

Of course when you annotate you can have it update the sheet numbers only
  by selecting Update Sheet Numbers Only in the Tools Annotate dialog
  box. I think it also updates the sheet numbers when it does a normal
  annotate also, but I'd have to check.



Rob







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Re: [PEDA] nets and ports ??

2001-08-31 Thread rlamoreaux



Why don't you change the net labels you don't want in the netlist to
annotation text? Am I missing something? It wouldn't be the first time. ;-}

The annotation text will give the same look but won't be netlisted, thus
keeping the same look and feel to the schematic. On the +5.3V, instead of
deleting it you could have replaced it with +5.3V as anotation  text and
thus the information that VCC is +5.3V would be kept, but the netlister
would only use VCC.  I suppose in some cases you might end up with the real
net name and the old name in annotation text on the same page, but that
could be used to your advantage in future support of the board by showing
the transistion to the new design.

I've been doing a bunch of support work taking over existing designs with
problems, and the only one that is truly understandable was done by an
outside consultant who used the text annotation to explain what the circuit
did and why. The internally done designs just have the schematic and a word
document that says things like Page 4 is the input buffers and filtering
for channels 0-7..

Rob



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Re: [PEDA] Gerber clearance violations not found by Protel DRC

2001-09-05 Thread rlamoreaux



I have had this very problem when I had metric and inch mixed and the
gerbers were done in 2.3 format, I then changed to 2.4 or 2.5 and the same
file produced usaeble gerbers. So now whenever I have something with
primitives smaller than 10 and 10 I use 2.4 or 2.5 format. Roundup error
will kill you when your at clearances of 5 mils.

Rob


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Re: [PEDA] Process Identifiers

2001-09-05 Thread rlamoreaux



 creatures. Sadly to say, there is no right-thinking about it, though
 I would not suggest any such solution, either. Perhaps there is a
 third, like: Tools-configuration-menu

Or like Microsoft does and right-click menu bar then select customize in
the context sensitive menu.

Rob



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Re: [PEDA] Autorouting Problems

2001-09-13 Thread rlamoreaux



 (Advanced Route 3.1).  I seem to remember the manual saying the
autorouter


Advanced Route 3.1 was an entirely different beast than the current router.
Compared to the current router Advanced Route was a useless piece of junk.
I think the current router is an evolution of the Neurorouter in that it
seems to pick it's routes differently, but it does still have them same
rip-up and retry style of the Neurorouter.

The current router seems to work pretty well if you set up your priorities
and rules right, then hand route a few critical routes. Of course this is
compared to Advanced Route which never could seem to completely route a
board, let alone route a board well.

Rob


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Re: [PEDA] Autorouting Problems

2001-09-14 Thread rlamoreaux



This was my also impression, but for some reason I had an even stronger
impression that the current router is not related to the Neuro Route
product at all.  I am not sure if I got this from a conversation a long
time ago with Protel people (or ex-Protel people) or not.  The old Neuro
Route based product had masses of configuration options that the current
version doesn't. Also, the current brochures have no reference to neuro
this or neuro-that.

I am fairly sure they are different products, but I may be wrong.


I agree they are different products, but I think that the current router is
an evolution from the old NeuroRoute with a lot of changes to accomodate
the new design rules and such.

How much of it is the old Neuroroute, and how much is new I don't know, but
I think many of the ideas on how to route quickly grew out of Neuroroute.

Rob






Ian Wilson [EMAIL PROTECTED] on 09/13/2001 06:43:10 PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  Re: [PEDA] Autorouting Problems




On 05:19 PM 13/09/2001 -0400, [EMAIL PROTECTED] said:


  (Advanced Route 3.1).  I seem to remember the manual saying the
autorouter


Advanced Route 3.1 was an entirely different beast than the current
router.
Compared to the current router Advanced Route was a useless piece of junk.
I think the current router is an evolution of the Neurorouter in that it
seems to pick it's routes differently, but it does still have them same
rip-up and retry style of the Neurorouter.


This was my also impression, but for some reason I had an even stronger
impression that the current router is not related to the Neuro Route
product at all.  I am not sure if I got this from a conversation a long
time ago with Protel people (or ex-Protel people) or not.  The old Neuro
Route based product had masses of configuration options that the current
version doesn't. Also, the current brochures have no reference to neuro
this or neuro-that.

I am fairly sure they are different products, but I may be wrong.

Ian Wilson






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Re: [PEDA] Pad with multiple holes surrounding it.

2001-09-18 Thread rlamoreaux





I have a board sitting here that I worked on in 1991 (386SX PC motherboard)
which has mounting holes like this, but I haven't seen it done much lately.
Basically it has a mounting hole that has the 0.156 screw hole surrounded
by 8 smaller holes in the middle of 0.375 square block of copper that
doesn't have a solder mask. Looking closer at this board the screw hole is
not plated, so my presumption is that the plated through hole was torn up
by the mounting screws in production and thus it was made non-plated and
the grounding holes under the screw head added.  I have seen this type of
mounting hole used on other designs and I have seen this where a large bus
wire was attached to a PCB.


I assume the DRC violations are for clearance issues since it doesn't like
putting a pad or via on a pad?

The easiest way I can see to do this is to put the mounting hole in the
middle of a top and a bottom polygon or fill the size of the total screw
head area you want (0.225). Set the pad size relatively small since the
fill will give you the copper area.Now place vias at the additional hole
locations and make them the same net. Next add a design rule saying these
vias can be close to the pad, and add a fill on the top and bottom solder
mask.


Rob



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[PEDA] Anyone heard of a GENCAD.CAD file?

2001-09-25 Thread rlamoreaux



Our board house is asking for a GENCAD.CAD file for their flying probe
tester which I believe is made by GenRad.

Has anyone ever heard of this format?

Is this actually a format that Protel will produce, but named wrong?

GenRads web site is less than usefull since anything that might have
information in it is login protected.

The current board that is at issue was done in an OLD version of PCAD which
we don't have running and PCAD 2001 doesn't like the design because the
people who did it thought they were clever and combined power planes and
signal layers in a painful way. So we can't generate the GENCAD.CAD file
for them or the PDIF file they say they could also take. Of course if they
hadn't lost the program they did a year and half ago for this board they
wouldn't have this problem.

thanks,


Rob


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Re: [PEDA] Anyone heard of a GENCAD.CAD file?

2001-09-26 Thread rlamoreaux



Will the latest version pull in a PCAD binary file?

My current problem is we have the old PCAD binary file, but no machine
running the old PCAD, and the old file would take a week to pull in  to the
new PCAD and check . Since the board house lost the program for the flying
probe tester, I'd rather make them upgrade their software than have to go
back and try to regenerate a PDIF file.

In the future we intend to supply  IPC-D-356A files unless we really have
to supply the PCB file.

Thanks,

Rob





[EMAIL PROTECTED] on 09/25/2001 06:21:41 PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   Protel EDA Forum [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  Re: [PEDA] Anyone heard of a GENCAD.CAD file?




Yes very familiar with Genrad.
Unless you have the latest version which includes the new Protel file
convertor, you need to export your Protel PCB file out in Version 2.8 ASCII
format. Then Genrad has a program convertor called Alchemist which converts
to GenCad.cad files.
Hope that helps

Lloyd Good
Engineering Systems Co-ordinator
GE Substation Automation Systems
2728 Hopewell Place NE
Calgary, Alberta, Canada
T1Y 7J7
Tel: (403) 214-4777
Fax:(403) 287-7946
email: [EMAIL PROTECTED]


-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, September 25, 2001 3:20 PM
To: Protel EDA Forum
Subject: [PEDA] Anyone heard of a GENCAD.CAD file?




Our board house is asking for a GENCAD.CAD file for their flying probe
tester which I believe is made by GenRad.

Has anyone ever heard of this format?

Is this actually a format that Protel will produce, but named wrong?

GenRads web site is less than usefull since anything that might have
information in it is login protected.

The current board that is at issue was done in an OLD version of PCAD which
we don't have running and PCAD 2001 doesn't like the design because the
people who did it thought they were clever and combined power planes and
signal layers in a painful way. So we can't generate the GENCAD.CAD file
for them or the PDIF file they say they could also take. Of course if they
hadn't lost the program they did a year and half ago for this board they
wouldn't have this problem.

thanks,


Rob







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Re: [PEDA] Urgent help needed

2001-10-25 Thread rlamoreaux



I have had a library update cause a part to go haywire when the origin of
the library part was way off from the center of the part. This was due to
the library being imported from another package if I remember correctly.

I have had a component move off the viewable area, and found a way to fix
it relatively quickly.

First I output a pick and place the assembly.
Next I find the part in question in the pick and place and I change it's
x,y location to a good location
Now I go back to the PCB and I select Tools Autoplacer Place from file and
I use the changed PIK file to place the part in a good location.

Rob


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Re: [PEDA] Pricing

2001-11-09 Thread rlamoreaux



and to add another question to the confusion

What happens if you have two Protel Licenses and buy 1 ATS?


It might be affordable then.

Rob


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Re: [PEDA] McAfee and Protel 99SE

2001-11-12 Thread rlamoreaux



 Does anyone know how to get McAfee v5.16 and Protel 99SE with SP6 on
Windows
 2000 with SP2 to play nice together.  When I start and exit Protel McAfee
 scans everything (taking up to 60% of the CPU resourse).  It also happens
 when I am working in the print preview area.

Go into McAfee and turn off checking INI files. Everytime Protel does
  something it updates an IN file which McAfee then wants to analyze.


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Re: [PEDA] vias vs. pads

2001-11-13 Thread rlamoreaux



 Vias also don't have thermal reliefs like pads. (This works in PCAD,
 though).

That was an old version of Protel. Currently Vias get connected
automagically to a power plane having the same net name using the connect
style for that net.

Rob



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Re: [PEDA] Protel usage

2001-11-19 Thread rlamoreaux



I'm curious.

How many upgraded to Protel 99 SE and thus do not have the Protel 99 SE
Designer's Handbook, and how many people do have it?

How many of the people with the Designer's Handbook feel the simulator,
signal integrity and PLD are poorly documented?

The reason I ask is that at the last job we upgraded to 99Se and the help
files sucked for figuring out how to use the new features, but at this job
we bought Protel new and the Designer's Manual is actually quite a bit of
help. I just wish they had put the Designer's Handbook into the help files,
so I don't have to go get the manual back from the other engineer everytime
I can't remember something.

Rob


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Re: [PEDA] Protel's Good/Bad points (WAS:Using 3D)

2001-11-19 Thread rlamoreaux




 Initially on the new machine all printing activity from within Protel
would
 cause a crash, from experience we know that protel is very sensitive to
 graphics cards (surely not the fault of protel), so changing it sorted
some
 of the crashes (its now the same as the first machine)
 

Actually the crash when printing issue is a Protel bug. It seems they have
poor (or no) error recovery from an open printer call to a non-existant
printer driver. This is especially in the PCB print preview. The revocery
method that seems to work best was to remove all printers from thesystem
then add the printers back.

Most of the bugs I have found in Protel have been lack of good error
recovery more than logic errors, although if I want to get picky I could go
into all the dialog boxes with useless tab orders.

Rob



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Re: [PEDA] Protel's Good/Bad points (WAS:Using 3D)

2001-11-19 Thread rlamoreaux



 So we've got the same files on the same everything, what's left?  Protel
is
 sensitive to PC hardware, surely not..

It's possible even though it gets less likely with newer versions of
Windows. On the other hand Protel and most windows programs are sensitive
to DLLs. Protel is more sensitive to DLL Hell than some programs. And Yes I
agree that a well written and QA'd program does not have the poor error
recovery that Protel can experience, but I would rather have poor error
recovery than logic errors that lead to things like gerber files being 1%
small.

Rob



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Re: [PEDA] Protel's Good/Bad points (WAS:Using 3D)

2001-11-19 Thread rlamoreaux



Believe it or not I have seen a hardware memory problem crash Protel. It
was the only thing that needed enough memory to actually cause that SIMM to
be used. Of course this a few years ago running something like Windows 95
on a pentium 133, but the point is that it can happen since most low to mid
level PCs do not have ECC, and windows starts allocating from one end of
memory.

Of course while I won't rule it out without more evidence I think it
unlikely that his printing problem is RAM, but rather a combination of DLL
hell and poor error recovery.

Rob





Jason Morgan [EMAIL PROTECTED] on 11/19/2001 01:09:00 PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   'Protel EDA Forum' [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  Re: [PEDA] Protel's Good/Bad points (WAS:Using 3D)




Nice idea, but I don't think errant dram bits hunt and seek just Protel,
if the dram were faulty, I'd expect 2K (or any component of it) to dump at
least some of the time, also the bist would be likely to fail...

The majority of PC's though running at GHz frequencies still use either a
200 or 266MHz local bus and a 100/133Mhz memory bus, and thats tried and
tested.

Before I get flamed, I know there are some 400 FSB boards out there with
600
or even 800MHz memory (no idea how it works though), but we aint got one -
have you seen the memory prices for it

J.



-Original Message-
From: Bagotronix Tech Support [mailto:[EMAIL PROTECTED]]
Sent: 19 November 2001 16:41
To: Protel EDA Forum
Subject: Re: [PEDA] Protel's Good/Bad points (WAS:Using 3D)


 Explain why a fresh re-install of 2000 + sp2, then Protel +sp6 crashes on
 several operations, even on first run.

 Explain why printing on one machine with exactly the same graphics card,
 graphics drivers, print drivers etc. works fine. On the new one it does
not,
 if it prints at all, many entities are missing, especially outline boxes.

 So we've got the same files on the same everything, what's left?  Protel
is
 sensitive to PC hardware, surely not..

It's possible.  PC hardware can exhibit problems.  In all those MB of RAM,
if a few bits flake out, it can crash a program.  New PCs are on the
absolute bleeding edge, which means some blood (and sweat and tears) is
bound to be spilt somewhere.  If Protel is the largest app (with your
design
file loaded) you run on that PC, it could be using an area of RAM that is
not fit for use.  Instead of running the latest 2 GHz P++, maybe you should
try it on an older, slower PC.  The most advanced PC I have right now is a
W2K/SP2 dual-PIII 1.0 GHz with 512MB PC133 and a Matrox G450 video card.
Rock stable - but then I haven't done any Protel jobs as huge as the one
you
are doing.

Protel 99SE has plenty of bugs and quirks.  But no program, no matter how
good, can overcome a marginal, overclocked, metastable,
negative-timing-margin PC.

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com


- Original Message -
From: Jason Morgan [EMAIL PROTECTED]
To: 'Protel EDA Forum' [EMAIL PROTECTED]
Sent: Monday, November 19, 2001 11:29 AM
Subject: Re: [PEDA] Protel's Good/Bad points (WAS:Using 3D)


 The files in question were returned to Protel under NDA, they confirmed
the
 problems as reported and indicated that at present there was no fix.

 Sorry, but I can't transmit designs to the public, at least without NDA,
 thanks for the offer anyway.

 I can say that there are about:-
 1100 components spread across two sides
 1000 nets
 1 track segments (last time I talked to the guy doing the layout)
 2450 vias
 450 holes
 6 layers
 Several silk and mech keepout layers etc.
 5000 SMT pads
 15 Polys on two layers
 .DDB runs at about 20-70Mb and lives on the same HDD as the program.
 All in a 10 x 8 board area

 In any case, Protel works on at least one machine here (if with some
 deficiencies) without crashing (too often). That eliminates user error
and
 bad files (incidentally neither of which should EVER affect a well
written
 program, I know, as well a hardware engineer I'm also a programmer).

 So far as the poly problem goes, the fix in that case it to set 'Auto
 Repour' to 'Never' and then use my 'Repour All Poly' server, available on
 the yahoo group, failing to do this results in some long waits!!

 Explain why a fresh re-install of 2000 + sp2, then Protel +sp6 crashes on
 several operations, even on first run.

 Explain why printing on one machine with exactly the same graphics card,
 graphics drivers, print drivers etc. works fine. On the new one it does
not,
 if it prints at all, many entities are missing, especially outline boxes.

 (Note I've seen the latter on several past Protel installs with certain
 graphics cards, notably ATI)

 So we've got the same files on the same everything, what's left?  Protel
is
 sensitive to PC hardware, surely not..

 J.

 Jason Morgan - Senior Development Engineer
 CITEL Technologies Ltd.







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Re: [PEDA] Protel usage

2001-11-20 Thread rlamoreaux



 you mean about having to repeat the setup.  My one complaint is that it
 insists on rebuilding all the previews whenever the slightest change is
 made.

You can turn that off by going into tools preference and turning off
Perform automatic rebuild for changes.

Rob




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Re: [PEDA] Corrupted Protel 99 SE SP6 Installation

2001-11-28 Thread rlamoreaux



 I am unable to open a Database file with Protel 99 SE with SP6.  When I
 try to open one, the program gives me the New Design Database dialog.
 This installation on my computer used to work.


Did you try repairing the database? This is in the system menu on the far
left under Design Utilities.

Rob





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Re: [PEDA] Protel Crashes

2001-11-28 Thread rlamoreaux



 There is Parity memory and there is ECC memory,
 but when the buyers always want the cheapest ...
 You don't really expect a 500$ PC to have all the stuff
 that is built into a 5000$ machine, do you ?

 I think it way off to use software to mask hardware faults.

but when you get to more than 4 bits of parity it is much better to use
those bits to do ECC since the cost is the same. This is why all current
machine support ECC not parity. Also ECC is not using software to mask
hardware faults, it is using hardware to correct hardware faults. Parity in
PCs, on the other hand, used software to stop the machine after a hardware
fault.

Today's memory is much more reliable than it was 15 or 20 years ago so
advantage of ECC to the home user is not worth the cost. I check any new
memory and than I don't worry about it. I did not check once on a non-ECC
memory DIMM and had the memory work fine until I switched to Win2K.
Investigating, I found that there was an unsoldered pin on one of the
chips. Obviously Win 95 didn't actually use that memory, and Win2k/WinNT
uses everything it can get the problem never occured under Win95. This
would not have been a problem with ECC memory since the hardware would have
used the extra bits to correct the bad data line on every read.




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Re: [PEDA] Padstack

2001-11-29 Thread rlamoreaux



 Can anyone tell me if it is possible make a via or pad that is connected
to
 the Vcc net on the top and bottom layers only. TI do not want to connect
it
 to the inner Vcc plane as the decoupling caps are on the secondary side
of
 the pcb and I want the voltage to see them before the leg of the IC.

Just make a design rule that says that pad is not connected to the plane.
It works great. Vias are harder to make rules for so a free pad is probably
better to use.

Rob


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Re: [PEDA] Weird Problems with Protel -!!!

2002-01-11 Thread rlamoreaux



CHeck your *99SE.INI, *99SE.DFT, *99SE.RCS, and *99SE.* files in the
\WINDOWS directory.

My guess is one of them didn't get written correctly or got deleted. Since
99Se uses different files from 98 this would explain the difference. I once
reinstalled Protel only to realise that the problem was due to an INI file
problem. At least they are all pretty much SOMETHING99SE.XXX so a search
for *99se.* will turn up which exist and you can compare to a working
machine.

Rob







Brooks,Bill [EMAIL PROTECTED] on 01/11/2002 01:53:37 PM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   'Protel EDA Forum' [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)
Subject:  [PEDA] Weird Problems with Protel -!!!




I have had some unusual problems with Protel before but this one takes the
cake. I open a schematic from our server directory, Protel 99SE sp6 tells
me
that the schematic is an unknown file type
First thing I thought... oh yea... must be a corrupt file... So I open
Protel 98 and the file opens just fine hmmm
Go back to 99SE SP6 and yup... it still doesn't open the file h
Okay... check the setup of the program Lo and behold the Schematic
Servers are not installed well they were Last night when I logged
off...
Hmmm... Check licenses No license for schematic in the window... what's
up with that? You think it decided to drop them due to a conflict?
We have about 8 licenses here...

- Bill Brooks

P.S. I called Altium(Protel) and tried to get a Tech Support person to help
me... all I got was a recording... and they will get to my message
eventually...






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Re: [PEDA] Surprising performance increase with protel..

2002-01-11 Thread rlamoreaux



 Does having a large paging (swap file, I'm assuming these are the same)
file
 really make a difference in system performance?

If the program needs more than the pages file has then the OS will have to
enlarge the page file which takes time and then you have chunks all over
the hard drive and the seek time of the drive slows things down. With a
fixed unfragmented paging file the drives prefetch ability speeds up the
accesses to the swapped memory when the program needs it back.

Setting a minimum page file that is big enough for most days and
defragmenting the drive allows the OS to put everything together so it can
be written and read quickly, thus speeding things up.

I find a larger than neccessary page file minimum with no maximum works
great and then when I get into one of those marathon sessions that need
extra memory it is quicker.

ROb





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Re: [PEDA] Is this normal???

2002-01-23 Thread rlamoreaux





no it doesn't work properly! as soon as the wheel is turned the
keyboard
 freaks out and i have to reboot. (press Esc and the windows start button
 menuwould pop-up.)


this sounds like the MouseWheel driver problem, which was not Protels bug,
but Microsofts. what version of Mouse driver software are you running?
Every time I turned the mouse wheel the keyboard shortcuts in PCB would no
longer wok, until I updated the mouse driver. I found that this was an old
update that Dell neglected to put on my machine when it shipped.

Win 2k reports my mouse driver to be version 3.20.0.484 dated 5/19/2000. If
you don't have this version or later the problem is probably Microsofts and
you can try updating from Microsofts site.

I have also seen a similar problem when my USB bus at home got screwy and
the USB keyboard and mouse got confused. This was without Protel running,
and I plugged in a cheap PS/2 keyboard and mouse as backup. Win XP and
updated drivers fixed this at home.

Rob






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Re: [PEDA] Cpld question

2002-02-20 Thread rlamoreaux



My experience with Xilinx parts is that there is no easy way to create them
period.  The newer parts may be different when used with the newer xilinx
tools, but the older parts i have to support are a royal pain. These parts
were done in OrCad or Viewlogic then converted through a series of
nightmarish steps to be compiled under XAct. The worst of these was trying
to pull up a 10 year old copy of OrCad to change one little gate then
trying to translate that into something a 10 year old version of XACT could
compile. Of course the fact that the library symbols used haven't been
supported since 1993 didn't help. I gave up and that board will be
redesigned using Alterra parts.

I have used Protel PLD to create GALs with much success, but then I had
used CUPL for that purpose in the past.. I do not like PLDs created in
schematic capture and my experience trying to support the ones I inherited
that were done in schematic capture has led me to conclude that it is a big
mistake.

With Xilinx you have to be careful what library items you use and make sure
that the correct XNF for the library items are used by the Xilinx tool.  If
this is a current Xilinx part supported by the current Xilinx tools I would
use VHDL or Verilog to create the source files than use the Xilinx tool to
compile it.

Rob




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Re: [PEDA] Protel and Windows XP

2002-02-22 Thread rlamoreaux



 I heard from a friend that Protel won't work on Windows XP. I'm setting
up
 a new computer, and I'd like to run Windows XP if I can.

There was a discussion on this list a while back about some part of Windows
XP help ceasing to work after Protel was run under Windows XP Home (not
Pro).
As I recall Protel worked fine, but the start menu help would stop
functioning.

I have run Protel a limited amount under XP Pro and not seen any problems,
but then I virtually never use the Start Menu Help.

Rob





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Re: [PEDA] Acrobat Reader to Protel sw

2002-05-01 Thread rlamoreaux



 The problem is similar to converting gerber to PCB, only more complex
 because of scaling and because both gerber and Protel are vector-based. I
 don't know about PDF.


PDF is basically encapsulated binary Postscript with some extensions so it
contains vectors bitmaps and scalable fonts. There may be something that would
take the postscript in.

An Alternative would be to scan it in as a bitmap then pull in the bitmap.

Or plot from acrobat to an HPGL file using one of the HP printer drivers.





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Re: [PEDA] Re[2]: CLIENT99SE caused an invalid page fault in module unk nown at 0000:01000001.

2002-05-10 Thread rlamoreaux



speaking of DDBs, has anyone ever figured out how to open them with Access?


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Re: [PEDA] Sheet numbers

2002-05-10 Thread rlamoreaux



 Or how do I give the sheets in the project numbers

Use the Anotate function (Tools- Annotate menu item) and tell it to Update Sheet
Numbers Only in the first combo box, or manually go into the sheet options
(Design-Options menu item) dialog box and change the sheet number on the
Organization tab.


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Re: [PEDA] SMD Package

2002-05-31 Thread rlamoreaux



Try the manufacturers web site or the IPC land pattern web site at
http://search.ipc.org/sm782/default.asp





Adeline Ko [EMAIL PROTECTED] on 05/31/2002 11:58:53 AM

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cc:(bcc: Rob LaMoreaux/DSPT)

Subject:  [PEDA] SMD Package



Hi,

Resently, I came across a Inductor package 1810.

Does any one know what is the actual footprint for this?

Or there is a www that has all the SMD footprint.

Rdgs
Adeline







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Re: [PEDA] help, how do i make rectangular holes in components and on the pcb itself?

2002-06-07 Thread rlamoreaux



 I want to make rectangular holes in pads for components with metal tabs. For
 instance, a hole 40mils by 120 mils. Can this be done in Protel 99SE? BTW,
 is hole the proper nomeclature for this?

I've done this in the past by placing the appropriate track on the drill drawing
layer, then adding the exact dimension information off to the side. The info was
something like 0.060 route for .250 inch. They will make these slots with a
router so the bit size and length information is what they need to know. You
could also show it giving the radius of the corners and the x and y lengths.


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Re: [PEDA] Protel PLD/CUPL Question

2002-06-12 Thread rlamoreaux



If you look in the Design Explorer 99 SE\Library\PLD directory you will find the
files for Protel PLD including Atmel.DL which as I recall contains the info you
are looking for.  I did this type of thing more than 2 years ago so I can't
remember exactly, but all CUPL files are there. At one point with Protel 99 PLD
was fighting me so much that I created the CUPL file in Protel than compiled it
with WINCUPL. Later with Protel 99 SE I compiled it fine.

I just changed the ATMEL.DL file and the PLD configure options changed to match,
so I suspect this is the file you want to copy.


You might also try renaming the Protel PLD directory to something else then
copying the Atmel PLD directory over, so the full version of Protel uses the
Atmel Files.

Rob








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Re: [PEDA] Protel PLD/CUPL Question

2002-06-12 Thread rlamoreaux



I downloaded the atmel tools and noticed that there are more than just the
ATMEL.DL file you will need. There are also some executables that it will need
to be put into the Library\PLD directory.  It also appears that the Atmel
massaged version may have some of PEAKVHDL in it, which I would guess is to
provide VHDL support, since PLD only does CUPL.

Of course like most hardware vendor specific versions of software there may be
added and deleted features, and little good support. I remember getting CUPL
years ago free from Lattice and having it only work for the specific parts and
features they had, even though the commercial version worked with lots of parts.
On other free tools I have found things that the commercial version didn't do
because the hardware manufacturer wouldn't let them.







Rob















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Re: [PEDA] Protel PLD/CUPL Question

2002-06-12 Thread rlamoreaux



The other file is in the Fitter update from Atmel, I think just unzipping it to
the Library\PLD directory may be enough to get it to work.

Rob





Jeff Stout [EMAIL PROTECTED] on 06/12/2002 05:34:13 PM

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cc:(bcc: Rob LaMoreaux/DSPT)

Subject:  Re: [PEDA] Protel PLD/CUPL Question



I found the Atmel.dl file use by WinCUPL and copied to Protel's PLD
directory, and that worked too.  However, it doesn't display the ATF15xx
technology details if you know what I mean.  There must be another file that
needs to be patched.

Jeff Stout


- Original Message -
From: [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Cc: matt [EMAIL PROTECTED]
Sent: Wednesday, June 12, 2002 10:36 AM
Subject: Re: [PEDA] Protel PLD/CUPL Question




 If you look in the Design Explorer 99 SE\Library\PLD directory you will
find the
 files for Protel PLD including Atmel.DL which as I recall contains the
info you
 are looking for.  I did this type of thing more than 2 years ago so I
can't
 remember exactly, but all CUPL files are there. At one point with Protel
99 PLD
 was fighting me so much that I created the CUPL file in Protel than
compiled it
 with WINCUPL. Later with Protel 99 SE I compiled it fine.

 I just changed the ATMEL.DL file and the PLD configure options changed to
match,
 so I suspect this is the file you want to copy.


 You might also try renaming the Protel PLD directory to something else
then
 copying the Atmel PLD directory over, so the full version of Protel uses
the
 Atmel Files.

 Rob





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Re: [PEDA] License Issues

2002-06-26 Thread rlamoreaux



I played with the licensing back when it came out and while you can't lock the
PCB license to you machine easily if at all you can prevent the messages.

Your coworker have to start the PCB server for the annoying message, so my guess
is PCB is set to Automatically start on their machines. Try Changing the PCB
server to start ON Demand. This should make it start on their machines only if
they open a PCB. Unfortunately it won't shut down automatically when they close
the PCB.

If this doesn't work remove the PCB server from their machines and the messages
will go away.

To change the servers startup and/or remove the servers go to the down arrow
menu and select servers. Now you can rightmouse on the PCB server and change
it's properties or remove it.

ROb





Tim Fifield [EMAIL PROTECTED] on 06/26/2002 10:49:32 AM

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cc:(bcc: Rob LaMoreaux/DSPT)

Subject:  [PEDA] License Issues



In the office we have one full P99SE license and another three schematic
licenses.

1. How do I lock the full license to my PC only. i.e.. not have it floating?

2. Is it possible to have the full license lock to my PC only when I start
up P99SE and floating when I'm not running P99SE?

The problem is that when others are using the schematic editor and have
started P99SE earlier in the day than I have I get the annoying warning
notice that I'm running two copies of the PCB from 1 license.

3. If I uninstall the PCB server from their computers what will happen?

4. Did perhaps we set up the licensing incorrectly?

Tim Fifield



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Re: [PEDA] SPICE sim question

2002-07-02 Thread rlamoreaux



I use simulation for a couple of reasons.

Last year I was given and existing design that didn't work.  i found a few
problems like op amps going into saturation and taking way too long to recover.
In order to develop a fix I used simulation to determine if the voltage limiter
would effect the signal enough to be a problem and if the tolerances on
resistors would vary the gain to be a problem. This was very useful and the
circuit worked properly when built.

Earlier this year we had a customer tell us that our ADCs were noisy because the
signals from their equipment with the wires running across the floor near a
noisy AC dynometer to our ADCs looked noisier than their existing system with
the wires in conduit. I found that our ADCs had no antialiasing filters and used
simulation to add filtering and verify that it would not effect the signals of
interest. The filters when built performed as the simulations predicted, but the
customer still complained that our signals were noisy. Then I simulated their
ADCs which were supposed to have a 40KHz passband, and found that they had a
26Khz passband that started to roll off before 1KHz! When they finally tested
their system (which had been in place for 5 years) they found that the
simulation matched the system and realized why their data was so dead.

I have also used quite a bit more often simulation of PLDs and FPGAs toe verify
their timing would actually work, and I wish the people who designed the boards
I am supporting had done much more so I wouldn't have so many problems to fix.

Simulation is a tool that can make your life easier, but it is only as good as
the input given it. If the models are wrong or it is applied without knowing how
the circuit should operate it will mislead you. I had this happen when I tried
to use an Opto to isolate an analog signal. The first attempt looked like it
would work, but my fellow engineer made me look closer and I found that it was
running in such a narrow band any noisy would overcome the signal. I went back
to the drawing board and came up with a better circuit.  So simulate to optimize
the circuit, eliminate possible designs that won't work, and determine what
variations in the parts will do to the circuit, then build the thing to verify
in the real world.

Rob




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Re: [PEDA] Acrobat 5 on Schematics

2002-07-10 Thread rlamoreaux



For the fonts that don't render correctly you may have to tell the PDF writer to
embedd the fonts. I haven't seen a problem with the arcs.

Rob





Brian Sherer [EMAIL PROTECTED] on 07/10/2002 01:07:22 PM

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cc:(bcc: Rob LaMoreaux/DSPT)

Subject:  [PEDA] Acrobat 5 on Schematics



I have Adobe Acrobat v5.0.5 under Win'98 and '99SE SP6 with 512 MB RAM,
and it works OK on Schematic files with the exception that arcs of certain
diameters located within 20% of the right edge of the sheet are not
rendered at all.
This includes such objects as the arcs used to create AND gates. It also
fails to
render certain specific larger font sizes, such as 20pt. These are for the
most part
B sheets;  the effect doesn''t seem related to sheet size or circuit
complexity.
I'm using the default Acrobat settings.

Brian
Foothill Services LLC

At 09:49 AM 7/10/02 -0700, you wrote:
I reccomend adobe acrobat for pcb files.
However, version 4 on w2000 sp2  does not work on sch files.  For those I
use efax.  For low cost if you subsribe to efax, you can use their prit
driver/display software to export to tiff or jpeg.

Does anyone know if acrobat 5 works with sch files?

Mike
- Original Message -
From: Yuriy Khapochkin [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, July 10, 2002 7:37 AM
Subject: [PEDA] PPC to word insertion


 Does anybody know how to insert PPC (PCBPrint) image into Microsoft Word?
 I would appreciate any ideas better, than printing - scanning.

 Yuriy Khapochkin.

 
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Re: [PEDA] Hardware questions (upgrade time - yuk!)

2002-07-15 Thread rlamoreaux



And why is it that the STUPID 17 inch outdoor LCD screen at my local Wendy's
Drive thru has better contrast and color than the
indoor desktop LCD screens?  Even when the temperature is -20 outside?  (Though,
the pixel transition speed around scrolling text
begins to suffer dramatically.)

Your Wendy's has a color display, not just red letters on black? None I've been
to have more than red on black.

The Red on Black are great because they have really large pixels and they are
monochrome. The bigger the pixel the better the contrast, and with a monochrome
LCD you can get more twist to make the contrast better. Then you can put a
really bright LED backlight behind it and you have  nice outdoor display.

I've fought with trying to find a good LCD for outdoors and the best were large
character high contrast monochrome ones with LED backlight. My boss at a former
job at one point wanted to use an industrial laptop, but the guys at the
entrance to the car wash couldn't read it in the sunlight. He promptly disavowed
all knowledge of it an we got stuck trying  to make it work after everything was
installed.






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Re: [PEDA] Bottom components with 'top' attribute set.

2002-07-24 Thread rlamoreaux



Could you have done a global change and changed the attributes, but not the
component. I know I did this once a few years ago.

Rob




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Re: [PEDA] Speaking of Protel Bugs.

2002-07-24 Thread rlamoreaux



 Don't you think this sentence could be true: IT IS MICROSOFT'S MOUSE DRIVER
 FAULT AND IT IS THEIR(MS) RESPONSIBILITY TO FIX THE BUG

And Microsoft did fix the bug in the Intellimouse drivers before JaMi got his
machine from Dell! The fix drive just did not ship with the Dell machines.

Updating the Intellimouse driver to the latest driver has fixed this bug on
every machine I know to have exhibited it. I too have a Dell 4100 and it
exhibited this problem until I updated the mouse driver, and I found the updated
driver was older than the Dell computer. Therefore I hold that this is a
MICROSOFT INTELLIMOUSE BUG, not a Protel Bug.

Rob





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Re: [PEDA] Speaking of Protel Bugs.

2002-07-26 Thread rlamoreaux



I probably did not respond because I got busy doing work and deleted the message
without reading it as I do with the majority of messages on this list.

Having worked for a major PC Manufacturer it in no way surprised me that Dell
would ship an older driver. The driver they ship is what they get with
Microsofts Windows 2000, which is the one that shipped with the original OEM
Windows 2000. The only drivers they ship that are not part of Windows 2000 are
the specific ones for the hardware they add that is not included in Windows 2000
OEM edition. This is the same old driver that comes with the Windows 2000 you
buy off the shelf which if you look has not been changed in over a year.

These driver problems are precisely why Microsoft came up with the AutoUpdate
utitily. Now updates are done much easier and older drivers get updated sooner.
Since much of Protel 99 was written before wheel mice were available it
surpirsed me that it even worked at all with the wheel. Microsoft operating
systems are a constantly moving target and Iam surprised more software doesn't
break more often. When installing an Application updates system libraries you
are asking for trouble and with Windows you tend to get it.

This is why one of the first things I do with a new machine is check that the
drivers are up to date.



Rob







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Re: [PEDA] Best PCB Package to use?

2002-07-26 Thread rlamoreaux



We have both Protel 99SE (bought to seats) and PCAD (inherited 1 seat), and
comparing them PCAD is more powerfull, but Protel is easier to use. They both
have different ways of doing things so going between them is not the easiest
thing for the user.

The features announced for DXP look to bring it closer to PCAD as far how
powerful it is, but PCAD is  in line for a major upgrade according to Altium.

We will hold off a decision about upgrading to DXP until we see what it and the
next PCAD have to offer, but we will probably continue to move new projects to
Protel. We have had too many support issues caused by our closed Californian
office never upgrading their tools and skills.

As far as issues with PCAD, it has them, especially if you are trying to support
old designs with the new version and the designer of the boards did things like
routing signals on sections of power layers (they also did it the wrong way).
Libraries have also been a problem since they used many different ones and did
not save the library with the design.

If I was looking to buy something in the near future I'd wait and get an eval
copy of DXP as soon as it is available and an eval copy of PCAD, then spend the
time to learn each and see which matches our needs better. Fortunately we don't
need to buy now and can take the time to decide.

Rob









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Re: [PEDA] Speaking of Protel Bugs.

2002-07-29 Thread rlamoreaux



 For instance, I was happily running Office 97 under NT when the computer
 guys decided to give me an upgrade to Office 2000. Whether this event was
 related or not with other upgrades, shortly thereafter I got a failure to

Speaking of upgrades breaking things, I once had a machine that would
occasionally crash running Protel under Windows 95, and I decided to upgrade it
to Windows 2000 that was then in Beta. Windows 2000 died immediately every time.
Investigating revealed that I had been using the machine with a SIMM module that
had 3 pins not soldered for over a year! I fixed the SIMM and the problems went
away. It seems Protel was the only thing under Win95 that actually used the
highest blocks of memory, while Windows 2000 used all of memory right away.

So sometimes a software problem is really hardware.


Rob






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Re: [PEDA] Manual edit for adding net classes?

2002-07-30 Thread rlamoreaux



I haven't looked into it, but I believe this could be done, by saving the pcb to
an ASCII file then editing the text there.

Rob





Frances Wheeler [EMAIL PROTECTED] on 07/30/2002 11:09:21 AM

Please respond to Protel EDA Forum [EMAIL PROTECTED]

To:   'Protel EDA Forum' [EMAIL PROTECTED]
cc:(bcc: Rob LaMoreaux/DSPT)

Subject:  Re: [PEDA] Manual edit for adding net classes?



Yes but as I mentioned I have over 40nets and want to add the net
classes in a text format so I can do it all at once (like an INI file or
the old place txt file where you could place components by XY
co-ordinates we did that for placing test points in specified locations
-- you sure didn't want to do that one at a time.
Fran

-Original Message-
From: Steve Smith [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, July 30, 2002 9:53 AM
To: 'Protel EDA Forum'
Subject: Re: [PEDA] Manual edit for adding net classes?


Fran,

Design  Netlist Manager

Select the far left Add button.
Name your net class and select the nets
you wish to add to this new class and hit
the arrow key.

Regards,
Steve Smith
Product Engineer
Staco Energy Products Co.
Web Site: www.stacoenergy.com


-Original Message-
From: Frances Wheeler [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, July 30, 2002 10:41 AM
To: Protel EDA Forum
Subject: [PEDA] Manual edit for adding net classes?


I have some PCI traces that I want to add the lengths up --

From the connector to the resistor pin 1 = 1 length (which is critical
and
has a not to exceed)

From the resistor pin 2 to BGA pin = 2nd length

The above to distances must be added together and not to exceed 2.5
inches

In the rules I can add a net and a net class together, sooo I wanted to
make
a bunch of net classes but it's tedious to do one at a time - is there a
file I can edit. As the net class is in fact going to be only one net
there
are over 40 such nets to add up.

Any suggestions

Fran



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Re: [PEDA] Sch part of Connector (WAS: rectangle hole?)

2002-08-01 Thread rlamoreaux



 Why is this info being stored and how do I stop it from doing so?
 Especially the pin number starting 8.

Go to Preferences and change the default primitives to what you want them
to default to and you should be happier. My default pin is set to 0 and 0.

Rob








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Re: [PEDA] OT Metric vs Imperial

2002-08-02 Thread rlamoreaux



 I agree the rounding errors in Protel PCB between metric and imperial are
 really annoying, making things fall off grid. Many a time I have editted
a
 pad/part/track when I see 29.99mm and think Hey this should be 30mm
 and accidently go and edit it to 30.999mm. G.

I just tried setting all the vias on a DXP PCB to 0.3mm. It then
displayed 0.3mm and after closing and opening the file it still said 0.3mm.
I then changed another pad from 3.048mm to 3.03mm. Closing and opening and
it still was 3.03mm. I then went to english mode and changed it from
119.291mil to 119.290mil. Going back to metric still gave 3.03mm. I can't
seem to duplicate the this problem in DXP. I even tried it with a line 30mm
long.

I am also wondering how much of a problem this is with the dimensioning
tools having setable decimal points and gerber files having a highest
resolution of 0.01mil or 0.0001mm. I just haven't noticed this as a
problem, or am I missing something (besides the brain cells I lost in
college). I have noticed that the DXP memory router will not recognize a
pad as being memory routable if it is 0.001mil off grid from the other
parts.

Rob








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Re: [PEDA] hidden power pins

2002-08-02 Thread rlamoreaux


I've hidden them and not depending on the part. On one of the last parts I
created I hid the pins then listed them text on the square of the component
so that the tech could tell which are which.



Even if you hide them think about where they are so that when you need to
   unhide them they are not in a place that causes problems. On analog
   and mixed signal parts I do not hide the pins, where on digital I
   may in order to reduce clutter. I will usually then unhide one parts
   pins so the techs can figure out which are power.



Rob\








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Re: [PEDA] DXP Net lists

2002-08-09 Thread rlamoreaux

 Is it my imagination or does the net list generator in DXP SCH tools no 
longer support other vendors 
 formats (PADS PPCB) or a straight wire list?

I can't see it, but the help for Create Netlist shows an additional to be 
determined function so it may be a future service pack item.

A better place to ask this would be [EMAIL PROTECTED] since 
the developers and Altium Product manager actively participate there.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] DXP Newsgroup

2002-08-12 Thread rlamoreaux

 As far as I know this has not been designated a 'non-dxp' area :) :)
 
 But seriously, I know the support people at Protel and my local VAR 
watch this forum as well, and of 
 course, they are more than capable of responding here, if they wished 
too.

I did not say it was. I was just stating my opinion that it would better 
serve you to ask over there since I have seen a lot more responses from 
Altium over there. It appears to me that the developers (as opposed to 
support people) of DXP are watching the DXPTech Forum, when I see no 
evidence that the developers are watching this forum. I find results come 
quicker the fewer levels between you and the guy making the change.


Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Matched Lenghth Constraint

2002-08-13 Thread rlamoreaux

 I am afraid that to actually have the system (99SE, don't
 know about DXP) match these leghts it will not do it,

Isn't this what the menu item 'Tools-Equalize Net Lengths' for? I haven't 
used it except to play back when it was first introduced in 99 or 99SE, 
but it adds segments to get the nets equal. It has to be run repeatedly 
until the nets are close enoug, which is a bit of a pain, but it does add 
the meanders.


Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] OFF TOPIC - Spoofed email address (was: (Un)subscribe!!!)

2002-08-14 Thread rlamoreaux

 I've wondered how one goes about spoofing the from address, since 
that's 
 such a common tactic for spam and other undesirable mail. My sister just 
got 
 an email with a virus the other day, and the return address claimed it 
was 
 from me. I haven't seen any way within AOL to monkey with the return 
address 
 - is this just an AOL restriction?

Aol does not show the whole email header. Usually the Sender: field has 
the actuall sender, but the virus plops in someone elses email address in 
the From: field. In most emails you can do this when you set up the email 
address for the account, since it is just a text field. The Sender field 
is the on put in by the email server that is difficult to spoof. Email 
servers that allow anonymous mail forwarding such as uunet used to use can 
be used to spam by telling the machine to forward a message with a bogus 
header. This is why most ISPs will now only accept mail when you are 
logged into their net

Since you are using AOL mail most of the viruses won't be able to get to 
your address book to send itself to all your friends, but they can still 
attach to your files and try other ways to propagate. I recently saw this 
while looking about a virus for my sister I found something similar. It 
was attached to many files, but hadn't emailed out since it didn't 
understand AOL so it didn't send mail out. 

It was interesting to see all the new Linux viruses listed on McAffee 
though. There weren't as many as Win32, but there were a few of them.


Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Spoofed email address (was: (Un)subscribe!!!)

2002-08-15 Thread rlamoreaux

 But, many of the messages that look like they come from some particular
 user, actually came from another user who had the first user in his 
address
 book.  There were some submissions to this list, and some to members of 
this

Klez and some other virii not only rifle through the address book, but 
they also rifle through emails and files on the infected computer, so 
keeping the addresses anywhere on the computer is not safe anymore.


Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Newbie questions

2002-08-21 Thread rlamoreaux

As I understand it you want to have one library part for each part number 
in your system, and you want the part information in a field.

One way to do this is to add component names to the component for every 
partnumber. So than the library item RESISTOR would also have names equal 
to all your resistor part numbers. Unfortunately this does not allow you 
to match the value to the part number unless you put it in the name. The 
other way is to copy the component, rename it to the part number and add 
the part number information to the library fields. Some people use the 
dBase link to pull the part number information into the part fields after 
the parts are placed on the schematic, but since I use Access not dBase 
and the link is slow I don't use it.

So yes it is do-able with a little work.

Hope this helps,

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Protel - Drill Drawing missing holes

2002-08-30 Thread rlamoreaux

I've only seen this when I had some holes on top of holes. One report 
consolidated the holes at the same location and the other did not.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-


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Re: [PEDA] Warning to DXP Users re P99SE files

2002-09-19 Thread rlamoreaux

 NAV causes a LOT of problems for a LOT of people. Try uninstalling it
 and if you're worried, keep that machine off the net for a few weeks.
 

At the very least configure it to NOT scan .INI files since P99SE hits 
it's .INI files often and having the files scanned for viruses slows 
everything to a crawl.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-

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Re: [PEDA] OT - Complex boards and time to Layout?

2002-09-30 Thread rlamoreaux

 they were meatball 10/10 mostly 12/12 bds
 there was a giant pour on the entire top
 the clearance on the pour was 20 mils all the way around the pads (to
 make it easy and not get shorts!)
 
 they said with a big plane it is harder to etch
 
 there must be at least a bit of truth to that because i have had this 
 trouble with this type of board from 3 different shops - albeit not the
 highest tech shops kicking around

I did this type of pour and had the board house slap my wrists and tell me 
because of it they would have to electrically test the boards even though 
they were very simple. 

The explainattion was that if you have a big pour with lots of copper on 
one side you need about the same copper on the other side to balance it. 
Otherwise the acid on one side gets weak while the other side remains 
strong, resulting in overetching on one side or underetching on the other. 
Better circulation in the acid bath helps, but yield still goes down and 
thus cost goes up.

If you do a big pour on only one side you should do it with a crosshatch 
pattern so that the copper is balanced and etching is even.

After that wrist slapping I've have learned my lesson and I try hard to 
keep the copper even.


Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-

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Re: [PEDA] signal integrity

2002-10-10 Thread rlamoreaux

 It always says that there are warnings about my PCB, however it seems to
 work fine when I let it continue.  I assume that these are undefined
 integrity (IBIS or similar) libraries.

Actually they are probably loops in the tracks. These loops may be under 
pads and thus hard to find.
I ran into this on a board I was doing in P99SE and found that after it 
complained most signals would work but a few would not simulate. I later 
brought the board into DXP and DXP comlained that the signals had loops in 
them and thus could not be simulated. One loop was obvious, but others 
were under pads so hard to find without DXP pointing out the location. 
Protel explained that this was due to the agorithm using the tracks not 
the copper. I fixed the loops and SI worked great.

 How do you define the IBIS (or protel library file) to use for each
 component??

Once you take over a net you can double click on a pin in the net and 
change the model and stimulus for that pin.

 How does protel store the simulation(signal integrity) libraries?

I don't know and as long as it works I don't care. ;-} I'm usually too 
busy to look into things like this, and as I get older time goes faster so 
I don't have the extra time I did when I was young.

 Why does it not import so many IBIS files, it always complains the the 
file
 

I have imported a few different IBIS files, but I can't remember why some 
wouldn't import. I do remember looking at the files to try to figure it 
out, but not what the resolution was.

Hope this helps,

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-

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Re: [PEDA] signal integrity

2002-10-10 Thread rlamoreaux

 the copper. I fixed the loops and SI worked great.

 So I should probably get DXP back to find these kind of errors...


Well it does do a bit better job at it, and from the sounds of it the 
first Service pack will fix almost all the issues and requests for 
improvements.


 Once you take over a net you can double click on a pin in the net and
 change the model and stimulus for that pin.

 Is there a way to assign a component a whole IBIS file (ie the IBIS file 
for
 that component includign pins etc) as opposed to just each individual 
pin??
 I was thinking in terms of a component properties entry or similar.  ie 
In
 the PCB or Schematic workflow...

This is another area where DXP improved things. It is much easier to 
assign models to a component and they stay with it since you assign them 
while creating an integrated library. 

I have noticed with 99SE that once you assign a model to one pin the other 
pins of that type get most of the fields from that one. Unfortunately not 
all the fields carry over.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-

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Re: [PEDA] WARNING!!! Junctions at + points can disappear in DXP

2002-10-14 Thread rlamoreaux

 Bug's a bug's a bug, and that's what the original post endeavored to 
report.

And what wasn't reported on this list was the repsonse from Protel saying 
that this is fixed in the soon to be realeased Service Pack.


Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-


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Re: [PEDA] Viewing gerber files

2002-11-25 Thread rlamoreaux
 My question is how do you view and/or check the gerber? Is there some 
gerber
 viewer program out there that I need to know about, or perhaps a 
feature in
 protel99se that I'm not aware of.

Yes. It is called CamTastic and you should have received a copy with 
Protel 99SE.

I think that this is one feature that Protel is really missing.  The 
ability
to preview (in a graphical sense) the produced gerber file.  There are 
free
downloadable gerber previewers available just by doing a google search. 
The
one I've got on my machine here is PentaLogic ViewMate.  Although I don't
really use it as much as I should...


This is why Protel 99SE includes a license for CamTastic. Of course in DXP 
CamTastic has been merged into the rest of Protel and you can have it 
automatically open the Gerber files after they are generated.

I think that perhaps the print(ing) in Protel should be done using the
Gerber interface as this way it will force a correct Gerber interpreter 
into
the program, as well as correct Gerber creation. :)

Protel used to do this (PCB 3.0 I think). Instead of creating a Gerber, 
you would print to gerber. This was confusing to many, and it did not 
force a correct gerber generator. I think the current method is much 
better.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-


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Re: [PEDA] P-CAD Importation

2002-12-04 Thread rlamoreaux
 On trying to import the .PCB file, I get the message Unsupported
 File Format. On trying to import the .Sch file, I get a system crash
 due to an illegal driver call..
 
 Has anyone successfully imported older P-CAD PCB or .SCH files?
 

Are they in ascii format? I seem to recall something about the import 
being ascii format not binary. But then my memory has been known to be 
faulty at times.

I imported one or two pcad files a while back more for testing than 
anything since most of the pcad support my boss has been doing since he 
knows it better. Also I'd rather he got to do the cussing at the way our 
former employees stupidly did their designs (like routing tracks on power 
planes using two different layers).

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-

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Re: [PEDA] P-CAD Importation

2002-12-05 Thread rlamoreaux
 What version of Protel did you use to import the P-CAD files? And, do 
you
 recall the P-CAD version they were generated under? I've since been told 
the
 files I have were done under P-CAD 2001/SP1.

At one point the only version of PCAD supported for import was 2000. 
Looking at the Protel download site the PCAD importer for 99SE still says 
PCAD 2000 and does not mention 2001. It has been a year or more since I 
tried the importer so I can't remember much.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-

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Re: [PEDA] Server Uninstall!?

2002-12-18 Thread rlamoreaux
 On yet a different note, could it be due to too many people attempting 
to
 access a limited number of licenses at the same time - What would Prohel 
do
 if there were two requests for access at the same time (a second request
 sent (to the same subroutine or procedure) while the first request was 
still
 being processed (had not returned to from the subroutine or procedure) - 
Is
 the code capabile of handling 2 (or more) requests at the same time, or 
was
 this not anticipated by the programmer.

I don't understand what you mean here. The only way the subroutine could 
get executed twice is if it is on the same machine, in which case it is 
the same user and license. I have run two instances of 99se on my machine 
without trouble at all.

If you mean two different machines, they are not running the same 
subroutine because they are on different machines. What 99se does if the 
number of licenses is exceeded is that it tells each of the users that the 
license count has been exceeded. The dialog box can then be cleared and 
the user can proceed without loss of data. If they continue to exceed the 
license count they will get the dialog box every 30 seconds. It is 
annoying nagging, but I would rather that than a dongle, machine specific 
license, or having it just shut down. This way you can have one person 
running schematic while another is running pcb, and if the one running 
schematic mistakenly opens pcb it doesn't stop everything.

When Protel added the net licensing I tried  out exceeding the license to 
see what would happen and the results were some of the best in the 
industry. No server to load, no hassles, and it keeps people legal.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-


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Re: [PEDA] Hole Size Constraint

2003-02-24 Thread rlamoreaux
That would help him if he were using DXP, but since he is using P99SE his 
only choice is to use the hole size editor and manually check that the 
holes are in his list.

So you can make a rule to limit your holes to a list in DXP but not in 
P99SE.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-




Wojciech Oborski [EMAIL PROTECTED]
02/24/2003 10:06 AM
Please respond to Protel EDA Forum

 
To: Protel EDA Forum [EMAIL PROTECTED]
cc: 
Subject:Re: [PEDA] Hole Size Constraint


I know this is not exactly what is expected, but maybe it can be
considered as a workaround:

1. Specify (using query manager) a selection query looking like:
select all pad.hole size which are not equal to 28 and
select all pad.hole size which are not equal to 32 and
select all pad.hole size which are not equal to 40 and
select all via.hole size which are not equal to 24 and
select all via.hole size which are not equal to 28
- if there are any SMD components, then add:
select all pad.hole size which are not equal to 0
2. Hit Apply - as a result one gets selected pads and vias
not meeting desired rule

Pads and vias may be processed separately - 2 different queries
would be needed.

Having all pads (and/or vias) not meeting the rule selected
(instead of listed in DRC report) may be a benefit - one may use
it to globally edit them or even easily create pad class for them.

Wojciech Oborski







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Re: [PEDA] Hole Size Constraint

2003-02-25 Thread rlamoreaux
Well I sit corrected. Sorry. I never even noticed Query Manager in the 
menus. I guess you learn something new every day.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-




Wojciech Oborski [EMAIL PROTECTED]
02/25/2003 03:28 AM
Please respond to Protel EDA Forum

 
To: Protel EDA Forum [EMAIL PROTECTED]
cc: 
Subject:Re: [PEDA] Hole Size Constraint


[EMAIL PROTECTED] wrote:

 That would help him if he were using DXP, but since he is using P99SE 
his 
 only choice is to use the hole size editor and manually check that the 
 holes are in his list.
 


Robert,

I'm not talking about DXP - I'm using Protel99SE!
The post was about using Query Manager (the tool which IS in P99SE)
to SELECT objects not meeting desired rule instead of running
DRC (while you cannot specify proper rule in P99SE).

I tested the method quickly (in P99SE) before sending the post
- I got selected those pads and vias that had there hole sizes
out of the desired set.

Producing drill file is good - it shows quickly that you have
some pads/vias offending your rule, but with the described
method you get them selected, which may help with further
processing.

Sincerely,
Wojciech Oborski







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Re: [PEDA] Mixed PCB (imperial metric)

2003-02-25 Thread rlamoreaux
 The problem start when i try to place a track, the anchor point in the 
 metric component pad has ok but when i draw the track outside the pad or 

 over the pad the track goes to grid. Can you understand my problem? Have 

 you a solution???

I just route it with a grid of something like 5mil. When I come off the 
pad I go straight until I am far enough away from the pad that a diagonal 
won't interfere with other traces from nearby pads, then I put a 45 degree 
track and from there I am on grid. If you are on the 45 degree when you 
click the mouse the first time the track will be straight and aligned with 
the pad. I have a borad right here that has TSSOP memory with 0.5mm pitch 
and I routed it with a 0.005 inch grid.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Import from spreadsheet?

2003-03-03 Thread rlamoreaux
 My problem is to get the designators to be independent of the components
 and placed on Mechanical Layer 4.
 I would like to present documentation where I have a silk screen layer
 and a component placement layer independent of each other.
 Since PCBs are getting smaller and smaller I have no room silk screen
 around 0805, 0603, ... and no room for designators on SMT parts, but
 people like to have designators on connectors.
 What I do now is making a class for the connectors so I can select them
 and then switch the designators on and off on the SMT parts, when I make

One way to do this is to include the special string .designator on the 
Mechanical Layer of your library items.

This way all of your components would have their designator on the 
mechanical layer, and you could center it on the part so it looks good for 
the assembly drawing.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Hooking up to edge connector created by PCB wizard in v3.6

2003-03-03 Thread rlamoreaux
 I'm using an old version (v3.6) because that's what my customer owns and
 they don't want to upgrade. My question is: What do I need to do, either
 in the schematic or PCB editor, to get the netlist to connect to the PCB
 edge connector (AT board) created by the PCB wizard? I've looked all
 through the documentation and can't find any mention of how to do this.

The AT bus connector is a part, and probably has the designator P1 and a 
footprint with a name like ATEDGE. Double click on the edge connector and 
see what properties is has to get the exact spellings. You then need to 
have a schematic part that has the same reference designator and footprint 
attributes.

Either create your own schematic library Item or search through the 
libraries and find one with the same pins. It has been so long since I 
used 3.6 that I can't remember if the schematic item came with it or not. 
I would do a search for *AT* in the libraries. After that it is just like 
updating an existing PCB to reflect changes in the schematic.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Network issues

2003-04-04 Thread rlamoreaux
Do you have virus checking on? I have an ongoing thing with our IT 
department because they want viruscan to check INI files and Protel hits 
INI files hard so the viruscan slows it to a crawl. 

Just a thought that it may be a similar issue since I believe I read you 
said it was opening and closing the file for every line written (are you 
saving in ascii then?).

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] A little OT - PCB labelling

2003-06-06 Thread rlamoreaux
Brady and others make various poly-whatever label stock that can be laser 
or thermal transfer printed onto. See 
http://catalog.bradyserve.com/cgi-bin/ncommerce3/CategoryDisplay?cgmenbr=2cgrfnbr=21753CTcount=1

Some of these labels will even take the high temperatures of a reflow 
oven. See BRADY B-652 DOT MATRIX / LASER PRINTABLE HIGH TEMPERATURE POLYIMIDE LABEL 
at:
http://www.info.bradycorp.com/TDS/tdsv1r0.nsf/b14eec34add0a9e1802565080049eca9/085b600b0a208f958625688c005f40d4?OpenDocument

Get a Brady catalog and see if your thermal printer can be used as a 
thermal transfer printer. Otherwise go to laser printed or preprinted 
labels that you can then enter the number into the syste, from the label 
as opposed to using the system to generate the number.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-


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Re: [PEDA] six or eight-layer (or more?) stackups

2003-06-04 Thread rlamoreaux
 The text book standard that  is

 1signal
 2gnd
 3signal
 4gnd
 5pwr
 6signal
 7pwr
 8signal



I thought that the following stackup was prefered because then every 
signal is one layer from a ground plane.

 1signal
 2gnd
 3signal
 4pwr
 5pwr
 6signal
 7gnd
 8signal

Any comments?

Also anyone else losing messages, or is it just my IT department and Lotus 
Notes?

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] six or eight-layer (or more?) stackups - Capacitance

2003-06-04 Thread rlamoreaux
 First, my experience regarding layout is minimal at best since I seem to 

 exhaust all the wrong ways first.  I once took a class in multilayer 
layout 
 and was told that the capacitance between the power/ground planes 
 themselves was sufficient for decoupling high frequencies and that 
adding 
 pacitors could cause tuned circuits and troublesome resonances.  I'm 
 simply asking, any views on that theory?


That may be true at very low frequencies like 74LSxx parts, but as the 
edge rate goes up the capacitance needs to be closer to the pin. Most 
manufacturers today say to put decoupling capacitors as close to the power 
pins as possible and they try to make a power and ground such that the cap 
can be attached to both pins.

common in today's circuits.  Also, 0.01 uF caps are less expensive and 
take
up less space (0805 vs. 1206).

Huh? Why would you use a 1206 0.1uf for anything unless you needed 50WVDC 
or more rating? 

Everything I have read on bypassing for digital says to use 0603 or 
smaller parts since they have lower inductance, and at the moment 0603 is 
the most cost effective. On a current design I have 0603 0.1uf, 0.01uf and 
smaller, 0805 1uf and 1210 10uf ceramic caps, besides the larger 
tantalums.

The previous designers, who no longer work for us, used 1210 0.1uf for all 
the bypassing and they put them on the other side of the board far away 
from the power pins with really small traces so they'd be comletely 
useless. It really makes life suck now that we need to get RFI compliance 
testing done, especially when they routed digital across ground plane cuts 
and routed ADC power on traces that snake all over the board, 
and...I'm going home for a beer.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] PCI power pins...

2003-06-10 Thread rlamoreaux
The way I read the PCI spec, a number of years ago when I designed a PCI 
board, you were REQUIRED to terminate ALL power pins on the board with a 
specified capacitance that could be from the power plane or capacitors if 
the plane wasn't enough. It read to me that you could combine pins into 
one capacitor, but that the capacitance had to be there for the pins.

Having said that I have seen a number of boards that don't even have the 
power pins on the connector.

I combined a few pins into fewer caps where I could and the board worked. 
I don't know if it would have passed the official comliancy test since 
only three protos were made before management abandoned the project.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Protel Signal Integrity - self help

2003-06-10 Thread rlamoreaux
 I have carefully inspected the routes and no sign of loops anywhere. The
 analyzer seems to have  particular problems with T networks. I have 
cured
 one instance of this by removing the route, deleting the net, creating a

The loops could be under pads. I had this problem on a board and could not 
find the loops at all. DXP pointed out the loop and where it was (x,y 
coords). Sure enough hidden under a pad was a loop, which confuses the SI 
algorithm.

Not sure on the rest unless the virtual memory is running out on that 
machine.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] PEDA[OT] - PCB Duplication Methods

2003-06-24 Thread rlamoreaux
Never seen this myself, but found this with a quick internet search:








Check this outcarefully:) Hive: HKEY_CURRENT_USER Key: 
Software\Policies\Microsoft\Windows\System Name: DisableCMD Type: 
REG_DWORD Value: 0 enable command prompt and batch files Value: 1 disable 
command prompt and batch files Value: 2 disable command prompt but allow 






Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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