Re: [PEDA] Schematic Title Block - Please Explain
While editing a template you can edit all graphics on it as well, so you can delete Protel logo if you wanted. You can also delete a special string, which is in your case file path. The template has to be opened as a .dot file. Cheers, Igor Hi all, I'm having trouble wrapping my head around the Schematic title block in 99SE. I don't have a 'Default template' file loaded (under Tools-Preferences). This setting gives a simple title block with no graphics etc. Nice, I'm happy - except for one thing - the filename has its full path displayed and more often than not extends into and way past the 'Drawn By' box. The other nice thing about this title block is that I can go into 'Document Options' and change the template size and the title block always stays in the bottom right-hand corner. So my first question is - where is this title block stored so I can modify it (if possible)? Now when I load a 'Default Template' from Tools - Preferences it has the big Protel logo with Protel's full address etc, etc on it. I don't remember working for Protel. At least I don't think I do. These templates are no good to me. These are the ones in the 'Templates.ddb'. I realize I can generate my own template, but that brings up another problem - resizing the sheet on the fly. If I use a custom template and change it's size with 'Document Options', then the title block stays where it is (it doesn't stay in the bottom right hand corner). Useless. That means I have to make a template for every size of sheet I want? Eugh. So I guess my second question is - is a custom template for every sheet size I use the only way? All I want is the 'standard' template without the full file path displayed in it. Is this asking too much? Sorry about the long-winded spiel, but I think this is important and it's been bugging me for a long time. Thanks in advance for any guidance, TC _ This e-mail has been scanned for viruses by MCI's Internet Managed Scanning Services - powered by MessageLabs. For further information visit http://www.mci.com --=_NextPart_000_001C_01C4AD2D.08FA9530 Content-Type: text/html; charset=us-ascii Content-Transfer-Encoding: quoted-printable !DOCTYPE=20HTML=20PUBLIC=20-//W3C//DTD=20HTML=203.2//EN HTML HEAD META=20HTTP-EQUIV=3DContent-Type=20CONTENT=3Dtext/html;=20charset=3Dus= -ascii META=20NAME=3DGenerator=20CONTENT=3DMS=20Exchange=20Server=20version=20= 6.5.7036.0 TITLESchematic=20Title=20Block=20-=20Please=20Explain/TITLE /HEAD BODY !--=20Converted=20from=20text/rtf=20format=20-- P=20ALIGN=3DLEFTSPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArial= Hi=20all,/FONT/SPAN/P P=20ALIGN=3DLEFTSPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArial= I/FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3Den-usFONT= =20SIZE=3D2=20FACE=3DArial#8217;/FONT/SPANSPAN=20LANG=3Den-us= /SPANSPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArialm=20having=20= trouble=20wrapping=20my=20head=20around=20the=20Schematic=20title=20block=20= in=2099SE./FONT/SPAN/P P=20ALIGN=3DLEFTSPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArial= I=20don/FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3Den-us= FONT=20SIZE=3D2=20FACE=3DArial#8217;/FONT/SPANSPAN=20LANG=3Den= -us/SPANSPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArialt=20h= ave=20a/FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3Den-us= =20FONT=20SIZE=3D2=20FACE=3DArial#8216;/FONT/SPANSPAN=20LANG=3D= en-us/SPANSPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArialDef= aul/FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3Den-usFON= T=20SIZE=3D2=20FACE=3DArialt/FONT/SPANSPAN=20LANG=3Den-us/SPAN= SPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArial=20template/FON= T/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3Den-usFONT=20SIZE= =3D2=20FACE=3DArial#8217;/FONT/SPANSPAN=20LANG=3Den-us/SPAN= SPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArial=20file=20loaded=20= (under=20Tools-gt;Preferences)./FONT/SPANSPAN=20LANG=3Den-us/SPA= NSPAN=20LANG=3Den-us=20FONT=20SIZE=3D2=20FACE=3DArialThis=20setti= ng=20gives=20a/FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3D= en-us=20FONT=20SIZE=3D2=20FACE=3DArialsimple/FONT/SPANSPAN=20LA= NG=3Den-us/SPANSPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DAria= l=20title=20block/FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LAN= G=3Den-usFONT=20SIZE=3D2=20FACE=3DArial/FONT/SPANSPAN=20LANG=3D= en-us/SPANSPAN=20LANG=3Den-us=20FONT=20SIZE=3D2=20FACE=3DArial= with=20no=20graphics=20etc.=20Nice,=20I/FONT/SPANSPAN=20LANG=3Den-u= s/SPANSPAN=20LANG=3Den-usFONT=20SIZE=3D2=20FACE=3DArial#8217;= /FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3Den-usFONT=20= SIZE=3D2=20FACE=3DArialm=20happy/FONT/SPANSPAN=20LANG=3Den-us/= SPANSPAN=20LANG=3Den-us=20FONT=20SIZE=3D2=20FACE=3DArial#8211;/= FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3Den-usFONT=20S= IZE=3D2=20FACE=3DArial=20except=20for=20one=20thing/FONT/SPANSPAN=20= LANG=3Den-us/SPANSPAN=20LANG=3Den-us=20FONT=20SIZE=3D2=20FACE=3D= Arial#8211;/FONT/SPANSPAN=20LANG=3Den-us/SPANSPAN=20LANG=3D=
Re: [PEDA] Video Board Recommendations ?
Agree with nVidia, they are working quite well. I used GeForce 440MX 64MB and was more than happy. Then I changed to Radeon 9600 128MB dual head that was much faster. Both running without any problems. Cheers, Igor -Original Message- From: Terry Creer [mailto:[EMAIL PROTECTED] Sent: Wednesday, 25 August 2004 3:22 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] Video Board Recommendations ? Hi Linden, To date, all of the machines I've used for Protel have run nVidia based cards without a problem. I've used the following cards, and all ran without hiccups: nVidia Vanta 16mb (not enough memory for anything other than a small design) nVidia GeForce 2 32Mb (still not quite enough memory) nVidia GeForce 4 MX 64Mb nVidia GeForce 4 MX 128Mb nVidia GeForce FX 5200 128Mb (in current machine) None have had dual outputs, but you can easily set up dual outputs in WinXP with a second PCI video card. (See my post Multiple Displays a month or so ago). TC -Original Message- From: Linden Doyle [mailto:[EMAIL PROTECTED] Sent: Wednesday, 25 August 2004 2:28 PM To: PEDA Subject: [PEDA] Video Board Recommendations ? Greetings all, I have heard that some brands of video cards can show problems when running Protel. Does anyone have any recommendations as to whose video boards work well and those I should steer clear of? I'm not after the latest and greatest video gamers mega-card just something that will reliably display Protel PCBs and Schematics preferably upgradable to a dual monitor setup (either a board with 2 outputs or the ability to operate with 2 seperate boards) Best Regards, Linden Doyle Product Development Engineer Zener Electric Pty Ltd. _ This e-mail has been scanned for viruses by MCI's Internet Managed Scanning Services - powered by MessageLabs. For further information visit http://www.mci.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 99SE SP6 updating footprints
Dennis, keep your PCB file open, open your PCB library and display the footprint you want to update. Click on the 'Update PCB'. That should update all your footprints of the same type. Cheers, Igor -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED] Sent: Wednesday, 28 July 2004 11:24 AM To: Protel EDA Forum Subject: Re: [PEDA] 99SE SP6 updating footprints i'm sure this has been discussed (?) but i just noticed the following in 99SE PCB if you have several or more parts of the same footprint on a board and you type in a new and valid footprint name and do the global thing: copy footprint, footprint=same the one you are editing changes to the new footprint and all the others acquire the NEW FOOTPRINT NAME from the global operation but the footpints don't change to the new one is there some trick here to force them all ? they are place and i don't want to delete and reload nets to get them Dennis Saputelli -- ___ Integrated Controls, Inc. Tel: 415-647-0480 EXT 107 2851 21st StreetFax: 415-647-3003 San Francisco, CA 94110 www.integratedcontrolsinc.com _ This e-mail has been scanned for viruses by MCI's Internet Managed Scanning Services - powered by MessageLabs. For further information visit http://www.mci.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Board warpage?
Maybe it could be called 'Balanced Copper Coverage' rather then 'Thickness'? Or 'Track Density'? 'Thickness' is rather ambiguous in this case. My goal is always to take off as little Copper as possible. It prevents warping and improves EMC performance. It is good for the environment as well, especially in places where they pour the chemicals directly into the drain. Igor -Original Message- From: Brian Guralnick [mailto:[EMAIL PROTECTED] Sent: Thursday, 22 July 2004 10:54 AM To: Protel EDA Forum Subject: Re: [PEDA] Board warpage? The solution is Balanced Copper Thickness throughout your design. Tom H Using a dummy polygon plane on each layer usually does a fine job, but, don't expect repair de-soldering to be easy with so much copper sinking the heat away from your application point. _ Brian Guralnick - Original Message - From: Tom Hausherr To: 'Protel EDA Forum' Sent: Wednesday, July 21, 2004 1:53 PM Subject: Re: [PEDA] Board warpage? Harry, I've seen every kind of layer stack-up imaginable. Board warpage is mainly caused by the uneven distribution of Copper Thickness. If you have one plane that is out of order and call out 70um Copper Thickness (2OZ) your board will warp when the heat is applied either through fabrication lamination our plugging your assembled board into a voltage source. The solution is Balanced Copper Thickness throughout your design. Tom H -Original Message- From: Harry Selfridge [mailto:[EMAIL PROTECTED] Sent: Wednesday, July 21, 2004 10:28 AM To: Protel EDA Forum Subject: Re: [PEDA] Board warpage? It isn't an odd number of PAIRS that causes problems - it is an odd number of LAYERS. There are some advanced fab techniques that can reliably produce boards with odd number of planes or odd number of signal layers; however, there are very few fabs I would trust to do it. You can sometimes get away with odd number stackups, but it will eventually bite you in the butt. Six layers is a common balanced stackup - provided there are an even number of planes, and even number of signal layers with reasonably distributed copper. At 01:56 AM 7/21/04, you wrote: SNIP Some say that an odd number of layer pairs can cause problems, indeed we had problems with 6 layers at first, though we now use 6 layers to great success. Problems with that were caused by bad process control, not the design (though the manufacturer tried to blame design at the time!!) SNIP _ This e-mail has been scanned for viruses by MCI's Internet Managed Scanning Services - powered by MessageLabs. For further information visit http://www.mci.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Autorouter
And add 6/6 in between to smooth the transition. Are you sure you are joking here? :) Igor -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED] Sent: Wednesday, 21 January 2004 11:48 AM To: Protel EDA Forum Subject: Re: [PEDA] Autorouter $3K for the full version seems quite reasonable if it will do what spectra does now we just need a router that will do 4/4 around BGAs and then switch to 5/5 or 8/8 outside that region! -:) ds edsi wrote: Joe and Dennis, This company has no affiliation with Altium. Yes I agree ELECTRA is the routing solution for all of Altium's products. Dennis, it will do BGAs, it will do it all. When importing back from the router, it exhibits the same chararteristics as Spectra. Every via is converted to 28 mils. Double hits are common on Vias, but this is a minor problem compared to the quality of routing. The full version will set you back another 3K. I probably can save that if I can buy PCB ala carte from Protel since I have no use for their other add ons. Mike Reagan EDSI Frederick MD -- Original Message -- From: Dennis Saputelli [EMAIL PROTECTED] Reply-To: Protel EDA Forum [EMAIL PROTECTED] Date: Tue, 20 Jan 2004 11:28:34 -0800 what does it cost ? how does it like BGAs? does it still convert all the via holes to 28 or is that a protel bug? maybe altium should give up and just buy the ELECTRA company ? ds edsi wrote: Hello All, -- ___ Integrated Controls, Inc. Tel: 415-647-0480 EXT 107 2851 21st StreetFax: 415-647-3003 San Francisco, CA 94110 www.integratedcontrolsinc.com _ This e-mail has been scanned for viruses by MCI's Internet Managed Scanning Services - powered by MessageLabs. For further information visit http://www.mci.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DRC acute angle on polygons
Dom, Go to 'Rules'. In 'Acute Angle Constraint' choose 'Net Class' for 'Filter Kind', then click on 'Edit Classes' and add a new class. In that class put all nets except nets connected to your polygons. Then, once back in the rule dialog, choose the net class you created from 'Net Class'. This rule will not check polygon outlines. Regards, Igor -Original Message- From: Dom Bragge [mailto:[EMAIL PROTECTED] Sent: Monday, 19 January 2004 12:27 PM To: protel Subject: [PEDA] DRC acute angle on polygons I'm new to Protel (although definitely a consenting adult for pcb design ;-) I have DRC set for AcuteAngle Whole Board min angle 90.0deg I'm having some trouble understanding how I handle the voluminous error report when I do a batch DRC on my 2 layer board. It has lots of polygons that I have constructed with a tracksize of 12mil a grid of 10mil ( thus overlapping to form a solid copper area). It seems that within the construct of the polygon there is obviously areas where an acute angle of 90degrees is formed, that's obvious, but this seems to me to be checking at too low a level. I only really want the checking to be on individual tracks the outline of the polygon. Have I missed some way of getting this to work properly? How do you do it (or do you turn acute angle off)? Thanks in advance (99SESP6) -- Regards, Dom Dom Bragge, CID MIEEE | Silverbrook Research PL, PO Box 207 Snr PCB Layout Engr| Balmain NSW 2041, AUSTRALIA Ph +61-2-9818-6633xt163| [EMAIL PROTECTED] _ This e-mail has been scanned for viruses by MCI's Internet Managed Scanning Services - powered by MessageLabs. For further information visit http://www.mci.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Gerber output problems
Have you got x and y pad sizes same as the hole size? And untick the 'Plated' box. Regards, Igor -Original Message- From: Drew Mills [mailto:[EMAIL PROTECTED] Sent: Thursday, 15 January 2004 2:54 PM To: 'Protel EDA Forum' Subject: [PEDA] Gerber output problems Hi all, I completed the layout of a small PCB (99SE) designed for enclosure in a moulded case, then realised I needed an additional hole for mechanical locking. So I added a free pad, with no copper - just the correct hole size. Everything looks good in PCB, but now, when I output the gerber files I need to panelise in Camtastic, there is no trace of the hole, except for a tiny pin-prick on the top soldermask layer. Why is it so? Regards, Drew _ This e-mail has been scanned for viruses by MCI's Internet Managed Scanning Services - powered by MessageLabs. For further information visit http://www.mci.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] What could we expect in next Altium EDA tools?
Hamid, Altium is selling P99SE with a free upgrade to DXP. Then you get a free upgrade to P2004, so you have all three versions for the price of one. I am not trying to bring Altium sales up, just think that we should be fair to them and state all the facts. If your customers bought P99SE or DXP and both of you switched to P2004 at some point, it would still be cheaper for you to convert all your libraries from one version of Protel to another and to continue supporting the customer with SW you are (kind of, in case of DXP) familiar with than if you went for a new SW. Remember that Protel gets good to use around SP5 or 6, so its almost there. Igor -Original Message- From: Hamid A. Wasti [mailto:[EMAIL PROTECTED] Sent: Monday, 22 December 2003 8:05 AM To: Protel EDA Forum Subject: Re: [PEDA] What could we expect in next Altium EDA tools? Dennis Saputelli wrote: So Hamid, are you going to give Protel 2004 a spin when it is released? If it is indeed free and I have time. it appears that the PCB side will essentially be DXP SP3 There you go believing the guys at Altium again. What next? Are you now going to start believing things that come out of the mouths of politicians? and as Ivan has asked have you identified a competitive alternative for you and your customers? And as I answered in a previous post, I am not in the business of helping customers find alternatives. I tell them that this is the CAD system that their product is being developed in and if they want to buy this CAD system, I will support them in learning it. In the past, the only option that was presented was the latest version of Protel which the customers invariably bought. Today, the only option is the dead end version of Protel (99SE), which I will be happy to support them in , but they would be crazy to buy (if it is even available for sale). As for the specifics of the specific cases cited; one client may teach us their system (I have no idea what they use) while the other client is still deciding what they want to use. but at some point i guess we will need to either jump ship or bite the bullet (hey! 2 cliches in one sentence) As for our own company use, my first choice would be to jump ship. I would rather take my chances with a company that I do not know than stick with the one I do know, because I know how bad they are. the years of work in the libraries form a sort of trap, i wouldn't relish having to recreate all those parts Libraries are a huge investment. However, if you are gaining productivity by going to a different software, you will come out ahead in the long run. Hamid _ This e-mail has been scanned for viruses by MCI's Internet Managed Scanning Services - powered by MessageLabs. For further information visit http://www.mci.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Open source SP7
Foot in the mouth disease is spreading fast. It seems I caught it, too. Mike's idea looks so obvious, someone should have come to this earlier. Combine it with JaMi's idea and it seems to be feasible as an open source project. Is anyone else sick? Is there an antidote? Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED] Sent: Thursday, 16 October 2003 5:07 PM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] Open source SP7 Ok, Mike, I'll stick my foot in my mouth . . . As if I haven't already done enough of that . . . Actually, I think that it is a lot easier than anyone may think. Most people on this list own a functioning copy of Protel 99 SE. Protel 99 SE runs faster on a slow computer than Protel DXP runs on even a fast machine. Enter the SDK. Lots of people have a copy of the SDK, and I happen to know for a fact that not all legitimately obtained SDK'e were obtained at the point of a non-disclosure agreement, or even at the point of an EULA. : ) So we use the Design Explorer shell from Protel 99 SE, and maybe even the core of Protel 99 SE SP6 PCB, and plug in a couple dozen servers that fix or replace all of the known problems (we can start with a pack of say seven (7) servers). : ) Worst we might have to do is make a few patches and/or intercepts in some of the the original executables. We might even be able to find a few legitimate Trial Versions of Protel 99 SE out there that we can legitimately redistribute in their original form for free, etc., etc., etc.. Yeah, I know some of you are worrying about slowing everything down by hanging all these new servers and patches on it, but once you put this thing on a really fast new machine, like the kind that you need to even make Protel DXP even limp along, then the thing should still fly. It could even possibly out-perform Protel DXP. If they won't give us our Service Pack 7, then maybe it is time that we develop our own Server Pack 7. : ) They don't actually even hold all of the cards that they may think they hold. There is more than one way to respond to a non responsive EDA vendor. : ) Altium, your last chance to give us Service Pack 7 for Protel 99 SE is fast approaching. : ) Whats it gonna be: SP7 or SP7? : ) - Original Message - From: Mike Reagan [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Wednesday, October 15, 2003 2:33 PM Subject: Re: [PEDA] Open source SP7 I thinks Jon is right we need the source code to start -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED] Sent: Wednesday, October 15, 2003 3:26 PM To: Protel EDA Forum Subject: Re: [PEDA] Open source SP7 hell, i'd buy a closed source one! ds Mike Reagan wrote: Hello All, I was contemplating what my next move with Protel will be and came up with an idea of creating an open sourced SP7 software for 99SE. Before I put my foot in my mouth, is there a future for open sourced Service Packs? is it legal? Mike Reagan EDSI -- Dennis Saputelli = send only plain text please! - no HTML == * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Off topic: Drawing revision control and PLM
Rich, this topic was discussed a while ago. You might have a look into the archive. Regards, Igor -Original Message- From: Rich Thompson [mailto:[EMAIL PROTECTED] Sent: Wednesday, 24 September 2003 2:42 AM To: Protel EDA Forum Subject: [PEDA] Off topic: Drawing revision control and PLM Hi group sorry about the kinda off topic post but this is a good place for opinions etc. I need a new system to track drawing revisions, ECO, ECR,MCR etc. Maybe even a full blown product lifecycle management system. I don't want to (or rather can't ;-) ) spend 100 thousand on a full blown system like Agile. it doesn't need to be that in depth. Firstly what does everyone else use? If any. and what can be recommended for a smallish company? Its not specifically for pcb docs, but basically the whole product preferably. I manage pretty much everything on a product so something to track all of that would be cool. I have just seen lots of products out there but they are way overpriced for what we need. I am seriously looking at maybe writing my own because of this. help appreciated Rich * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] P99SE has Altzheimers' ?
Maybe they were not mis-leading us intentionally. They changed their policies a lot recently, with ATS and DXP and all, so P99SE got a boot, as they could not afford to support two versions of SW. We might want to follow this path, though, to get SP7. It seems to be ideallistic cause now, but it would still be worthwile for us here. Igor -Original Message- From: Brian Guralnick [mailto:[EMAIL PROTECTED] Sent: Thursday, 18 September 2003 10:30 AM To: Protel EDA Forum Subject: Re: [PEDA] P99SE has Altzheimers' ? I want my Service Pack 7 . . . Didn't Protel Miss-leadingly announce at 1 time that they would release a SP7? That was the time when I decided not to upgrade to DXP until SP7 came about... _ Brian Guralnick [EMAIL PROTECTED] - Original Message - From: JaMi Smith [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Cc: JaMi Smith [EMAIL PROTECTED] Sent: Wednesday, September 17, 2003 6:11 PM Subject: Re: [PEDA] P99SE has Altzheimers' ? P99SE has Altzheimers' ? Duh? You guys just now figuring that out? Unfortunately, it appears to be hereditary . . . I want my Service Pack 7 . . . * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Library management in a multi-user environment - is this broken?
Bill, we have implemented a Protel library system similar to what you describe. It makes use of Protel .ddb file access control. In Design Team folder in library .ddb you will find another foolder, called Members. There you set up names and passwords for all people with access to the library. You will have to create a list of all users here by adding new users. After doing that go to Permissions folder and set up access rights for [All users] and individual users. You can set up global access rights and access rights to individual files. Access rights to individual files overwrite the global access rights. You will have to create new permissions here. Master library can be set with a global access right such as [R] for read only. Information on details of setting this up can be found in the P99SE manual. We have been using this system for a couple of years and never had any problems. Hope this helps. Regards, Igor -Original Message- From: Brooks,Bill [mailto:[EMAIL PROTECTED] Sent: Thursday, 4 September 2003 2:11 AM To: 'Protel EDA Forum'; 'DXP Technical Forum' Subject: [PEDA] Library management in a multi-user environment - is this broken? I need to hear other's experiences with library management in Protel 99SE SP6. (I assume that DXP is similar) We have many users in our company and access to the library seems to only work for users that have 'write' access to the library file and folder. If they are restricted to 'read only' access the program doesn't recognize the file. The work around, at the moment, is to copy the library out of the 'read only' directory on our server and place the copy locally where the user has 'write' access. The software seems to like that scenario fine. But then we have multiple copies of the library in different stages of completion floating around the company on different computers. The temptation to use 'non-standard' symbols or footprints is potentially hazardous... We want to control the accuracy of the library and want to have one responsible designer manage the library for consistency sake and to reduce errors. Does anyone have a library system or configuration that works and that allows other users access to a single library that gets updated only by the component librarian with write privileges while the others who use it have read privileges? If so, how did you make it work and how did you get around these access right issues? Bill Brooks * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Geometric Center
I beleive to have read somewhere that the center is calculated from the component outline on the Top Overlay. Don't take me for it, it is just from the memory. Regards, Igor -Original Message- From: Tim Fifield [mailto:[EMAIL PROTECTED] Sent: Tuesday, 26 August 2003 1:28 AM To: Protel EDA Forum Subject: [PEDA] Geometric Center Does anybody know how Protel 99SE calculates the geometric center (Mid x,y) in the pick and place files? Tim Fifield * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PEDA] P99SE Annotation
It should work if the default designator is set int the sch library, e.g 10? for resistors or 20? for capacitors. Default designator is treated as a prefix and should not change when annotating. Igor -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Sent: Friday, 1 August 2003 6:31 PM To: Protel EDA Forum Subject: Re: [PEDA] PEDA] P99SE Annotation But I don't think this will distinguish between Rs, Cs, Ds, etc.. as Adeline needs. Robert Igor Gmitrovic [EMAIL PROTECTED]To: Protel EDA Forum [EMAIL PROTECTED] om.au cc: Subject: Re: [PEDA] PEDA] P99SE Annotation 31-Jul-2003 11:41 PM Please respond to Protel EDA Forum Adeline, go to Tools-Annotate(untick Current Sheet Only box)-Advanced Options and set a range for designators on each sheet in the project. We usually set top level sheet to the range of 0-99 and then child sheet 1 to 100-199, child sheet 2 to 200-299, second level child sheet 1 to 1000-1999, second level child sheet 2 to 2000-2999, etc. Regards, Igor -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Sent: Wednesday, 30 July 2003 6:45 PM To: Protel EDA Forum Subject: [PEDA] PEDA] P99SE Annotation Hi My company uses an internal designator naming standard for schematic symbols. The standard is such that each type of component is assigned a prefix and each designator will be 4 digits long, eg. 1st resistor: 1001, 2nd resistor: 1002, 25th capacitor: 2025, 54th diode, 3054, etc. Is there anyway I can get P99SE to generate this automatically? I understand that it can only do 11, 12, etc, and not 1001, 1002, etc. Furthermore if I reset the designators, the prefix number gets wiped out as well. Thanks for answering my question. Adeline * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PEDA] P99SE Annotation
Adeline, go to Tools-Annotate(untick Current Sheet Only box)-Advanced Options and set a range for designators on each sheet in the project. We usually set top level sheet to the range of 0-99 and then child sheet 1 to 100-199, child sheet 2 to 200-299, second level child sheet 1 to 1000-1999, second level child sheet 2 to 2000-2999, etc. Regards, Igor -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Sent: Wednesday, 30 July 2003 6:45 PM To: Protel EDA Forum Subject: [PEDA] PEDA] P99SE Annotation Hi My company uses an internal designator naming standard for schematic symbols. The standard is such that each type of component is assigned a prefix and each designator will be 4 digits long, eg. 1st resistor: 1001, 2nd resistor: 1002, 25th capacitor: 2025, 54th diode, 3054, etc. Is there anyway I can get P99SE to generate this automatically? I understand that it can only do 11, 12, etc, and not 1001, 1002, etc. Furthermore if I reset the designators, the prefix number gets wiped out as well. Thanks for answering my question. Adeline * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Protel 99SE experience
Hi Choong, upgrade to service pack 6, make sure you have at least 256MB of RAM and a good video card. Regards, Igor -Original Message- From: Choong Keat Yian [mailto:[EMAIL PROTECTED] Sent: Thursday, 17 July 2003 1:10 PM To: Protel EDA Forum Subject: [PEDA] Protel 99SE experience Hi and this is my first post.me and my colleagues has been using Protel 99SE on multiple machines based on Win98 and XP but what we found out is that it always crash and giving error warning which seems to me as a memory stack error.Then i upgrade its service pack to Version 5 but these pesky performance still remain.I would like to know from this list users experience concerning this.Btw i am going back to Protel 2.8 for this reason althought it is less powerful. TQ, Choong __ McAfee VirusScan Online from the Netscape Network. Comprehensive protection for your entire computer. Get your free trial today! http://channels.netscape.com/ns/computing/mcafee/index.jsp?promo=393397 Get AOL Instant Messenger 5.1 free of charge. Download Now! http://aim.aol.com/aimnew/Aim/register.adp?promo=380455 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PCB in Protel
Raoul, your problem might be in scaling the printout in the Print Preview. Open your preview, right click on the top line in the left pane (it's your printer's icon) and change the scaling. Regards, igor -Original Message- From: Natalie DeGennaro [mailto:[EMAIL PROTECTED] Sent: Tuesday, 24 June 2003 12:43 AM To: Protel EDA Forum Cc: proteledaforum Subject: Re: [PEDA] PCB in Protel Raoul, I'm not sure about Protel, but I know most PCB Design software uses either mils (0.00?) or millimeters for their design units. I don't know of any that use centimeters as their design database units. Do the conversion math and see if that is your problem. Regards, Natalie DeGennaro PCB Designer National Semiconductor Inc. Santa Clara, CA 408-721-2730 Website Visitor [EMAIL PROTECTED] 06/21/03 04:42 AM Please respond to Protel EDA Forum To: proteledaforum [EMAIL PROTECTED] cc: Subject:[PEDA] PCB in Protel Hi, I have a problem with PCB making in Protel DXP. The final printout appears to be for about 40% bigger. For example, I wish my PCB to have the following dimensions; width: 7cm height: 3cm but when I print it out it becomes width: 10cm and height: 6cm how come? Where is the problem? Posted from Association web site by: Raoul * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Protel 99 SE SDK
Nathan, it will only work with Delphi 5. Igor -Original Message- From: Nathan Horsfield [mailto:[EMAIL PROTECTED] Sent: Monday, 23 June 2003 10:30 AM To: [EMAIL PROTECTED]; [EMAIL PROTECTED] Subject: [PEDA] Protel 99 SE SDK Good Morning All, Currently trying to create some servers using the Server Development Kit unfortunately I cannot get it to compile correctly under Delphi 6 or 7. Comes back with bad file format for the protel include files crtsl50 and protelcomponents50. Any ideas on how to compile this correctly?? Thanks -- Nathan Horsfield Inspiration Technology P/L Ph: +61 8 8211 9668 Fax: +61 8 8211 9658 www.instech.com.au * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] OrCad to Protel
Another corollary is The grass is brown wherever you go. It might not be the colour of grass, it might just be a vision problem. Igor -Original Message- From: Bagotronix Tech Support [mailto:[EMAIL PROTECTED] Sent: Friday, 20 June 2003 11:13 PM To: Protel EDA Forum Subject: Re: [PEDA] OrCad to Protel You all know the expression The grass is always greener on the other side of the fence. The corillary to that is The grass is always browner where you are standing. Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com - Original Message - From: [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Friday, June 20, 2003 5:40 AM Subject: Re: [PEDA] OrCad to Protel Strange this, I am going in exactly the opposite direction. I used Orcad for 8 yrs until my present job introduced me to Protel. I am crowing with delight now that the firm has cut a deal with Cadence. Protel has got the look and feel right and Orcad is undeniably clunky but I still can't believe that any professional app could be as unreliable as Protel. Crashes frequently and thoroughly, can't do hierarchy properly, can't screen single pin nets ( very embarrasing ), leaves routes hanging unconnected without warning, cannot reconnect a netlist to routes competently. The SI tools are very fragile and do strange things without warning, there is no documentation to properly describe the workings of the SI tools... (ie the calculation engine(s)). I have no idea without doing experimental work as to how much of the SI output is true ( again, embarrasing ). It was as though the authors got so far and then gave up. They did all the up front look and feel stuff but forgot the really important hard edges. No way has my experience with Protel given me the slightest desire to try DXP. I am on my last Protel project now and it is Orcad and Specctra from now on... yippee!! Website Visitor [EMAIL PROTECTED]To: proteledaforum [EMAIL PROTECTED] ervinc.com cc: Subject: [PEDA] OrCad to Protel 19-Jun-2003 03:17 PM Please respond to Protel EDA Forum Hi all, I used to use Protel 99SE about 3 years ago. Then with a new job, the company has Orcad. I've been using Orcad now for the 3 years and I am absolutely disgusted with it. I'm trying to convince management to go to Protel. All I wanted to know is how everyone feels about the new Protel DXP. I really want to switch back to Protel and any info would be great! Thanks for the replies Evi Posted from Association web site by: Evi Tomaskovic * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] KeepoutLayer Rules
-Original Message- From: Craig Wroth [mailto:[EMAIL PROTECTED] Sent: Friday, 20 June 2003 11:44 AM To: Protel EDA Forum Subject: [PEDA] KeepoutLayer Rules Hi, Having problems geting my rout to follow the following rule in DXP, Processing Rule : Clearance Constraint (Gap=40mil) (All),(Layer = 'KeepOutLayer') This rule set with Any Net will Pick up the following: Violation between Track (16929.134mil,11456.692mil)(25590.552mil,11456.692mil) Keep-Out Layer and Track (16929.134mil,11023.622mil)(16929.134mil,11456.692mil) Keep-Out Layer Violation between Track (16929.134mil,7480.316mil)(16929.134mil,11023.622mil) Keep-Out Layer and Track (16929.134mil,11023.622mil)(16929.134mil,11456.692mil) Keep-Out Layer Violation between Pad din96-0(17030.158mil,11217.952mil) Multi-Layer and Track (16929.134mil,11023.622mil)(16929.134mil,11456.692mil) Keep-Out Layer Violation between Track (25590.552mil,7480.316mil)(25590.552mil,11456.692mil) Keep-Out Layer and Track (16929.134mil,11456.692mil)(25590.552mil,11456.692mil) Keep-Out Layer Violation between Track (24803.15mil,7480.316mil)(25590.552mil,7480.316mil) Keep-Out Layer and Track (25590.552mil,7480.316mil)(25590.552mil,11456.692mil) Keep-Out Layer Violation between Track (20866.142mil,7480.316mil)(24803.15mil,7480.316mil) Keep-Out Layer and Track (24803.15mil,7480.316mil)(25590.552mil,7480.316mil) Keep-Out Layer Violation between Track (16929.134mil,7480.316mil)(20866.142mil,7480.316mil) Keep-Out Layer and Track (20866.142mil,7480.316mil)(24803.15mil,7480.316mil) Keep-Out Layer Violation between Track (16929.134mil,7480.316mil)(16929.134mil,11023.622mil) Keep-Out Layer and Track (16929.134mil,7480.316mil)(20866.142mil,7480.316mil) Keep-Out Layer Violation between Pad din96-0(17030.158mil,7717.952mil) Multi-Layer and Track (16929.134mil,7480.316mil)(16929.134mil,11023.622mil) Keep-Out Layer Note These are all the Kepout lines and Multi-Layers with no net assined. Anything with a net was missed. Which was the hole point of the rule. Using different nets it does not pick up any thing. Yes On the PCB there are Routed nets 10mil away. How Do I keep the tracks 40mil from my Keep out. I could just move it in but I could do this in Protel 98. Craig Wroth Research Development Injectronics Australia Pty Ltd 8 Becon Court Hallam Vic 3803 Australia * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] KeepoutLayer Rules
Sorry for the previous blank post, too fast on the trigger. Craig, you could do several things. 1. Create a net class for all your copper tracks and use the class in instead of (All) your rule. 2. Create a separate rule for each of the copper layers instead of (All). Those are the first to come to mind. Hope this helps. Igor -Original Message- From: Craig Wroth [mailto:[EMAIL PROTECTED] Sent: Friday, 20 June 2003 11:44 AM To: Protel EDA Forum Subject: [PEDA] KeepoutLayer Rules Hi, Having problems geting my rout to follow the following rule in DXP, Processing Rule : Clearance Constraint (Gap=40mil) (All),(Layer = 'KeepOutLayer') This rule set with Any Net will Pick up the following: Violation between Track (16929.134mil,11456.692mil)(25590.552mil,11456.692mil) Keep-Out Layer and Track (16929.134mil,11023.622mil)(16929.134mil,11456.692mil) Keep-Out Layer Violation between Track (16929.134mil,7480.316mil)(16929.134mil,11023.622mil) Keep-Out Layer and Track (16929.134mil,11023.622mil)(16929.134mil,11456.692mil) Keep-Out Layer Violation between Pad din96-0(17030.158mil,11217.952mil) Multi-Layer and Track (16929.134mil,11023.622mil)(16929.134mil,11456.692mil) Keep-Out Layer Violation between Track (25590.552mil,7480.316mil)(25590.552mil,11456.692mil) Keep-Out Layer and Track (16929.134mil,11456.692mil)(25590.552mil,11456.692mil) Keep-Out Layer Violation between Track (24803.15mil,7480.316mil)(25590.552mil,7480.316mil) Keep-Out Layer and Track (25590.552mil,7480.316mil)(25590.552mil,11456.692mil) Keep-Out Layer Violation between Track (20866.142mil,7480.316mil)(24803.15mil,7480.316mil) Keep-Out Layer and Track (24803.15mil,7480.316mil)(25590.552mil,7480.316mil) Keep-Out Layer Violation between Track (16929.134mil,7480.316mil)(20866.142mil,7480.316mil) Keep-Out Layer and Track (20866.142mil,7480.316mil)(24803.15mil,7480.316mil) Keep-Out Layer Violation between Track (16929.134mil,7480.316mil)(16929.134mil,11023.622mil) Keep-Out Layer and Track (16929.134mil,7480.316mil)(20866.142mil,7480.316mil) Keep-Out Layer Violation between Pad din96-0(17030.158mil,7717.952mil) Multi-Layer and Track (16929.134mil,7480.316mil)(16929.134mil,11023.622mil) Keep-Out Layer Note These are all the Kepout lines and Multi-Layers with no net assined. Anything with a net was missed. Which was the hole point of the rule. Using different nets it does not pick up any thing. Yes On the PCB there are Routed nets 10mil away. How Do I keep the tracks 40mil from my Keep out. I could just move it in but I could do this in Protel 98. Craig Wroth Research Development Injectronics Australia Pty Ltd 8 Becon Court Hallam Vic 3803 Australia * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Direct printing of artwork
I am sure that in the early days of Power Print the option to print a negative of the .ppc file was there. It was a good feature, shame it's got lost. It should be introduced back into DXP. If you still have the trial version of the Power Print somewhere, you might be able to use it, maybe with P99SE SP1 or SP2. Igor -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Sent: Monday, 16 June 2003 4:56 AM To: [EMAIL PROTECTED] Subject: [PEDA] Direct printing of artwork My son wants to build a board to learn how it's done. We've got schematic and PCB files ready to roll. I've got some old Kepro-clad kits (pre-sensitized copperclad); now all we need is a way to get the artwork onto a negative. I've done it before using viewgraph transparencies, but don't now have a handy way to turn the printout into a negative. I recall doing it eons ago by using Postscript output to a file, then directly monkeying with the Postscript header to invert the colors. Does anybody have a more modern way to invert black and white? I can print to a PDF, but that doesn't seem helpful. Neither was anything I could find in tinkering with the colors within Protel. Surely somebody else out there has already done this? Thanks in advance for any help you can offer. Steve Hednrix * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 99SE ON WIN XP
Steve, in whatever M$ OS you choose, I have never had any problems with P99SE SP6, except the utopian SP7 issue. Igor -Original Message- From: Steve Smith [mailto:[EMAIL PROTECTED] Sent: Thursday, 12 June 2003 4:29 AM To: Protel EDA Forum Subject: [PEDA] 99SE ON WIN XP Hi, I have never have seen a definitive answer to this: Is anyone using 99SE SP6 on Win XP (Pro or Home)? Any problems, other than the usual bugs? Regards, Steve Smith Product Engineer Staco Energy Products Co. Web Site: www.stacoenergy.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] SORT ORDER IN LEFT PANE
Dennis, I have the same problem but no solution, unfortunately. Igor -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED] Sent: Thursday, 13 March 2003 9:42 AM To: Protel EDA Forum Subject: Re: [PEDA] SORT ORDER IN LEFT PANE SE99 SP6 i think this was kicked around before but couldn't find it in the the left explorer pane and when using DDB's the sch file names listed under the project top sheet are not in a nice order they seem to be sort of alpha sort except one which is newer i closed the DDB and expected it to re-sort but it didn't is there a trick? i vaguely remember one Dennis Saputelli Richard Sumner wrote: Thanks for the suggestions, now the resolution? *- look in the Windows folder for all the *99SE*.ini an dDFT and rcs files and see if any of these *(text) files affect things. You can safely move these files out of the windows folder and they will *be recreated with system defaults. You would loose any customizations, so back them up first and if *this fixes the issue, investigate to see what is different between the new (default) files and the old *ones. I removed all the 99se files in the winnt folder, to no avail. Protel wouldn't start up correctly without the .ini file. I wound up with all back as they were, no improvement. *Select-Outside and then draw the select box around your PCB. This should just select the wayward *components. Then move them. This didn't quite work. Protel simply would not select the components that were outside the box AND negative. After several starting and stopping of 99se, a few reboots, the problem simply went away. There was no obvious correlation with anything that I did. I did not reinstall 99se (sp6). But now 99se behaves normally. Other projects were OK, it seems to have been related to this particular ddb (windows file system, not the database). So I'll ascribe it to a weird interaction between protel and windows (2k, sp2) and go back to work!! thanks again, Richard - Original Message - From: Richard Sumner [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Friday, March 07, 2003 8:27 AM Subject: [PEDA] Unexpected component placement during pcb update Usually, when I add a few components to the schematic, and update the pcb, the components are placed in a horizontal row starting at the lower right corner of the board. Today, it (99se, sp6) started placing them in a vertical column, with negative 300 mil increment! My board origin (LL corner) is at 1,1, so only the first 3 are visible (and accessible). The rest are in negative Y land!! Selecting everything and moving up will make them all visible, but this seems to mess up polygon fills and split planes when I try to put it back. Yuk! Any suggestions? Does anyone know where the increment parameter is hidden? I'll eventually give up and reinstall everything, but I'd like to avoid that. Cheesecote Mountain CAMAC, 24 Halley Drive; Pomona, NY 10970 voice: 845 364 0211, fax: 845 362 6947, www.cmcamac.com -- Dennis Saputelli = send only plain text please! - no HTML == ___ Integrated Controls, Inc. www.integratedcontrolsinc.com 2851 21st Streettel: 415-647-0480 San Francisco, CA 94110 fax: 415-647-3003 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Does the DXF Export work???
Leonard, I just exported .DWG from schematic and imported it into Visio Technical 5.1. Exported as AutoCAD v13 drawing, metric. Imported as ISO, metric, A3. The drawing elemnts can't be ungrouped or edited, drawing can be resized, there are no problems with fonts, it's all one colour. Initially, circles show as octagons (or hexagons, not sure anymore). If you double click on the drawing and disable a 0 layer and then do it again but enable the 0 layer, circles show correctly. Beats me, but it works. In general, .DWG is preferable to .DXF. Hope you can use this. Regards, Igor -Original Message- From: Leonard Gabrielson [mailto:[EMAIL PROTECTED] Sent: Tuesday, 11 March 2003 1:38 PM To: [EMAIL PROTECTED] Subject: [PEDA] Does the DXF Export work??? Hi all, Has anybody had any luck exporting a 99SE schematic to DXF, and reading it with anything else? I've tried loading it into PaintShop Pro, and Corel 9 with no luck at all. Various error messages about doesn't appear to be a valid DXF format. Thanks, Len G --- Outgoing mail is certified Virus Free. Checked by AVG anti-virus system (http://www.grisoft.com). Version: 6.0.459 / Virus Database: 258 - Release Date: 2/25/03 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Hole Size Constraint
Alexandre, set the scope to check only the holes of certain size or certain net, not the whole board. Igor -Original Message- From: Alexandre Desnoyers [mailto:[EMAIL PROTECTED] Sent: Monday, 24 February 2003 9:50 AM To: [EMAIL PROTECTED] Subject: [PEDA] Hole Size Constraint I want to set some rules in the Hole Size Constraint to specify the drill bits available from APCircuit. I've set the following constraint : NameScopeMinMax Drill 42milBoard 42mil42mil Drill 28milBoard 28mil28mil Drill 35milBoard 35mil35mil When I run the DRC, I get the following rule violations: Processing Rule : Hole Size Constraint (Min=42mil) (Max=42mil) (On the board ) Violation Pad J1-25(49796mil,53700mil) MultiLayer Actual Hole Size = 35mil Violation Pad J1-24(49905mil,53700mil) MultiLayer Actual Hole Size = 35mil Violation Pad J1-23(50014mil,53700mil) MultiLayer Actual Hole Size = 35mil Violation Pad J1-22(50123mil,53700mil) MultiLayer Actual Hole Size = 35mil ... Violation Via (52895mil,51705mil) TopLayer to BottomLayer Actual Hole Size = 28mil Violation Via (53060mil,52280mil) TopLayer to BottomLayer Actual Hole Size = 28mil Violation Via (50621mil,53040mil) TopLayer to BottomLayer Actual Hole Size = 28mil Violation Via (50698mil,53040mil) TopLayer to BottomLayer Actual Hole Size = 28mil ... Processing Rule : Hole Size Constraint (Min=35mil) (Max=35mil) (On the board ) Rule Violations :0 Processing Rule : Hole Size Constraint (Min=28mil) (Max=28mil) (On the board ) Rule Violations :0 Depending on the order that I entered my constraint, Protel change the violation (ex : Violation on the 35mil hole size constraint for all holes set to 28mil). Could you tell me if this issue has already been addressed on the forum. If not, I would like to know if someone already did this and how. I know that I can use the Hole Size Editor to check this by hand, but I would like to be able to use the DRC to check that. Isn't the DRC job to check for manufacturing errors?? Thank you Alexandre Desnoyers Note : I'm using Protel99SE SP6 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Hole Size Constraint
Ian, you wrote: The first rule has the highest priority. Rules are tested against all objects. So your first rule will generate an error on all holes not equal to 42mil. It won't help that you have alternative rules following. I would say, that the rules are tested against all objects covered by the rule's scope. Create a rule that covers only the objects you want to test or excludes the objects you don't want to test. E.g. in this case, in the general rule with the scope 'board' (if there is such a rule) he should exclude the holes of the sizes he wants to check specifically, and create rules to check each of them individually. The problem is how to distinguish those hole sizes from the rest. They could belong to a net, a component, a class or something else. Regards, Igor * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Hole Size Constraint
Ian, let me try: Rule Name Scope MinMax All holes Board 28mil 280mil Drill 42mil Power Tracks (Net class)42mil 42mil Drill 35mil Signal Tracks (Net class) 35mil 35mil Drill 28mil Special Tracks (Region) 28mil28mil It is true that P99SE is limited in what you can do when defining a rule. Otherwise it would not be necessary to introduce a scripting language in the new version of Protel. There are always workarounds, and it is true that they won't cover all the cases. As long as the designer is aware of the limits and of special setup of his/her design, it can be done. The above example shows how I would do it. It differs a bit from suggestions in my initial post in that I included all drill holes in the general rule, otherwise the DRC would have found holes of smaller then permitted sizes. With a careful design this example can be implemented. If requirements are more general, then he will have to write a check for a version with a scripting language. Alexandre's question was not detailed, so wasn't my answer, but I hoped to give him an idea of how to set the rules up, so he could implement it to his own requirements. Hope this post is clearer then the previous ones. Regards, Igor -Original Message- From: Ian Wilson [mailto:[EMAIL PROTECTED] Sent: Monday, 24 February 2003 11:36 AM To: Protel EDA Forum Subject: Re: [PEDA] Hole Size Constraint At 10:55 AM 24/02/03 +1100, you wrote: Ian, you wrote: The first rule has the highest priority. Rules are tested against all objects. So your first rule will generate an error on all holes not equal to 42mil. It won't help that you have alternative rules following. I would say, that the rules are tested against all objects covered by the rule's scope. Create a rule that covers only the objects you want to test or excludes the objects you don't want to test. E.g. in this case, in the general rule with the scope 'board' (if there is such a rule) he should exclude the holes of the sizes he wants to check specifically, and create rules to check each of them individually. The problem is how to distinguish those hole sizes from the rest. They could belong to a net, a component, a class or something else. Igor, That is certainly true, and is a technique that is very useful in DXP (use the NOT function to exclude objects from a rule rather than including objects). The problem here, as you say, is constructing a sensible rule that is guaranteed to test correctly all holes. What if one net was not part of a class? Or what about free holes not connected to a net? What about nets with a mix of permitted holes? It is also made more complex as vias are not an object in the hole constraint scope list (neither is pad specification an allowable scope in the hole size rule). So you would have to use nets or net classes and then you have a problem ensuring full coverage, don't you. How would you frame a rule that checked that all holes on a board were either 28 or 35 mils. Interesting exercise. Should include free vias and pads, component pads, anything connected to nets and anything not connected to a net. A further restriction would be that if the net classes etc, or whatever, were used were not correctly maintained, that the system was failsafe and would not let through un-wanted hole size (in other words, if I forgot to maintain the class info correctly, I would not potentially allow an unwanted hole to get through the system - this may be best done by a whole board scope checking against one of the desired hole sizes (the most common presumably)). Lets try a simpler case. How would you check, reliably that for a given net, say VCC, that holes were either 28 or 35 mils and nothing else. Test this against a VCC net that has both 28 and 35 mil holes. I can't see a method of doing this in P99SE. P99SE does not have a ready method of selectively excluding things from a check. If something meets the scope (in net VCC, say) it will be tested against the rule. So a 35 mil hole will generate an error when tested against the VCC/28 mil rule, and visa versa. Now if we could exclude anything that had a hole size of 35 mils from the 28 mil test then we may be getting somewhere - but again P99SE does not allow a pad specification to be used in a hole constraint scope - and it does not allow a via hole size to be a valid scope and, anyway, it does not support not equal to operations on via and pad specifications even if these scopes were supported in the hole size constraint rule. I may be missing something but I can't see hole a rule set could be constructed to ensure reliable full coverage and to restrict holes to one of a number of possible sizes when on any given net any of these permitted holes is acceptable. The problem is not so hard if *all* vias/pads on any particular net
Re: [PEDA] Simulator
I beleive this is one of the parts built into the simulation SW, together with several other components, e.g. CAP and RES. You can access those by writing your subckt models. To do this you will have to dig into other parts, to see how it's done. E.g., try using SPDTRELAY instead of switch. You can change its RON parameter and you can switch it on your schematic as well, by applying voltage source to it (e.g. square). Hope this helps. Igor -Original Message- From: Andrew Welsh [mailto:[EMAIL PROTECTED]] Sent: Friday, 21 February 2003 8:33 AM To: [EMAIL PROTECTED] Cc: Dennis Gibson Subject: [PEDA] Simulator When using the generic switch part (SWITCH.LIB SW) the default on resistance (RON) is 1 Ohm. According to the Protel Help, the parameter RON is adjusted by RON=X. OK, but where does one enter this? I have tried the statement in the Part Field but it is ignoring me (RON always stays at 1 Ohm). Andrew * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Buses
Peter, to answer your question from below, there is a way to do it. In a top level schematic place a sheet symbol. On the sheet symbol place a bidirectional port (e.g. 12V). Connect a wire to that port and connet it to your 12V rail. On a sub-circuit place a bidirectional port of the same name (12V). Connect that port to your 12V rail on the sub-sheet. The two become the same net. Regards, Igor -Original Message- From: Peter W. Richards [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 11 February 2003 9:25 AM To: Abd ul-Rahman Lomax Cc: Protel EDA Forum Subject: Re: [PEDA] Buses On a related Protel-sabotaging-design-reuse note, is there a way to create a sub-module and connect one of its inputs to power or ground, without getting ERC errors that claim I've shorted two nets (for example GND vs. the net name inside the subsheet?) -- Peter W. Richards / [EMAIL PROTECTED] Design Manager, EE ph +1 (408) 737 8100 x113 fx +1 (408) 737 8153 350 Potrero Av Sunnyvale, CA 94085 This email message (and any attached document) contains information from Reflectivity, Inc. which may be considered confidential by Reflectivity, or which may be privileged or otherwise exempt from disclosure under law, and is for the sole use of the individual or entity to whom it is addressed. Any other dissemination, distribution or copying of this message is strictly prohibited. If you receive this message in error, please notify me and destroy the attached message (and all attached documents) immediately. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Complex hierarchy?
Peter, in Tools-Annotate you can define how to annotate your schematic sheets. Choose to annotate the whole project and in Advanced Options dialog set the suffixes for each individual schematic sheet. That will enable you to differentiate between part naming on individual channels in your design. Regards, Igor -Original Message- From: Peter W. Richards [mailto:[EMAIL PROTECTED]] Sent: Saturday, 1 February 2003 11:07 AM To: Protel EDA Forum Subject: [PEDA] Complex hierarchy? I'm working on a design that will have many (like 32) copies of a single subcircuit. I'm trying to use Protel99SE's 'complex hierarchy' to implement this. I've created one sub-sheet for the subcircuit (call it amp.sch) that will be replicated. In the toplevel sheet (say top.sch) I've created several sheet symbols that all refer to the sub-sheet amp.sch. When I netlist I get only one instance of amp.sch, and the various inputs/outputs to the different instances of amp.sch all get shorted together. Not what I want. According to the online help, the command 'Tools/Complex to Simple' is supposed to flatten the design, duplicating subsheets as necessary so that each subsheet is referenced once--so then you can netlist/annotate correctly. Problem is when I select 'Complex to Simple', nothing at all happens. Any ideas? Should I even be trying complex hierarchy at all? Or is it one of those things that look good on paper but don't work so well in real life? -- Peter W. Richards / [EMAIL PROTECTED] Design Manager, EE ph +1 (408) 737 8100 x113 fx +1 (408) 737 8153 350 Potrero Av Sunnyvale, CA 94085 This email message (and any attached document) contains information from Reflectivity, Inc. which may be considered confidential by Reflectivity, or which may be privileged or otherwise exempt from disclosure under law, and is for the sole use of the individual or entity to whom it is addressed. Any other dissemination, distribution or copying of this message is strictly prohibited. If you receive this message in error, please notify me and destroy the attached message (and all attached documents) immediately. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Complex hierarchy?
Peter, I should have read your post with more attention. It sometimes works, but I don't have time to find out what it is that makes it work. Usually, I make copies of the channels manually and then annotate. There is another problem with complex hierarchy, and it is that once you execute 'Complex to Simple' you can't go back to complex. Any further changes you make will have to be done manually in individual files, unless you saved a copy of the complex design somewhere else. Hope this is more to the point. Regards, Igor -Original Message- From: Peter W. Richards [mailto:[EMAIL PROTECTED]] Sent: Saturday, 1 February 2003 11:07 AM To: Protel EDA Forum Subject: [PEDA] Complex hierarchy? I'm working on a design that will have many (like 32) copies of a single subcircuit. I'm trying to use Protel99SE's 'complex hierarchy' to implement this. I've created one sub-sheet for the subcircuit (call it amp.sch) that will be replicated. In the toplevel sheet (say top.sch) I've created several sheet symbols that all refer to the sub-sheet amp.sch. When I netlist I get only one instance of amp.sch, and the various inputs/outputs to the different instances of amp.sch all get shorted together. Not what I want. According to the online help, the command 'Tools/Complex to Simple' is supposed to flatten the design, duplicating subsheets as necessary so that each subsheet is referenced once--so then you can netlist/annotate correctly. Problem is when I select 'Complex to Simple', nothing at all happens. Any ideas? Should I even be trying complex hierarchy at all? Or is it one of those things that look good on paper but don't work so well in real life? -- Peter W. Richards / [EMAIL PROTECTED] Design Manager, EE ph +1 (408) 737 8100 x113 fx +1 (408) 737 8153 350 Potrero Av Sunnyvale, CA 94085 This email message (and any attached document) contains information from Reflectivity, Inc. which may be considered confidential by Reflectivity, or which may be privileged or otherwise exempt from disclosure under law, and is for the sole use of the individual or entity to whom it is addressed. Any other dissemination, distribution or copying of this message is strictly prohibited. If you receive this message in error, please notify me and destroy the attached message (and all attached documents) immediately. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Default Pointer
John, File sharing feature works fine accross network and shared drives. If two users with the same access privileges try to open the same file, the second user will be denied access. The same second user can access other files in the same .ddb if they are not accessed by the first user. The admin user can always access files and override the others' work. Regards, Igor -Original Message- From: John M. Cardone [mailto:[EMAIL PROTECTED]] Sent: Friday, 6 December 2002 3:51 AM To: Protel EDA Forum Subject: Re: [PEDA] Default Pointer Mike, Most, if not all windows programs remember (in the system registry) the last directory used by that program. But you can set your My Documents folder to a specific location such as a mapped drive. Keep in mind that if working collaboratively that all windows programs do not create lock files (i.e. this is a poor mans PDM system). You could have a situation where two or more folks are overwriting each others work. Does anyone know how the design team feature (with it's members, permissions and sessions) works with a drive shared in this way? Or if the *.ldb file created when a design is opened would lock out all others? John [EMAIL PROTECTED] wrote: Great question for the open web, though it seems somewhat ambiguous to me. Try www.deja.com (now www.google.com) -Original Message- From: Mike Reagan [mailto:[EMAIL PROTECTED]] Hi All, Does anyone out there know how I can set all my windows programs, Client 99 included to point to another drive by default. Would like to know how this is done both in Win 98 and XP. Thanks in advance John M. Cardone Electro-Mechanical Dsgn. Engr. Grp. M/S 278-100 Mechanical Engineering Section, 352 4800 Oak Grove Dr.NASA / Jet Propulsion Laboratory Pasadena, Ca 91109MailTo:[EMAIL PROTECTED] Tel: 818.354.5407 Fax: 818.393.6400 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Unable to Initialize
Dave, may sound trivial, but check your licence setting and make sure the autorouter is enabled. Regards Igor -Original Message- From: Sanders, Dave [mailto:[EMAIL PROTECTED]] Sent: Friday, 6 December 2002 1:43 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] Unable to Initialize Thanks to all who replied to this thread. All the suggestions were tried, but still no joy. Have now bit the bullet and started again. (Why on earth couldn't the software designers be a little more informative than a cryptic Unable to Initialize?? ) Big Sigh ! Cheers. Dave Sanders -Original Message- From: DUTTON Phil [mailto:[EMAIL PROTECTED]] Sent: Thursday, December 05, 2002 5:38 PM To: Protel EDA Forum Subject: Re: [PEDA] Unable to Initialize Hello Dave, Things that you may have tried. -repair the database -in the explorer panel under documents, delete the .cfg file (don't ask, but this has worked with other problems) -create a new database and copy your design elements into it. -ensure that no valid footprints intersect or are outside of the keepout. If there's no IP problems, zip up the .ddb and email it to me offline. I can have a quick look - think of it as customer relations. Phil. -Original Message- From: Sanders, Dave [mailto:[EMAIL PROTECTED]] Sent: Thursday, 5 December 2002 3:24 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] Unable to Initialize Hi Phil, still kicking I see. Thanks for the reply! Hugh Stevenson and Dennis Saputelli too, thanks. I wish it was the keep-out layer problem. I've had that problem in the past so that was the first thing that occurred to me, but no such luck. I've tried everything I can think of. I may need to start the pcb layout again. Dave Sanders -Original Message- From: DUTTON Phil [mailto:[EMAIL PROTECTED]] Sent: Thursday, December 05, 2002 12:14 PM To: Protel EDA Forum Subject: Re: [PEDA] Unable to Initialize Hello Dave, I usually don't use the autorouter, but have seen this occur when the keepout layer is not correctly defined. More of a keep-in approach with an outline on the 'keepout' layer defining the area in which the autorouter can work. I think that arcs and gaps can be a problem. regards, Phil. -Original Message- From: Sanders, Dave [mailto:[EMAIL PROTECTED]] Sent: Thursday, 5 December 2002 11:38 AM To: 'Protel EDA Forum' Subject: [PEDA] Unable to Initialize Has anyone out there ever experienced the wonderfully informative message Unable to Initialize when trying to autoroute. I really need some hints on what can cause this error. The Protel knowledge base comes up with nothing. I am running 99SE SP6 on a Win NT4 machine, designing a 6 layer board (4 sig. 2 pwr.), not particularly dense. Dave Sanders * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 10 best options I want
Brad, we do linking in a different way, using footprint and other info to extract the part's stock code from the database. That is then used to create BOM. You are doing it the other way around, to manage your design. As for the Bob's long winded explanation, it has more points then the initial post. As a design rule, we don't update SCH from PCB, so can't comment on that. On the other hand, if you update PCB from SCH or reload the netlist and tick 'Update footprints', your footprints will be updated with the latest info from the PCB library. I did that couple of weeks ago, after the major changes in our PCB library and it works. Hope Bob does not break his keyboard now ;-) Regards, Igor -Original Message- From: Brad Velander [mailto:[EMAIL PROTECTED]] Sent: Thursday, 5 December 2002 4:39 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] 10 best options I want Igor, what I meant by being linked is that we link our schematics to our company MRP database. Through the linking we set the schematic symbols value, tolerance, working voltage and footprint(land pattern). After linking, linking will only stuff data into the partfields, we run one of Geoff Harland's servers to stuff the footprint(land pattern) into the schematic's footprint field from the partfield it was linked to. Therefore we do not have to manually set the footprint/landpattern, we are not limited to the dropdown list or manually typing the footprint field information. The second benefit is that we don't have stupid footprint mismatches usually accompanying manual entry/selection of footprints. Having never worked as a service bureau myself, my understanding of some of Bob's issues was lagging. Thanks to his long winded explanation, I can now appreciate the issue that he was raising. I am not sure if your work is similarly effected but this would seem to be an issue largely divided amongst service bureaus and captive shops. I am not sure that a single operation/function would ever satisfy the desires of both camps. I do concur that the limitation of 4 footprints in a Protel schematic symbol is too limiting. A figure of at least 10 would be more reasonable and even a limitless number would not be unreasonable for the manner in which some people desire to work. With the linking function, I am satisfied with one footprint but only because we link the footprint information into the schematic from an outside source. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com Check out our fall promotion at www.norsat.com. Limited quantities. Sale ends December 24, 2002. Contact your Account Manager or call 1-800-NII-4LNB or email [EMAIL PROTECTED] -Original Message- From: Igor Gmitrovic [mailto:[EMAIL PROTECTED]] Sent: Tuesday, December 03, 2002 5:28 PM To: Protel EDA Forum Subject: Re: [PEDA] 10 best options I want Brad, SNIP When you say you are linked, what exactly do you mean? Hope you have a good one, too. Regards, Igor Gmitrovic RD Engineer HPM Industries Pty Ltd Ph: ++ 61 2 9207 9550 Fax: ++ 61 2 9207 9554 Email: [EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 10 best options I want
Brad, Mike my understanding of the question is that there are more than four footprints that could be used for a component. Let's say a capacitor. There are four footprint fields in the sch component library and there couldb be 53 different footprints one uses for capacitors. There is obviously not enough space for all of them to be defined in the sch library component. Let's say a cap is associated with one of the footprints apart from those four and the sch component is changed in a library and then you update component from the library, what happens? In my system, the footprint info is preserved, which is what I prefer. If I want to change the footprint info then the component's footprint field in the sch will produce an updated list, according to updated library component, to choose from. I would not like to have to change manually all the different capacitors if the library component was changed. This is valid for generic components, such as cap. The story is different if you have a sch library component for every capacitor you use. It might be of some benefit if your updated sch library footprint fields are reflected in the schematic. For me this still would not be a good idea. I could use a reflow component on the top and a wave footprint on the bottom and once that is set, all changes required I would do manually, rather then having update function mess up with my board. Then again, if the 'update from library' function is modified, so you have control over what is updated in the schematic, e.g. only selected components are updated, it could be useful, especially on large boards. It all comes down to having a choice to do what you think is appropriate. In my opinion, what P99SE does is not a bug. It does what it is supposed to do and I am quite happy with what it does. That we might want something else or more is not sufficient to call it a bug. Regards, Igor -Original Message- From: Brad Velander [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 4 December 2002 8:41 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] 10 best options I want Mike, I am not sure that your explanation is the same as the problem I thought was being described. I couldn't follow your example completely because you didn't state which footprint was the active/current footprint after you did the update. Sounds like you thought it was a bug just listing the two footprints. This also similarly goes back to the sticky symbol issues recently discussed on the DXP list. Sticky or non-sticky, differing opinions existed. The problem that I thought was described as occurring when updating PCB. Just went back and re-read Bob's original message and realize that I was confused by his mention of footprint and leave it on the board. I know for my own opinion, if I update symbols from the library I expect to have brand new virgin symbol in my schematic. No remnants from the previous iteration. Sounds like your description says we get a hodgepodge, I will have to try it out this afternoon. Thanks. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com Check out our fall promotion at www.norsat.com. Limited quantities. Sale ends December 24, 2002. Contact your Account Manager or call 1-800-NII-4LNB or email [EMAIL PROTECTED] -Original Message- From: Mike Reagan [mailto:[EMAIL PROTECTED]] Sent: Tuesday, December 03, 2002 1:03 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] 10 best options I want Importance: High Brad, Start out with a shematic you already finished. lets say the schematic, had an SN74LS04 with one footprint assigned to in a LS schematic lib. The footprint for this part was named SOIC14. Now change SOIC14 to something like SOIC-14, update the schematic from the lib. ( or globally change SOIC14 to SOIC-14 in schematic) . When you look at the footprints for this part on the schematic, now it will still have the old SOIC14 along with SOIC-14 as a second choice. I didnt follow schematic bugs before, I am sure this had been reported long ago. sounds like it might be fixed, this was really important for us Mike Reagan EDSI * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 10 best options I want
Brad, reading your answer to Bob it seemed to me we had close views on several points. To answer the question: Why did you need to do the update at this time if you didn't want to see any change? The changes in sch libarary components we do are mostly to manage the schematics themselves, like graphical symbol, pinout, etc, to make schematics more readable. Footprints are not expected to be managed in this manner. As said in my previous post, one can have a default footprint for a component. That footprint does not necessarily have to be used in every case. We often find that the four default footprints is somewhat limiting number in the design automation process. To manage the footprint assignments through the schematic library in P99SE would be of little benefit in my opinion. Although, I understand what you are talking about, and that would be mostly applicable to components with only one default footprint assigned. So if you update such a component you might expect the footprint info to be updated as well. We don't have many of those, but we all have our individual techniques and others may do it in a different way. When you say you are linked, what exactly do you mean? Hope you have a good one, too. Regards, Igor Gmitrovic RD Engineer HPM Industries Pty Ltd Ph: ++ 61 2 9207 9550 Fax: ++ 61 2 9207 9554 Email: [EMAIL PROTECTED] -Original Message- From: Brad Velander [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 4 December 2002 11:24 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] 10 best options I want Igor, I guess that you have seen Bob's detailed explanation of his issue. Not what I expected nor what it seems you would have expected either. As for your comments below I can understand your view, it doesn't match with mine because my question would be: If you updated the symbol from the library, what change would you expect? You would state, Nothing to the existing design, possible options in the footprint list. I would ask Why did you need to do the update at this time if you didn't want to see any change? Thus if I update from the library, I want a new virgin symbol or part. I don't want some kludge of the old and the new that can get too messy. Then again, I don't drive my symbol details manually, I'm linked. Have a good one Igor. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com Check out our fall promotion at www.norsat.com. Limited quantities. Sale ends December 24, 2002. Contact your Account Manager or call 1-800-NII-4LNB or email [EMAIL PROTECTED] -Original Message- From: Igor Gmitrovic [mailto:[EMAIL PROTECTED]] Sent: Tuesday, December 03, 2002 2:57 PM To: Protel EDA Forum Subject: Re: [PEDA] 10 best options I want Brad, Mike SNIP Let's say a cap is associated with one of the footprints apart from those four and the sch component is changed in a library and then you update component from the library, what happens? In my system, the footprint info is preserved, which is what I prefer. If I want to change the footprint info then the component's footprint field in the sch will produce an updated list, according to updated library component, to choose from. I would not like to have to change manually all the different capacitors if the library component was changed. SNIP Regards, Igor * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Simple (?) Pasting Problem
Terry, you might have some hidden objects in your components. That would explain why Protel takes time to process it. Or your component may be corrupted in some other way. Try to select all the visible objects in the component and then copy-paste to a new component. Then check if it still does the same. Igor -Original Message- From: Terry Creer [mailto:[EMAIL PROTECTED]] Sent: Thursday, 28 November 2002 12:40 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] Simple (?) Pasting Problem In addition - Upon further investigation, it appears that it only happens on certain library components. I tried it on a testpoint of ours - crash. I then tried it on a resistor (also from our own library) - it works... *sob* ;) -Original Message- From: Terry Creer Sent: Thursday, 28 November 2002 12:05 PM To: Protel EDA Forum (E-mail) Subject: [PEDA] Simple (?) Pasting Problem AAGHH!!! All of a sudden, I've discovered that if I select a single component and then either Cut or Copy it, and then paste it (or paste an array of them), Protel (99SE sp6) locks up completely and the status bar just says 'processing pasted primitives'. This is not repeatable on the other PCB designer's computer (he is running WinXP instead of 2k). It does not do it if I have more than one component selected, or if the selection is just primitives. I am running Win2k on a P4 1.6GHz with 256Mb. Has anyone ever come across this before? Any suggestions? Am I up for a re-install?\ Thanks in advance... Terry Creer Electronic Design Technician Clipsal Integrated Systems Pty. Ltd. Phone: (08) 8269 0560 Fax: (08) 8346 0380 Email: [EMAIL PROTECTED] Disclaimer: The information contained in this email is intended only for the use of the person(s) to whom it is addressed and may be confidential or contain legally privileged information. If you are not the intended recipient you are hereby notified that any perusal, use, distribution, copying or disclosure is strictly prohibited. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] What else is under the hood
Mike, at least you would let us know about it and save us some frustration. Igor -Original Message- From: Mike Reagan [mailto:[EMAIL PROTECTED]] Sent: Friday, 22 November 2002 1:07 PM To: Protel EDA Forum Subject: Re: [PEDA] What else is under the hood Dennis, This program sometimes is amazing, some of us like you have been using it for years. It doesn't surprise me that you would find another hidden feature. Today I think I found a hidden bug but what is the use of reporting it if the program is obsolete ? Mike - Original Message - From: Dennis Saputelli [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Thursday, November 21, 2002 8:22 PM Subject: Re: [PEDA] position dialog i was proteling (PCB) and flailing away at the keyboard i looked up to see a dialog i had never seen before! i don't know the key sequence was anymore it was a kind of cool looking _graphical representation_ of the the autopositioning options for the designator and comment ok, it's only slightly cool looking i couldn't recreate the keys or find it on a menu but the process may be invoked by: PCB:AutopositionComponentTexts when called without parameters it appears to operate on selected objects i know this capability is in the drop lists of the edit comp dialogs, but i never saw this window before wiring it to hot key looks faster and friendlier than the other method have i missed it somewhere? wonder what else is in there under the hood? Dennis Saputelli -- ___ www.integratedcontrolsinc.comIntegrated Controls, Inc. tel: 415-647-04802851 21st Street fax: 415-647-3003San Francisco, CA 94110 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Assembly Drawing generated from Protel99SE
Michael,
we use both overlays and several mechanical layers to compile the assembly
information. We assign different mechanical layers for Designators and Comments, as
well as other information, such as dimensions, panellisation and glue stencil pads.
And we use the Protel PCBPrint to print out all our assembly drawings. We find that
the Protel dimensioning using metric system and three decimal points provides
sufficient accuracy. We also find mirroring in PCBPrint sufficient for all our needs.
We create both PDFs and paper printouts.
Regards,
Igor
-Original Message-
From: Michael Biggs [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, 20 November 2002 4:09 AM
To: 'Protel EDA Forum'
Subject: [PEDA] Assembly Drawing generated from Protel99SE
I have a question about how to handle Assembly Drawing plots.
Does everyone use the Protel package with assembly drawing instructions on
mechanical layers for submitting?...
..Or paste the board into another .PCB file with assembly instruction
template and print size to fit page for the manf
..Or export a DXF and import into another software package with a Assembly
Drawing template ready for editing before submitting?
Also, I can generate PDF, SolidWorks, or Autocad files for the assembly
manufactures to receive. I am just curious what is the most popular among
you guys that actually use Protel and generate the files.
It seems easy for me to add the assembly instructions on the Mechanical
layers and print to a PDF format, but it sometimes can be too big for the
11x17 paper size and may even distort the film size when creating Gerber
data.
Any help or replies are appreciated,
Michael J B
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Re: [PEDA] Pick Place Data
Hi Steve, yes the protel PP file is usable. We use spreadsheet metric format, so it's easier to edit the file in Excel. Our origin is set onto one of the fiducial marks. The way you set the origin is defined by your PP machine and the way you panellise the board. There was some discussion recently about turning the board over, to do PP for the bottom layer. There are other techniques to do the same, as well. Hope this helps Igor -Original Message- From: [EMAIL PROTECTED] [mailto:HxEngr;aol.com] Sent: Friday, 8 November 2002 7:48 AM To: Protel EDA Forum Subject: [PEDA] Pick Place Data I just got a call from a client who is having issues with an assembly house over the pick place file generated by Protel. There has been discussion on this board in the past, but I can't find the thread in the archives. Are there IPC standards for the pick place file? Is the Protel-generated file usable? I know there's an issue with where the origin is defined in the library part (centroid, pin 1, other). Steve Hendrix * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:proteledaforum;techservinc.com * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:ForumAdministrator;TechServInc.com * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum;techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] polygon fill
Interesting, a friend of mine working for another company reported the same problem today. The polygon Plane parameters were setup correctly. We tried to play with the DRC rules. It was the only polygon on the board. Nothing could be done. Any ideas? Igor -Original Message- From: Brian Sherer [mailto:foothill;foothillpcb.com] Sent: Sunday, 3 November 2002 3:55 AM To: Protel EDA Forum Subject: Re: [PEDA] polygon fill Chris- I had second thoughts. You may not be copying, but creating a polygon on a board having an existing polygon. Protel gets confused if you create a polygon which lies within or overlaps another polygon (with a different net name) on the same layer. See Protel's Help topics. A Split Plane must be used in this case. In brief, the added Polygon is made using the Place Split Plane option; the polygons may NOT overlap, and an inner polygon must NOT be fully enclosed by the outer polygon. To created space for the inner polygon, the outer polygon may be edited to break its outline and move the resulting vertices, to create a hole in the outer polygon. Then you place the inner polygon in the hole. Hope this helps. Brian At 06:09 PM 11/2/02 +0200, you wrote: Hi all, I am using Protel 99SE and cannot figure out why when I drop a polygon plane, which I choose to be GND it drops the plane over all the pads and tracks in the area. I have my netlist correct, I think I have set the polygon plane right by setting not to remove dead copper. I still cannot get it working properly. If I click on any of the tracks around there each one has it's separate net name so why should the polygon cover them. Regards Chris * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:proteledaforum;techservinc.com * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:ForumAdministrator;TechServInc.com * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum;techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP
In my opinion you contradict yourself. The important thing here is that the known behaviour from the old versions of Protel is propagated to the DXP in one way or the other. Igor -Original Message- From: Tony Karavidas [mailto:tony;encoreelectronics.com] Sent: Friday, 18 October 2002 3:27 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP What was REPORTED was something was created in DXP, someone else edited in an 'older' version, and when it was brought back into DXP, the pads were missing. My logic is sound. IF the problem is a bug in an old version of Protel, then there is nothing a new version can fix. It's not the old format that is flawed, it's old data that is getting corrupted. I don't see what difficult to understand. Tony -Original Message- From: Igor Gmitrovic [mailto:igmitrovic;hpm.com.au] Sent: Thursday, October 17, 2002 7:30 PM To: Protel EDA Forum Subject: Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP Tony, can't understand your logic. This probelm still manifests itself in the DXP, after all the versions that have been released from DOS onwards. Apparently, nothing has been done to deal with it and it is still evident, as just reported by Brian. If the old file formats were flawed they could have certainly done something to overcome that when importing into a new version of Protel. Igor -Original Message- From: Tony Karavidas [mailto:tony;encoreelectronics.com] Sent: Friday, 18 October 2002 11:34 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP Well if the problems is with a version earlier than DXP, then maybe the problem is not still there. Maybe it's still with the older versions. It seems like it would be pretty easy to find, once someone notices it. -Original Message- From: Igor Gmitrovic [mailto:igmitrovic;hpm.com.au] Sent: Thursday, October 17, 2002 5:44 PM To: Protel EDA Forum Subject: Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP Brian, so it is still there. I have seen it in P3, P98 and P99 when importing files from previous versions of Protel into the latest version. DOS version files were the most probable to result in zero size pads. Igor -Original Message- From: Brian Watson [mailto:brian;desktop-eda.com.au] Sent: Friday, 18 October 2002 10:32 AM To: Protel EDA Forum Subject: [PEDA] Pads disappearing - DXP - Earlier Version - DXP Greetings, A colleague had this experience: Created some components in DXP then sent the PCB document to a third party using an earlier version (don't know which) and then returned the document to DXP - the components he built in DXP had the pad sizes set to zero in x and y - ie they were still there but you could not see them. Anyone had any experiences like this? regards Brian Desktop EDA http://www.desktop-eda.com.au Suite 26 2 Park Drive Bundoora Vic 3083 Australia ph +61 3 9455 2289 fax +61 3 9479 1675 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:proteledaforum;techservinc.com * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:ForumAdministrator;TechServInc.com * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum;techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP
Brian, so it is still there. I have seen it in P3, P98 and P99 when importing files from previous versions of Protel into the latest version. DOS version files were the most probable to result in zero size pads. Igor -Original Message- From: Brian Watson [mailto:brian;desktop-eda.com.au] Sent: Friday, 18 October 2002 10:32 AM To: Protel EDA Forum Subject: [PEDA] Pads disappearing - DXP - Earlier Version - DXP Greetings, A colleague had this experience: Created some components in DXP then sent the PCB document to a third party using an earlier version (don't know which) and then returned the document to DXP - the components he built in DXP had the pad sizes set to zero in x and y - ie they were still there but you could not see them. Anyone had any experiences like this? regards Brian Desktop EDA http://www.desktop-eda.com.au Suite 26 2 Park Drive Bundoora Vic 3083 Australia ph +61 3 9455 2289 fax +61 3 9479 1675 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:proteledaforum;techservinc.com * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:ForumAdministrator;TechServInc.com * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum;techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP
Tony, can't understand your logic. This probelm still manifests itself in the DXP, after all the versions that have been released from DOS onwards. Apparently, nothing has been done to deal with it and it is still evident, as just reported by Brian. If the old file formats were flawed they could have certainly done something to overcome that when importing into a new version of Protel. Igor -Original Message- From: Tony Karavidas [mailto:tony;encoreelectronics.com] Sent: Friday, 18 October 2002 11:34 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP Well if the problems is with a version earlier than DXP, then maybe the problem is not still there. Maybe it's still with the older versions. It seems like it would be pretty easy to find, once someone notices it. -Original Message- From: Igor Gmitrovic [mailto:igmitrovic;hpm.com.au] Sent: Thursday, October 17, 2002 5:44 PM To: Protel EDA Forum Subject: Re: [PEDA] Pads disappearing - DXP - Earlier Version - DXP Brian, so it is still there. I have seen it in P3, P98 and P99 when importing files from previous versions of Protel into the latest version. DOS version files were the most probable to result in zero size pads. Igor -Original Message- From: Brian Watson [mailto:brian;desktop-eda.com.au] Sent: Friday, 18 October 2002 10:32 AM To: Protel EDA Forum Subject: [PEDA] Pads disappearing - DXP - Earlier Version - DXP Greetings, A colleague had this experience: Created some components in DXP then sent the PCB document to a third party using an earlier version (don't know which) and then returned the document to DXP - the components he built in DXP had the pad sizes set to zero in x and y - ie they were still there but you could not see them. Anyone had any experiences like this? regards Brian Desktop EDA http://www.desktop-eda.com.au Suite 26 2 Park Drive Bundoora Vic 3083 Australia ph +61 3 9455 2289 fax +61 3 9479 1675 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:proteledaforum;techservinc.com * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:ForumAdministrator;TechServInc.com * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum;techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Altium....Are you guys crazy!!!
The odds seem to be zillion (of us) to one (Altium). The problem with gambling is that the rules are set by the guy who deals the cards. That also means the rules can be changed at any time. Igor -Original Message- From: Dennis Saputelli [mailto:dsicon;integratedcontrolsinc.com] Sent: Thursday, 17 October 2002 11:09 AM To: Protel EDA Forum Subject: Re: [PEDA] AltiumAre you guys crazy!!! All of DXP and the reasons for it's development are baffling to me. I refuse to use it. They throw away a good program, push out a pc of junk which is initially entirely non-functional, and then pump us (for free) for details on how it should work. what is the current las vegas betting line on SP7 for 99SE ? Dennis Saputelli Rob Young wrote: Altium, please explain the logic in no longer providing a quantity column in BOM outputs or allowing more than one designator per line. What could have possibly possessed you guys to remove the quantity column in DXP's BOM formats! I am 99% convinced that a quantity option is not in DXP as I have posted this to several forums and in direct emails to Altium with no reply from them. So I must now assume that there is no way to derive a quantity of a particular component in DXP! You can't possibly expect someone to count line by line to find out how many 0.1uF caps are on a board with over 1500 components not to mention how many pages the BOM will span with one designator per line. While not perfect as Don has suggested, the Protel Format in P99SE was workable. With a few more tweaks on Altium's part, it could have been a very good BOM output, but now you guys have removed it all together! Please consider putting the Protel Format BOM or something similar back into DXP. I personally can't seem to work with the current BOM outputs in DXP with their unweildly number of pages. I seriously would have thought that more users would have complained about this, so perhaps I am just being nitpicky, but it just seems like such a basic operation for a BOM output. This is one of the few remaining hurdles left for me in using DXP for an actual project. I'm sure I could resort to using an Excel VB script such as Don has suggested, but while not perfect, the Protel Format has always suited my purposes just fine. Rob - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Wednesday, October 16, 2002 6:32 PM Subject: Re: [PEDA] Quantity Column in DXP's BOM output Please do!! :) -Original Message- From: Don Mayfield [mailto:djm;aaoepp.aao.GOV.AU] Sent: Wednesday, October 16, 2002 3:04 PM To: Protel EDA Forum Subject: Re: [PEDA] Quantity Column in DXP's BOM output Hi Rob, Yes it is a nuisance that we cannot get a breakdown of component quantities, even the Protel format is not always perfect. So, we here use an Excel VB script I wrote to process the BOM, in fact it can select multiple xls files, add a quantity, select fields to match by and select fields to output to a final project BOM. Its fairly basic but seems to work. I could make this available if no other soultion is found. Cheers, Rob Young wrote: I would like to make an attempt to use DXP on some real work despite some of the show stoppers I have listed on the various forums and sent to Altium, however there is one item that I have not been able to resolve yet that is very important in my relationship with assembly houses. That would getting the BOM to list a quantity used for each part value like in P99SE's Protel Format. I would very much appreciate it if anyone could help me find this feature in DXP or if it doesn't exist, maybe Altium would like to comment that this is planned for a future service pack. Rob -- Don Mayfield Anglo-Australian Observatory 167 Vimiera Rd Eastwood NSW 2122 Australia Ph. 61-2-9372-4836 Fax. 61-2-9372-4880 -- ___ www.integratedcontrolsinc.comIntegrated Controls, Inc. tel: 415-647-04802851 21st Street fax: 415-647-3003San Francisco, CA 94110 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:proteledaforum;techservinc.com * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:ForumAdministrator;TechServInc.com * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum;techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Protel99se and win2k fun
JaMi, there it is, the root of your problems. You have only 128MB of RAM. Upgrade that and you will have Protel running happily and will save yourself a lot of frustration. And don't forget to install a video card with at least 16MB RAM. They don't even make them with less than 32MB today. Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Thursday, 17 October 2002 3:45 AM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] Protel99se and win2k fun Julian, Long ago and far away, in a parallel universe, I had occasion to contact Protel Tech Support on the issue of what I should be looking for in a graphics card when I upgraded to a 2.2 GHz P4, and was told: Protel does not use any of the 3D stuff that is out there (which is pretty much game stuff anyway), and does all of its own 3D, as well as everything else, in 2D, and hence any hardware 3D is really useless for Protel, and may in fact cause problems (however this may no longer be true for DXP). I was also told that I should have my Hardware Acceleration set back from Full to about half way to two thirds, since some of the more advanced hardware acceleration features can actually cause problems with Protel, and if I remember correctly, this may have been especially true of the ATI cards, however I was using an Nvidea GF2 at the time, but I think that that was supposed to be applicable to the ATI cards as well. This may or may not be valid data, but it should be worth a try, and may be a partial solution and keep your system from crashing until you get a new machine. Possibly others can comment on this point. On the issue of the size of the database and problems with the database itself, here a few observations that may be relevant and may be helpful until you get more computing power: I am assuming first of all that you are using the access database format, and that if so, that you have emptied your recycle bin, and do not have any extra drawings or other unnecessary things within the database, and also that you have compact on. I have found that one of the major killers for me in terms of slowing a system down or causing crashes are large Polygon Planes, especially when they have to form around a lot of other circuitry and have very high resolution, and these things tend to bring Protel to it's knees, and even crash it. If you have large Polygon Planes in the design, you might try adjusting their parameters, or deleting them altogether for now and re-adding them back in at the very end of the design. Another problem that appears to be related to Polygon Planes, but I am sure is not necessarily limited to them, since I am sure that this may occur with any large or complex database, is a problem I have recently encountered with Print Preview. I have found that with large Polygon Planes that a Print Preview can appear to hang up, and even actually get lost and go south and never return. This is especially frustrating when there is an existing Print Preview that is open when the database opens because it will attempt to redraw everything right there before the rest of the database gets opened up, and can cause things to crash or appear to crash, when opening the database. I say appear to hang up and appear to crash here because on numerous occasions when Protel appeared to be lost in space I would check the Task Manager and find it saying that Client99se is Not Responding, and assuming it to be dead, force it to End Now. However, on one occasion I did note force it to End Now and simply closed the Task Manager and walked away for a while, only to come back and find that Protel had in fact returned from vacation and had actually finished the redraw of the Print Preview, and was ready to go, which was really really bizarre. I bring this up simply because I have thus found out with my system, which is also running only 128 MB of RAM, that some things take a really really really long time, like 10 or more minutes long, and that just because the Task Manager says the program is out to lunch, that doesn't necessarily mean that it won't come back after lunch. With Protel, you have to be ready to accept anything. The next time it appears to be hung up, take a long long long break and see if it actually may come back to life. One final note, if you are using a wheel mouse with MS Intellimouse software, make sure you go to the MS website and have the latest version. Good luck on surviving until the hardware upgrade. JaMi Smith - Original Message - From: Julian Higginson [EMAIL PROTECTED] To: [EMAIL PROTECTED] Sent: Tuesday, October 15, 2002 6:31 PM Subject: [PEDA] Protel99se and win2k fun Hey all, I just subscribed, looking for a bit of help if possible I have just started a new job, and I'm taking over an existing design in protel99. Now I'm very familiar with protel, however I'm getting a bunch of problems generally crashing out (have had the whole computer reboot on me once, and I
Re: [PEDA] Fan out Via clearance
Jon, if this is true, it then explains why all those short tracks appear under pads. Basically, it is not a gridless autorouter, unless there is a definition of 'gridless' that is different from my understanding of the word. Igor -Original Message- From: Jon Elson [mailto:[EMAIL PROTECTED]] Sent: Thursday, 17 October 2002 5:33 AM To: Protel EDA Forum Subject: Re: [PEDA] Fan out Via clearance Shuping Lew wrote: Jon, Thank you very much for your replied. Could you describe some more details? ---How to set up different grids for Vias and traces? Grid setting for traces should be much smaller than Via's... I'd like to set up 5mil for traces and 55 mil for vias so I can run a trace in between. Is there any way to set up different grids for auto router? Yes, you have a point, there. The detailed way to do this probably to set a rule such that vias cannot be closer than some calculated amount to other vias on a different net. (Does the autorouter follow such a rule?) Make that clearance enough so that a track plus the clearance on each side can then make it through between them. I can never remember exactly which rules the autorouter follows, and which it ignores. (The rules setup does tell you which ones are observed by the router.) Note that the grid is not an absolute restriction on track endpoints, however. If the track ends on some other primitive, it is allowed to go off-grid to hit the center of that primitive. That won't work for intermediate track segments, however. Jon * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Graphic symbol on PCB?
Hugh, have the logo in .bmp black and white, then convert it to .dwg format and import it into the blank .pcb. Then create a component and place it into your PCB library. From there you can import it automatically through the netlist in any of your PCBs. Cheers, Igor -Original Message- From: Hugh Stevenson [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 16 October 2002 9:45 AM To: Protel EDA Forum Subject: [PEDA] Graphic symbol on PCB? Dear Group, How do I get a graphic symbol onto a PCB (our Logo)? I am sure I have done this before but can find no easy way. I have tiff, bmp and jpg files of the logo. Cheers, Hugh. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] WARNING!!! Junctions at + points can disappear in DXP
All, I see there is a lot of diplomacy and politeness being flogged around. So, before we all get civilised again, let me throw some more oil into the fire. In my opinion there are legitimate, logical and electrically correct reasons to use 4-way junctions. E.g., if I wanted to represent the star earth, I might even have 8-way junction. To me it doesn't matter how many connections there are on a junction if they are correct. It is important that the schematic is readable and that it produces a correct netlist and it correctly imports or exports to any older or newer version I might use. The academic discussion conducted here does little to help solve the problem of the incorrect import/export of junctions in Protel. There are engineers who never held a soldering iron in their hand. So what? People who only ever wanted to be sales engineers or managers don't need that experience. It would definitely help them, but it is not necessary. This issue is fogging the real problem, and that is the incorrect handling of the junction information in Protel. So lets concentrate on that. Please. Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 15 October 2002 8:20 AM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] WARNING!!! Junctions at + points can disappear in DXP Abd, AJ, and all, see below. - Original Message - From: Abd ul-Rahman Lomax [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, October 14, 2002 11:57 AM Subject: Re: [PEDA] WARNING!!! Junctions at + points can disappear in DXP At 09:19 AM 10/14/2002 -0400, [EMAIL PROTECTED] wrote: And that, in liue of the useless blather about Four ways may not be used for any reason coming from the two-year school, is all that matters. My,, what a way with words! Mr. Jenkins could write a book, How to offend and drive away people. It would be a classic. 'Lieue' was mispelled, BTW, not that PCB designers are expected to be English majors. Lieu works OK in my spell checker. but lieue sure rings a bell, and in fact recommends that it be replaced with lieu - but what the hell does it matter anyway . . . The issue is not to win friends and influence people, any more than it is to nit pick over spelling. The real issue is to get the people south of the boarder who don't have any inkling of the real issues involved in the real world of electronics to stop writing software that screws up a perfectly good schematic of an oscillator or other symmetrical circuit that legitimately uses a 4 way connection. Actually, I never went to school to learn what I do, except for one half-year electronics course in high school (vacuum tubes!), and some physics at CalTech. There are lot of experienced PCB designers who are very much against the use of four-way connections, and for good reason. Possibly if you did attend a little more school you would not be so quick to condom things that have legitimate reasons for being the way they. Bug's a bug's a bug, and that's what the original post endeavored to report. We agree that the disappearance of a junction is a bug. Any software that in any manner alters a file that it didn't create should specify the name and address of the IDIOT who wrote it so that we can put a contract out on him and have him summarily executed, immediately, before he is allowed to screw something else up. I will try and be very polite and politically correct about it. STUPID - STUPID - STUPID - STUPID - STUPID. At a very minimum, if any changes have to be made for any reason whatsoever, they should be clearly specified before hand and the option given to NOT make the change. If there is some incompatibility with the new database / file / structure / system, then the item can be imported as it originally stood and flagged as an error. NO SYSTEM SHOULD EVER MAKE SUCH CHANGES AUTOMATICALLY. . . . However, it should be noted that this particular bug predates CAD software. I think you mean practice here. . . . The original reason for disallowing the use of four-way junctions is that the tie dots might easily be lost in reproduction, and even if they are not lost, the eye reads a three-way junction *much* more quickly than a four-way, which resembles, too much, crossed lines. Not true, it was actually just the opposite, because of the crud that built up on the glass tube of the old Ozlaid or other Blue Print machine, which crud, or other pieces of dirt that might be sitting on the vellum would block the light in exposing the diazo paper, which had the effect of putting little spots and dots on the copy, which could be interpreted as a junction, and notwithstanding all of that anyway, it has never been anything more than a simply a recommendation. PLEASE - PLEASE - PLEASE - Abd. This is in fact the whole problem that AJ and I and I am sure others are objecting to. NOBODY DISALLOWED ANYTHING! THERE IS NO RULE! Certainly it has been
Re: [PEDA] flipping board
Tony, that would be one of the ways to create a pick'n place file for bottom layer. Igor -Original Message- From: Tony Karavidas [mailto:[EMAIL PROTECTED]] Sent: Thursday, 10 October 2002 9:36 AM To: 'Protel EDA Forum'; 'Protel Developers Forum'; 'Open Topic Forum' Subject: Re: [PEDA] flipping board Just build it as it is, then when you get the board in your hand, turn it! Ok, joking aside, what are you really trying to accomplish? If it's what you stated below, why can't you just build it as I mentioned in my joke? -Original Message- From: Jun Gong [mailto:[EMAIL PROTECTED]] Sent: Wednesday, October 09, 2002 12:23 PM To: Protel EDA Forum; Protel Developers Forum; Open Topic Forum Subject: [PEDA] flipping board Hi, Any one knows how to flip a board in Protel? I want to turn the direction of a pre-routed PCB ( the left side will be at right side and right side will be at the left, just like I hold a piece of PCB board in hand and turn it ). I selected the PCB board, then press X key, Protel prompts that it will flip the board in the same layer, so wires are kept in the original layer and compoent footprints are flipped but keep in the original layer. I can not use L key, because a lot of wires and components are selected. Anyone has a solution? Thanks a lot. Jun * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] flipping board
Don't even joke about it. Shame on you ;) Igor -Original Message- From: Terry Creer [mailto:[EMAIL PROTECTED]] Sent: Thursday, 10 October 2002 12:46 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] flipping board -Original Message- From: Ian Wilson [mailto:[EMAIL PROTECTED]] Sent: Thursday, 10 October 2002 11:22 AM To: Protel EDA Forum Subject: Re: [PEDA] flipping board *snip* If I was to do it properly I would have to charge for it and I wouldn't want to do that. *snip* How about some sort of ATS (or would it be ITS?) scheme? Heheh! ;) TC * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] flipping board
I believe someone mentioned it in this forum as well. Igor -Original Message- From: Terry Creer [mailto:[EMAIL PROTECTED]] Sent: Thursday, 10 October 2002 3:05 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] flipping board Heh! sorry 'bout that - I couldn't help it :) But seriously - Most of the boards we deal with here are only double sided, with the occasional 4 layer, so the server that Ian co-wrote, sounds ok to me. I seem to remember seeing a server a while ago, that brought up a window which allowed you to view the other side of the PCB in the correct orientation. I can't remember where it came from (could have been a commercial website). TC -Original Message- From: Igor Gmitrovic [mailto:[EMAIL PROTECTED]] Sent: Thursday, 10 October 2002 2:03 PM To: Protel EDA Forum Subject: Re: [PEDA] flipping board Don't even joke about it. Shame on you ;) Igor * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Update Schmatics from
You could un-group the sch symbols by deleting them from the group in the library. Each part will then have its own symbol and the update should work. Igor -Original Message- From: Duane Foster [mailto:[EMAIL PROTECTED]] Sent: Friday, 4 October 2002 4:24 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Update Schmatics from One instance where this fails is on a symbol with multiple component names. The schematic library keeps a list of component names assigned to a symbol. The 'update' process apparently only looks at the first component name in the list. If your schematic symbol has a different component name at the top of its list, then it will not be updated. (Even if both lists are identical in every other aspect i.e. same members, different order) There is no way to designate a component name to be first, other than saving a library in ASCII and use an editor to rearrange the list. Duane Foster -Original Message- From: Daniel Webster [mailto:[EMAIL PROTECTED]] Sent: Thursday, October 03, 2002 10:55 AM To: 'Protel EDA Forum' Cc: Joe Nucich Subject: Re: [PEDA] Update Schmatics from I have a question for all you Protel gurus. When updating parts on a schematic from the schematic library I have noticed that sometimes the parts on the schematic will be updated with the desired symbol changes, but sometimes it does not work. Is this a bug? Is there some way to ensure that this update function will always work properly ? Has anyone else noticed this as a problem ? Thanks for the help ! Daniel Webster PCB Designer Northern Airborne Technology Phone: 250-763-2329 ext. 225 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] P99SE SP6 Problem with Update PCB generating duplicate nets or ot her errors.
Hi Brad, there were cases when I had to update a pcb two or three times before it completed correctly. Don't know why it happened. After that the board was done without any further problems. Regards, Igor -Original Message- From: Brad Velander [mailto:[EMAIL PROTECTED]] Sent: Thursday, 3 October 2002 10:51 AM To: Protel EDA Forum List Server (E-mail) Subject: [PEDA] P99SE SP6 Problem with Update PCB generating duplicate nets or ot her errors. Hi all, I have a layout that is a little different than our norm in terms of size and complexity. This seems to be causing some problems that I don't normally see. I have four schematic pages in a flat hierarchy. I have used nets and ports global, I actually don't have any ports used at all just the netnames. When I run the Update PCB I get errors reported for adding nets that already exist. If I run the update anyway I get multiple occurrences of these nets showing up in the PCB netlist manager. The nets involved are all nets where I have used a netname on one sheet to tie a signal to the intended connection on the other sheet. So yes there are duplicate netnames (the same netname) within the schematics but they are needed to provide connectivity. What is wrong? How can I fix this? The first time that I ran the update, I deleted the offending net duplications from the preview macros window. On that occasion I also got an access violation near the end of the update process. Looking in the PCB file I discover that the initial components have been placed by the update function in the upper right corner as usual. However the components appear to run right off the page past the 100 inch limit of the database. I am not sure if anything might have been dropped because it ran past the 100 inches. So I move the parts down close to my PCB outline and run update again. I get the same duplicated net error but I do see some net connections being made that obviously weren' t made during the first pass. Possibly because of the access violation near the end of the first update? This is not a very large design compared to some you guys work on, is this common behaviour placing parts out past or at least to the 100 inch limit? Is there a chance that something is screwed because of this part loading out to or near the 100 inch limit? I also just tried running update again for a third time. It is still adding 2 more net connections to device pads! Why weren't these added in either of the two previous updates? I am just so leery that something is drastically wrong at the moment and that I can't trust the database. I hope someone has had similar experiences and has an answer or advice. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com Norsat's Microwave Products Division has now achieved ISO 9001:2000 certification * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Unplated pads
Just make them Top Layer pads. Igor -Original Message- From: Thomas [mailto:[EMAIL PROTECTED]] Sent: Friday, 20 September 2002 10:34 AM To: Protel Data Forum (E-mail) Subject: [PEDA] Unplated pads Our board house has asked us to de-check the Plated box for single sided pads. Ok, 1 global edit later and it's done, only one problem the DRC now comes up with: Processing Rule : Broken-Net Constraint ( (On the board ) ) Violation Net A Warning - net contains unplated pads Violation Net N/E Warning - net contains unplated pads Violation Net A1 Warning - net contains unplated pads etc... I realise these are warnings rather than full blown violations but is there any way to turn this warning reporting off in the DRC report? Thanks, Tom. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Unplated pads
Or Bottom Layer, depends on your board. Igor -Original Message- From: Igor Gmitrovic Sent: Friday, 20 September 2002 11:09 AM To: Protel EDA Forum Subject: Re: [PEDA] Unplated pads Just make them Top Layer pads. Igor -Original Message- From: Thomas [mailto:[EMAIL PROTECTED]] Sent: Friday, 20 September 2002 10:34 AM To: Protel Data Forum (E-mail) Subject: [PEDA] Unplated pads Our board house has asked us to de-check the Plated box for single sided pads. Ok, 1 global edit later and it's done, only one problem the DRC now comes up with: Processing Rule : Broken-Net Constraint ( (On the board ) ) Violation Net A Warning - net contains unplated pads Violation Net N/E Warning - net contains unplated pads Violation Net A1 Warning - net contains unplated pads etc... I realise these are warnings rather than full blown violations but is there any way to turn this warning reporting off in the DRC report? Thanks, Tom. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Unplated pads
Brad, agree with you. I just thouhgt it would work, as it works for the pads with no nets. But it doesn't work. Our pcb shop does it automatically for single layer boards, and we use multilayer pads. Igor -Original Message- From: Brad Velander [mailto:[EMAIL PROTECTED]] Sent: Friday, 20 September 2002 11:47 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Unplated pads Igor, one warning, making top layer pads with a drill has it's own error. We have done this for years and if the pad is top layer only (not a multilayer with the bottom turned off) then there is a problem with drill information. I forget the specifics but I believe that a drill drawing does not show the drill symbol on pads that are top layer only. I cursed and swore when this one bit me ages ago but others on the list just thought I was nuts to specify what they called a SMD pad with a drill. The only work-around is to use a multilayer pad with the bottom layer turned off (0 size). Then you do get the warnings of the unplated pads. As well you will get unrouted errors just because the unplated pad may be interrupting a signal path and Protel doesn't have the smarts to figure out if it is really an open or not. As for the shop's request, how do they know which pads are unplated if it is not specified? Without it being specified in the pad configuration then the drill file would not differentiate them from plated holes of the same size. The shop would have to hunt for the unplated pads by comparing a drill symbol drawing and sort out the coordinates of those unplated holes. Not to mention the possibility that someone just screws up because the drill report file says they are plated and they are drilled during initial drill instead of as a second drill operation. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com Norsat's Microwave Products Division has now achieved ISO 9001:2000 certification -Original Message- From: Igor Gmitrovic [mailto:[EMAIL PROTECTED]] Sent: Thursday, September 19, 2002 6:09 PM To: Protel EDA Forum Subject: Re: [PEDA] Unplated pads Just make them Top Layer pads. Igor * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] KILL THE DAMN AUTOROUTER
JaMi, Auto Route-Stop works for me. It doesn't do it to my board, either, if pre-routes are locked. Sorry to bring you the bad news, but you have too many problems with Protel. Maybe it's time to have a look into some HW/SW compatibility in your PC, or, excuse my forbidden thoughts, change it altogether. Cheers, Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 18 September 2002 11:48 AM To: Protel EDA Forum Cc: JaMi Smith Subject: [PEDA] KILL THE DAMN AUTOROUTER IT HAS HAPPENED TOO DAMN MANY TIMES THAT iHAVE ACCIDENTLY HIT SOME KEY AND LAUNCHED THE DAMN AUTOROUTER INTO AUTO SCREW UP THE BOARD MODE HOW DO I STOP THE DAMN THING IT TOTALLY TRASHES THE BOARD AND WONT LET ME STOP IT THE ONLY WAY I KNOW HOW IS TO KILL IT IN THE TASK MANAGER TOTALLY UNACCEPTABLE * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Whats wrong with this picture.
Dennis, I am using File-Exit. The sounds are enabled and tested. Maybe my installation is buggy. :) Igor -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 10 September 2002 1:23 AM To: Protel EDA Forum Subject: Re: [PEDA] Whats wrong with this picture. i dusted off an old machine using File eXit 99SE klunks on Win98 (big X upper right does not) Protel 98 same as above on win98 Protel AdvPCB (2.8) no klunk Igor- are you using the File (eXit) as prescribed and not the closed window X ? have you pressed the test button for the critical stop in sounds? anyway, having said that, like Ian, i am not sure this really means anything anyway maybe the programmer put that in to warn you were quitting protel and forgot to put it on the big X Dennis Saputelli JaMi Smith wrote: Igor, Thanks. Still kind of curious as to what the difference is in your installation as opposed to all of the others that have reported it on their systems. Well, now that it is Monday in some parts of the world, we may get a few more responses to the KLUNK! posts, and find a few more people who cannot duplicate the problem on their machine. Just to review what we know so far: We know it happens with Protel 99 SE on numerous machines in Win2K. We know it does not happen with Protel 99 SE on your machine with Win2K. We need more input on Protel 99 SE on other systems. We have no input for Protel 99 on any systems. We know it happens with Protel 98 in Win98. We have no input for Protel 98 in Win95 or NT4. Thanks again, Let me know if you think of something, JaMi - Original Message - From: Igor Gmitrovic [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Sunday, September 08, 2002 10:25 PM Subject: Re: [PEDA] Whats wrong with this picture. Jami, My setting for the Critical Stop shows chord.wav as well. Igor * Tracking #: 039C0F0E829C9249872B8A388B1D3F456265E6D8 * -- ___ www.integratedcontrolsinc.comIntegrated Controls, Inc. tel: 415-647-04802851 21st Street fax: 415-647-3003San Francisco, CA 94110 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Fw: on topic supply SOS
Brian, I assume you need SMD caps. Have a look at MURATA multilayer ceramic chips, maybe LL series. For your prototype, I would suggest you solder a cap of 1-2uF directly on top of the IC, connecting accross power pins and using small multistranded wire. You could put several of them in parallel, as well, depending on the IC's power consumption. If you have multiple power pins on the IC, try placing more than one cap accross. Igor -Original Message- From: Brian Guralnick [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 10 September 2002 11:50 AM To: Protel EDA Forum Subject: [PEDA] Fw: on topic supply SOS DAMN ISP HEADACHES!!! Re-send... This is one of the decoupling caps between VCCINT 1.8v GND. As you can see, the 1.8v dips down to 1.625. This creates havoc with the processing inside the Altera EP20K200E which has clocks running at 133MHz, 125MHz, 95MHz, 24MHz. 16KB ftp://ftp.point-lab.com/quartus/Public/ProtelUsers/NoiseVcc18-2ns.png 14KB ftp://ftp.point-lab.com/quartus/Public/ProtelUsers/NoiseVcc18-4ns.png Here is my current decoupling caps for the 1.8v. 4 x 0.1uf smd 0805 ceramic. 3 x 470uf electrolytic. See the problem? I originally had 32 x 0.1uf, but some rush work with cut paste at one time about 2 month ago left me with this to work with. I need a temp fix where I only have 4 sets of access points around the APEX part with nice Vias to 1.8v. I can't get my hand on the Wima caps, any other solutions, or, recommendations? Brian Guralnick [EMAIL PROTECTED] Voice (514) 624-4003 Fax (514) 624-3631 * Tracking #: 841E7C21D4096640B2FEE40443B99712122F39F2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP - Crunch time?
you said it all Igor -Original Message- From: Fabian Hartery [mailto:[EMAIL PROTECTED]] Sent: Saturday, 7 September 2002 1:51 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] DXP - Crunch time? Dennis, The only thing I could relate to with demolishing a DDB architecture is that there is alot of data management under this regime. Thus, there is associated software complexity and design risk. For the end user, the corruption of a DDB has the potential to destroy an entire project. To counter this complaint, I have personally not had any significant DDB problems. Within DXP, there seems to have been hell of a swerve in the direction of PCAD. Having an Accel/Tango/PCAD origin within this company, I have seen the forces of good and evil do battle. The thing about swerves is that there is often a chance for over recovery. Killing the DDB format and not using it as a 'Save As' feature is one of them. This does present the opportunity for 'a dark horse' to come out of the pack and steal Altium's entire user base. A company just needs to offer adequate import capabilties and service its clients basis. If I were an Altium product line manager, I would seriously consider gathering a small team of programmers together to offer ATS support to those that wish to continue on using 99SE. Call it legacy support, for that matter. Asking for service pack 7 for nothing is asking alot for a very mature product. To put it bluntly, there seems to be alot of pissed off people within this forum and alot of windows are opening up to go elsewhere. Fabian Hartery Research Engineer, B. Eng (Electrical) Guigne International Limited 63 Thorburn Road St. John's, Newfoundland, Canada A1B3M2 tel: 709-738-4070 fax: 709-738-4093 email: [EMAIL PROTECTED] website: www.guigne.com This e-mail and any attachments may contain confidential and privileged information and is intended only for the use of the individual or entity to which it is addressed. If you are not the intended recipient, please notify the sender immediately by return e-mail, delete this e-mail and destroy any copies from your system; you should not copy the message or disclose its contents to anyone. Any dissemination, distribution or use of this information by a person other than the intended recipient is unauthorized and may be illegal. We cannot accept liability for any damage sustained as a result of software viruses and advise you to carry out your own virus checks before opening any attachment. * Tracking #: 55441536B6429B41AC330E61A9C1CC8AC038F4D9 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Whats wrong with this picture.
doesn't do it to me Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Saturday, 7 September 2002 5:21 AM To: Protel EDA Forum Cc: JaMi Smith Subject: [PEDA] Whats wrong with this picture. OK . . . So I'll admit, I missed the Class on Protel 99 SE Basics . . . And I slept thru most of the Protel 99 SE 101 and 102 Classes . . . But gimmie a break . . . This one has got me baffled . . . So what are the two simplest functions that one can possibly perform in Protel 99 SE? I mean the absolute simplest, most bare bones, easiest things to do in Protel 99 SE. I mean like, are you ready for this one, START Protel 99 SE, and are you ready for this one, END Protel 99 SE. Not too complex here, just simple stuff. OK . . . I can think of 3 ways to START Protel 99 SE (without an open database): 1. Double click the ICON on the Desktop. 2. Place the cursor over the ICON in the Desktop and press ENTER. 3. Navigate the START MENU and go from there. Nothing too complicated, nothing major, and I do not have any problems here, I can handle everything so far. But now comes the problem. I can think of 6 ways to END Protel 99 SE (without an open database): 1. Click on the big X (Close) in the upper right hand corner of the Application. 2. From the File menu pulldown click on Exit. 3. From the Task Manager, select Protel and end it. 4. Shutdown the system. 5. Hit RESET, or turn off the power switch, or simply pull the plug out of the wall (believe it or not I have had to resort to this before when Protel 99 SE locks up). 6. Simply wait for it to CRASH, which it always seems to do all by itself sooner or later. Now I will admit that the last 4 are not normal ways of simply ENDING Protel 99 SE, so we can eliminate them right off the bat, and simply stick with the first 2. No Brainer . . . OK . . . So I simply START Protel 99 SE by any of the above methods, or maybe some that I haven't thought of, and go from there. Now comes the hard part, we have Protel 99 SE up and running, with no database open, in all of its glory, and we want to close it, so what do we do? 1. We hit the big X, and wala!, it closes. Simple enough, I can andle this. No problem here. 2 We go to the File menu pulldown, and click on Exit, and what happens now? Well first of all, it takes much much much much longer to END Protel 99 SE this way, but now comes the real problem, on it's final exit, we get, are you ready for it, a Microsoft KLUNK! sound, you know, the sour note that Microsoft gives off when you commit an error! Not the Happy little Bell that Microsoft uses to get your attention, but the KLUNK! that it uses to say ERROR!, or WRONG ANSWER. or You Blew It!. OK . . . One of the two simplest functions in Protel 99 SE, and it can't even do this without a KLUNK!. It can't even do this without an ERROR! What's wrong with this picture ??? What's wrong with this picture !!! OK . . . So maybe it's me. Does this happen to anyone else? JaMi * Tracking #: AA0194B7D0FB244F9AAF37BDBEBBB3C4F4AE1864 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] KLUNK! - Whats wrong with this picture.
In my experience Protel versions 3.0, 98 and 99 were flaky. Protel 99SE with SP6 is stable. I aggree with you on SP7. There are things to be corrected. Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Saturday, 7 September 2002 6:41 PM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] KLUNK! - Whats wrong with this picture. - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Friday, September 06, 2002 9:14 PM Subject: Re: [PEDA] KLUNK! - Whats wrong with this picture. Jami, Do you have the ability to install P99SE on a different machine? (I can't remember if you've indicated that before). I think your frequent crashes are pretty unusual. Tony, Over the past year, most of my problems have been on either a Dell Model 4100 1GHz Pentium III or once that was upgraded, on a Dell Model 535 2.3Ghz Pentium 4, at work. I then purchased my own license, and now have my own copy of Protel 99 SE SP6 installed on my own IBM Model 6648 NetVista 866 MHz Pentium III at home. I actually just think that the crashes are just a matter of usage, and the reason it has been so high in the past several weeks is that the total usage has been an average of about 12 hours a day, with occasions reaching up to 18 hours straight. When I push Protel, it crashes! When Protel crashes, I scream and yell! I don't think that I am having more crashes than some others out there, I just think that I may have a slightly higher usage, and be much much more vocal and much much less tolerant about the crashes. I really really think that is as simple as that. I think that far far too many people out there have become accustomed to their systems crashing on them from time to time for one reason or another, and actually think nothing of it. Many accept it as the cost of doing business as it were, and in some cases actually blame it on themselves thinking that it was something that they might have done wrong, or that for some reason the hardware or software combination that they have just does not live up to Protel's requirements and expectations. I have heard some people insist that their system is rock solid, and never crashes, and yet these are the very same people who admit that they have occasionally seen hidden processes or phantom copies of Protel still running when they go to shut their system down. This is not normal. This is not how software is supposed to run. Especially when that software is currently costing $8,000.00 a copy. It is not simply a fluke. It is not something that you did wrong. It is not that you have a flaky system. It is simply inexcusable blunders and oversights in programming. It really and truly is that Protel really and truly is flaky software. If nothing else, what we have learned today is that Protel can't even perform the simplest of functions of terminating its own program correctly and returning control and resources to the operating system, without making an error. This is fundamental. This is an obvious blunder. And this problem has been there all of the time. I know that there may be some in this forum who would take issue and try to say that this is not a big problem, and my answer to them is simply that we really do not know how big the problem is since we do not have the source code and can therefore not really understand what is or is not happening, and I don't think that that is really the issue here anyway. I think the issue here is that this KLUNK! problem proves beyond any shadow of a doubt that there are in fact some very basic software bugs and problems in Protel 99 SE, and that Protel / Altium has really never looked at the software from a stability and reliability standpoint to see whether or not there really are problems there when people have complained of crashes. Do you realize the magnitude of this blunder! What we have found out here today is something as basic and fundamental as writing your very first hello world! program in C, and having it crash on exiting main. Whether or not it causes other problems is secondary to the fact that it is a programming blunder of monumental proportions, and the jury is not really in on whether or not it causes any other problems. These are the same people who are now trying to sell you another can of worms called DXP. I apologize for my little soap box oratory here, and it is certainly not my intention to offend anyone or start another battle of words, but this is Problem Number One in Introduction to Fundamental Programming 101, on How to Properly Terminate any Program, and Protel / Altium has flunked the course. I believe that this problem needs to be widely publicized, and Protel / Altium needs to be pressured into stepping up to the plate and taking responsibility for the problem, and promising to do something about it, for all current Protel 99 SE users and customers. There are many Protel 99 SE customers out
Re: [PEDA] KLUNK! - Whats wrong with this picture.
There are many factors in the same equation, but as I see it, they had to come up with something completely new so they could introduce the ATS. That, to me, is the most important factor in all this. They are fighting for revenue, as any other busines does. That they might lose in the end is a law of (business) nature. Igor -Original Message- From: mariusrf [mailto:[EMAIL PROTECTED]] Sent: Sunday, 8 September 2002 4:06 AM To: Protel EDA Forum Subject: Re: [PEDA] KLUNK! - Whats wrong with this picture. - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Saturday, September 07, 2002 1:07 PM Subject: Re: [PEDA] KLUNK! - Whats wrong with this picture. Hi Joe, I looked at the dates because your comment sparked interest. The older dates look to me like development tool DLLs, PLD stuff (the files from 1996), icons, pretty benign and uncontrollable stuff. If you look at the meat of the code, the file are dated 2002. I would disagree with you just because there are so many new problems with DXP. Even some core functions that we were familiar with have changed. I'm just guessing, but maybe the code base of P99SE was getting very difficult to maintain, and they opted for a 'fresh start' in many ways. In this article: http://www.embedded.com/story/OEG20020819S0056 the author states: To achieve the best long-term results, it is often necessary to have the courage to discard bad code and rewrite it. Maybe that is where P99 ended up. Like I said, I'm just guessing. discarding bad code is one thing, changing top level GUI specs is another . They decided to incorporate new features and discard old features based on management perception rather than user feedback. Starting from scratch new code doesn't mean discarding the old menus or feature set . All it needed was some corrections and some additions to be a better EDa tool than 99se or the competition . Then with the brand new enhanced spec software engineers could've written code in any language of their choice and on any platform . Altium should have correlated the feature set with the market segment they're addressing. They should've made an effort to keep the familiar menus regardless of the underlying code whenever possible. IT looks a lot like the not invented here syndrome , new development team is brought in, old people let go, new people badmouth old ones and then change everything including what was good. This was terribly foolish because Altium was somewhere up there on the learning curve in designing EDA tools . 99se was the nth iteration with lots of incremental improvements over previous versions. Giving up their functionality and replacing them with different options/menus/features threw them years back on the evolution scale. They could've rewritten the whole program from scratch but still maintain a top level GUI familiar interface , instead I bet they rewrote the GUI and probably patched the old underlying code. I'm sure it's still that Delphi code BTW . An example of how not to develop software, or what happens to shareholders money when management doesn't have a clue. They are currently reinventing the wheel , unfortunately it's still square or octagonal at best . Matt Tudor , MSEE http://gigahertzelectronics.com p.s. in this day and age the PLD tool makes no sense whatsoever , Xilinx, Actel, Atmel, Altera offer free tools with better funcionality , which have the added advantage that they actually _work_ for a change . * Tracking #: B583A16F9F0D87409C1CC56EB92C8E2B42E82B54 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Cease the spam
All, I have got some messages this morning, stating I am sending spam. They came as answers to messages posted to this forum. If someone is trying to unsubscribe and have difficulties, they better look somewhere else for a solution. Could a group administrator have a look into who this might be? A copy of the message is included below: -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] Sent: Monday, 9 September 2002 9:08 AM To: Igor Gmitrovic Subject: CEASE THE SPAM If this waste of our resources does not cease immediately, please be advised that we may activate the Revenge(tm) program for this user. Revenge would automatically sign this user up for almost 300 mailing lists to provide a graphic illustration of what it's like to receive unwanted junk e-mail. Igor * Tracking #: B8561439C013FB4F911F22ADC9AD494F2302D7F2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Whats wrong with this picture.
Jami, My setting for the Critical Stop shows chord.wav as well. Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Monday, 9 September 2002 2:16 PM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] Whats wrong with this picture. Igor, OK, well it just keeps getting more and more bizarre! But what can you expect with Protel. You are the first person to respond that has said that KLUNK! does not actually go KLUNK! on your machine. I wonder what makes your system different from all of the others that have responded? Is it possible that in your volume control panel you have something muted. Is it possible that under Sounds and Multimedia in the Control Panel you have KLUNK! turned off? Under the Sounds tab in that dialog box, the setting for Critical Stop should be set to something besides (None) to be on. That appears to be the sound that is being executed. I believe that the default is chord, but anything besides (None) will work. Mine is set to chord which is the sound that I call KLUNK!. When I change Critical Stop to something else, say chimes, then KLUNK! changes. Maybe KLUNK! just doesn't KLUNK! in all cases on all machines, although I will admit that I thought that we were heading for a unanimous consensus on this one. Thanks for responding. At least we are building a database of sorts. JaMi PS. Maybe we need to have someone make a Sound Bite that says Ah s___! Protel crashed again! and set it up for the Critical Stop sound. - Original Message - From: Igor Gmitrovic [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Sunday, September 08, 2002 7:22 PM Subject: Re: [PEDA] Whats wrong with this picture. JaMi, No, it doesn't. The sound is turned on. Dell, PIII, 700, 256, W2K, P99SE SP6. Regards, Igor * Tracking #: B027ED339C331643962B565BFD142DD85CC90D19 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Cease the spam
That's called action. The nastygrams are not coming anymore. Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Monday, 9 September 2002 1:26 PM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] Cease the spam Bingo! I think you hit the nail on the head Terry! I tried to search my archive here on Friday night, but I only go back to 9/13/01 on this machine here at home, and I came up with a blank (didn't go back far enough). Thanks! I fired off a couple of test messages to that email address just now, just to see if anything happens. GUESS WHAT ! ! ! I've been sitting here just kinda quiet like, for a long time now, waiting, because I didn't want to jump the gun, so to speak, but I think that it is OK to speak now, without putting my foot too far in my mouth. Interesting thing seems to have happened here. The Cease the Spam messages appear to have ceased! That means that whoever it is, is actually monitoring the emails right now this minute, and we have struck a nerve. The last one I got was just after I responded to Igor, which is just about the time that Tony would have posted his post with the header information. I have a sneaking suspicion that there is someone is actually sitting at Kollmorgen right now, which would not be out of line for a defense manufacturer, and among other things, monitoring the email, which can easily be programmed to alert the operator when an access is made to an unaithorized address. In other words, when they programmed the automatic response, they also set a bell (the old cntl-G). They must have seen the header in Tony's email, and freaked, and pulled the plug! Pardon my speculation here, and I know the minute that I send this a whole bunch of Cease the Spam messages will come in and I will have to eat my words . . . OK, anyway, back to the speculation . . . Poor guy at Kollmorgen gets layed off, and the Network Administrator guy deletes his email account, but email keeps comming in, and he gets tired of seeing them, so he sets up a little nasty gram and also sets an alert to sound every time the offending emails come in and a nasty gram goes out, and the alert has been going off, so he has been reading tthe messages, and then all of a sudden he sees the header, and says oh s___! and realizes he's been found out, and he kills the nasty gram generator . . . OK, so now I will send this email and have to eat my words. By the way, if I am even close to right, then I think that that Network Administrator guy better post an apology to this forum, or I really will call the head of security at Kollmorgen tomorrow. Anyway, hopefully we may be back to normal now. I am not sure if I mentioned it before, but since the listserver distributes everything with the return address of the person who submitted the original post, and that is why whoever has been doing this is sending the Cease the Spam message in response to recieving a post from the listserver, and sending it to the from address on the post. JaMi - Original Message - From: Terry Harris [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Sunday, September 08, 2002 7:04 PM Subject: Re: [PEDA] Cease the spam On Sun, 8 Sep 2002 18:25:14 -0700, you wrote: Hey I'm getting the same bloody emails. I've had 3 or 4 of them in the past few days. I got one also. Probably get another one from this post sigh. Here is the header as I see it: [EMAIL PROTECTED] The only postings to this list from that server were from Jackson, Ken [EMAIL PROTECTED] Last post here in April 2001 Cheers, Terry. * Tracking #: 9DF368019661234C9BE6777F70C4C85057C7722C * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Solder jumper
Steve, You could have a pad on the outside and a via inside. That would leave you with one pad. Pad would have to have its hole diameter larger than the via diameter and should have to be marked as 'not-to-be-drilled' and not plated. How complicated is that going to be for your your pcb shop? I can't think of another way. Igor -Original Message- From: Steve Smith [mailto:[EMAIL PROTECTED]] Sent: Thursday, 5 September 2002 11:03 PM To: 'Protel EDA Forum' Subject: [PEDA] Solder jumper Is it possible in 99SE to have a round pad with a 10 mil gap through the center to create a jumper that you solder when a connection is required? I know that the Lomax Virtual Short is similar but we want a single pad (or two halves of a pad) instead of two separate pads. Thanks, Steve Smith Product Engineer Staco Energy Products Co. Web Site: www.stacoenergy.com * Tracking #: 1ABAF690937FE742B12D2C792B897FF903DEABAC * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DWG DWF files not importing correctly
Barry, we have tried that as well. In our experience, DXF files are not imported correctly into Protel (any version). DWG files on the other hand worked fine and we used that format for both import and export to AutoCAD LT and ProE.FWIW Igor -Original Message- From: Barry, Rick [mailto:[EMAIL PROTECTED]] Sent: Thursday, 5 September 2002 11:49 PM To: '[EMAIL PROTECTED]' Subject: [PEDA] DWG DWF files not importing correctly We are trying to import some of our schematics into protel from AutoCAD LT2000i. We would prefer to be doing all of our schematics in one program. Have tried both DXF and DWG formats. The resulting drawings are nothing but a mishmash of components and lines randomly scattered across the page.. Used both primitive and component options. Another oddity, one of our seats has the import under file and then a choice of dwg/dxf or pcad, but one of our seats does not have this option unless you are in PCB which of course isn't what we want as a result.. Probably just a set up option, but we can't seem to ascertain how to change this. As always, any assistance is greatly appreciated. Rick Barry Manufacturing Test Engineering Warner Power LLc www.warnerpower.com 603.456.4485 * Tracking #: 59267D9BA6ECE44AA7E087D9F281CF9015D0EAFA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Document manager tree gone in 99SE
Maybe it's just window size dragged to the edge. Try increasing the window size by dragging it to the left. Igor -Original Message- From: Rene Tschaggelar [mailto:[EMAIL PROTECTED]] Sent: Friday, 6 September 2002 5:21 AM To: Protel EDA Forum Subject: [PEDA] Document manager tree gone in 99SE Upon restart of P99SE, suddenly the tree of the Document manager is missing. The icon changes almost nothing. It inserts a few pixels to the left side of the document window Any ideas ? Rene * Tracking #: F95D98EEE4D0F14CA920AFCB97326F9B79AE0E96 * -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com commercial newsgroups - http://www.talkto.net * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP - Crunch time?
Terry, you know what's best for you. To see what other people are doing, have a look at the topic 'SV: Hard Look at other Programms'. From what I have seen so far, your thoughts are in line with a lot of the people in this forum and are definitely in line with mine. Cheers, Igor -Original Message- From: Terry Harris [mailto:[EMAIL PROTECTED]] Sent: Thursday, 5 September 2002 11:49 AM To: Protel EDA Forum Subject: [PEDA] DXP - Crunch time? Well, this is a bit long - skip to the bottom if you are busy.. I've been evaluating DXP a little more and I keep finding myself asking why the hell did they do that? I like the PCB printer in 99SE, so I decide to find out what DXP has got instead. I load up a demo PCB and find Fabrication Outputs and Assembly Outputs under the file menu. Under Fabrication Outputs there is Final. Not very obvious what Final is (especially is there is no Draft option) but I click it and get a fancy kind of print preview window. The preview window shows 16 pages. It doesn't tell you what those 16 pages are or what they are called unless you can zoom into the previews and deduce what they are from what will be printed. I think what the hell told DXP to generate these 16 pages and what are they and where are they configured? This print preview window has 3 buttons to control zoom, and even an edit box where I can type in a zoom % (although typing something different into it has no effect on anything). Eventually I discover the only way to do anything but zoom and print in this preview window is from a right click context menu. The menu has a Configuration item, configure what? who knows till you try it. I try it and get this really crap dialog which is the equivalent of the 99SE PCB Printer tree view. It isn't a conventional tree and by default is displayed fully expanded meaning I have a lot of scrolling to do (at least the scroll bar is grey not the pale blue used randomly elsewhere in DXP). Sheesh this is dragging on but there is just so much wrong to describe The tree branches are the printed pages like TopLayer etc and these branches contain the PCB layers to be printed. If I left click on a PCB layer it gets highlighted - cool but the highlight doesn't do anything for you, no Del to delete, no Alt Enter for properties, All you can do is move the highlight up and down with cursor keys. If I click on a Page name I am suddenly editing the name. If I double click on a page name I am suddenly editing the name. If I click on the icon next to the page name nothing seems to happen but actually that name got highlighted without showing anything - maybe because page names are displayed with a different background colour. I know it is highlighted because cursoring up and down takes an extra step for the highlight to pass through the page name. I also know because when (and only when) these page names are invisibly highlighted I can hit + or - to expand or colapse their branch. I can also doubleclick on the icon next to the page name to expand or collapse the branch, however, that also brings up a properties dialog for the page. The properties dialog is pretty similar to the 99SE PCB printer. So I delete some of these pages, which is only possible from their context menu and click OK and click close on the preview and close the project. I open the project, open the PCB, select Final and the same 16 pages are back just like it was. I find this a bit incredible, compared to 99SE configuring and previewing prints is bloody awful and DXP doesn't even save one configuration in the project never mind multiple configurations in PCB printer documents. I believe CAM output is the same. Another gripe is these generated files don't appear in the project pane. Generate drill files and you have to leave DXP and find the report file in Windows. Sometimes the project pane does show Generated text files for some generated files but they simply dissapear the next time you open that project. I am coming to the conclusion that the D in DXP stands for disaster. I am annoyed at the lost of the design database and explorer, a great idea with a bad implimentation. It should have been improved not scrapped. None of my existing designs will convert to DXP without pain, especially for the embedded non-protel documents. I don't think problems like the above where something which worked well in 99SE being crippled by design are going to be fixed in a couple of service packs. I don't think DXP will reach the non-buggyness level of 99SE in a year. The new router seems unimpressive. I would have a lot of re-learning to do. I have to pay for it and pay for ongoing support. I've been using Protel since it was called Tango for DOS. The release of DXP and realiastaion that 99SE is now an unsupported dead end means I have never had more insentive to switch to a different vendor. As the title said Cruch time - do I spend any more time looking at the
Re: [PEDA] File Size Limit?
Jason, another option could be not to cross hatch the polygons but to do only vertical or horizontal pouring. Igor -Original Message- From: Jason Morgan [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 27 August 2002 10:22 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] File Size Limit? Nope, one option (to reduce the file size) is as you imply to remove unnecessary data, its just a faff. (P.S. its 99se sp6) -Original Message- From: Emanuel Zimmermann [mailto:[EMAIL PROTECTED]] Sent: 27 August 2002 12:42 To: Protel EDA Forum Subject: Re: [PEDA] File Size Limit? Hi Jason, No idea about the size limit, but does your assembly house require the poly planes included? Emanuel Jason Morgan wrote: Hi, Due to some weirdness at our assembly house, they can't accept a normal pick and place file. They want a Protel ASCII PCB file, which they then import and create the necessary data for their machinery. This has been OK up 'till now, with an output file format of 35MByte. A recent variant of our product has increased this due to more poly planes. Now we get an error message File is too large on doing FILE/SaveAs with ASCII file format, when we look at the (partial) file that has been created, its 56MByte. Is this limit on ASCII PCB files something we can get round, or is it a hard limit? Thanks for any advice in advance Jason. * Tracking #: 5738420760154844A745991036FBBB786168A5E5 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Slow Performance of Protel 99SE
Malik, You could decrease the number of undo steps for schematics and pcb editors, in Tools-Preferences menus. This will free up some of your RAM. You could also consider adding more RAM. There is a non-linear function between the component count and the time it takes to DRC a board. For a component count like yours, it may seem that Protel has gone to sleep. The best way I know to solve this is to get a faster machine. On the other hand you could halve the number of components. It would save you a lot of time and your boss will love you. Igor -Original Message- From: Adeel Malik [mailto:[EMAIL PROTECTED]] Sent: Saturday, 24 August 2002 10:59 PM To: 'Protel EDA Forum' Subject: [PEDA] Slow Performance of Protel 99SE Hi All, I have P-3 with 256MB RAM and quite a lot of space on Hard Disk but still sometimes the Protel seems to be crawling rather than running when the Net Count or component count exceeds 2000. I also perform Compact After Close option when exiting. Can someone give me generic guidelines as to how to increase the performance of Portel 99SE. Regards, Adeel Malik * Tracking #: 42AB61E38B690F459CD0D517F3829712A681FFCB * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Matched Lenghth Constraint
Danny, wherever you have a change in the inductance, i.e. track width, you will get reflections. In such conditions yo could get standing waves as well, although I don't think that working frequencies on your board are so high to be affected by this. Wider track is equivalent to a broadband antenna. It would then pick up more noise. So you don't really want wider tracks or variable track width. A good thing to do would be a short track with as few corners as possible and no vias. To increase the immunity try shielding the net with a polygon plane as much as possible. Igor -Original Message- From: Danny Bishop [mailto:[EMAIL PROTECTED]] Sent: Friday, 16 August 2002 10:31 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Matched Lenghth Constraint Joel I appreciate your thoughts, however I don't think I quite got my reasoning across as far as my motivation for thinning down a thick trace in some areas to fit. In this particular case there is one edge sensitive net that goes to 4 logic gates on a board that is otherwise relatively free of critical traces. My reasoning behind fattening up this trace (to the point of placing fills where possible) is to reduce the inductance of the net where possible in the hope that it's susceptibility to EMI will reduce. Now I suppose that as far as EMI immunity is concerned reflections are less important (?) particularly considering that this particular signal should only trigger in a fault condition and shut down the circuit. In a more general case however if this had a clock on it I wonder if the introduction of these impedance changes along a trace would increase or reduce reliability (particularly with EMI). cheers -Original Message- From: Joel Hammer [mailto:[EMAIL PROTECTED]] Sent: Friday, 16 August 2002 1:51 AM To: Protel EDA Forum Subject: Re: [PEDA] Matched Lenghth Constraint Danny, I have always been under the belief that if you make a part of a trace/track thin you might as well make the *entire* trace/track that width. (holding even more true in power ground runs. in which case the thin run could almost act as a fuse.?) If anyone can share logic otherwise I would really be interested in hearing it. Or am I safe in what I think to be true? - Original Message - From: Andrew Jenkins [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Thursday, August 15, 2002 10:02 AM Subject: Re: [PEDA] Matched Lenghth Constraint -Original Message- From: Danny Bishop [mailto:[EMAIL PROTECTED]] ... I wonder what conclusion we can draw from any potential benefits of using a thick trace for a tricky trace, but thinning it down when required to get through tight spots? I suppose that might depend on how one thins the trace. Under certain conditions, I think such a thinning might very well result in an unanticipated reflective interface. That is, if one doesn't take UltraCad's analysis as canon, IMO, a safer thinking process than simply bleating a path to success ;^) aj ** ** * Tracking #: 74A48E38F8030A4DAB0A361931AAA163D71A3EB1 * ** ** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Matched Lenghth Constraint
Engineering is the art of compromise. -Original Message- From: Danny Bishop [mailto:[EMAIL PROTECTED]] Sent: Friday, 16 August 2002 11:58 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Matched Lenghth Constraint h... I guess that kind of goes against the theory that thicker tracks = lower inductance = better immunity... (?) -Original Message- From: Igor Gmitrovic [mailto:[EMAIL PROTECTED]] Sent: Friday, 16 August 2002 11:43 AM To: Protel EDA Forum Subject: Re: [PEDA] Matched Lenghth Constraint Danny, wherever you have a change in the inductance, i.e. track width, you will get reflections. In such conditions yo could get standing waves as well, although I don't think that working frequencies on your board are so high to be affected by this. Wider track is equivalent to a broadband antenna. It would then pick up more noise. So you don't really want wider tracks or variable track width. A good thing to do would be a short track with as few corners as possible and no vias. To increase the immunity try shielding the net with a polygon plane as much as possible. Igor -Original Message- From: Danny Bishop [mailto:[EMAIL PROTECTED]] Sent: Friday, 16 August 2002 10:31 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Matched Lenghth Constraint Joel I appreciate your thoughts, however I don't think I quite got my reasoning across as far as my motivation for thinning down a thick trace in some areas to fit. In this particular case there is one edge sensitive net that goes to 4 logic gates on a board that is otherwise relatively free of critical traces. My reasoning behind fattening up this trace (to the point of placing fills where possible) is to reduce the inductance of the net where possible in the hope that it's susceptibility to EMI will reduce. Now I suppose that as far as EMI immunity is concerned reflections are less important (?) particularly considering that this particular signal should only trigger in a fault condition and shut down the circuit. In a more general case however if this had a clock on it I wonder if the introduction of these impedance changes along a trace would increase or reduce reliability (particularly with EMI). cheers -Original Message- From: Joel Hammer [mailto:[EMAIL PROTECTED]] Sent: Friday, 16 August 2002 1:51 AM To: Protel EDA Forum Subject: Re: [PEDA] Matched Lenghth Constraint Danny, I have always been under the belief that if you make a part of a trace/track thin you might as well make the *entire* trace/track that width. (holding even more true in power ground runs. in which case the thin run could almost act as a fuse.?) If anyone can share logic otherwise I would really be interested in hearing it. Or am I safe in what I think to be true? - Original Message - From: Andrew Jenkins [EMAIL PROTECTED] To: 'Protel EDA Forum' [EMAIL PROTECTED] Sent: Thursday, August 15, 2002 10:02 AM Subject: Re: [PEDA] Matched Lenghth Constraint -Original Message- From: Danny Bishop [mailto:[EMAIL PROTECTED]] ... I wonder what conclusion we can draw from any potential benefits of using a thick trace for a tricky trace, but thinning it down when required to get through tight spots? I suppose that might depend on how one thins the trace. Under certain conditions, I think such a thinning might very well result in an unanticipated reflective interface. That is, if one doesn't take UltraCad's analysis as canon, IMO, a safer thinking process than simply bleating a path to success ;^) aj ** ** * Tracking #: 74A48E38F8030A4DAB0A361931AAA163D71A3EB1 * ** ** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Matched Lenghth Constraint
I would not recommend anyone to use 90deg corners as you will run into the emc problems. Igor -Original Message- From: Narinder Kumar [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 14 August 2002 9:50 PM To: Protel EDA Forum Subject: Re: [PEDA] Matched Lenghth Constraint Hi Mr. Malik, 1 . Connection at 90 degree means the trace will place at at 90 degree on bending like ___ ! ! -! 2 45 degree mean on bends trace will be 45 degree 3 Rounded mean on bends the trace will be rounded. And 66 MHz is not so high so you may use any one you like. Narinder Solectron Invotronics - Original Message - From: Adeel Malik [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Tuesday, August 13, 2002 9:36 AM Subject: [PEDA] Matched Lenghth Constraint Hi All, I want to apply a matched-length constraint to the signals connected to the bus. In the Protel Design Rule dialog, there are mainly 2 parameters to specify, one is Tolerance (whose purpose is obvious) and the other is Connection style. In connection style there are three options 1) 90 degree 2) 45 degree and 3) Rounded. Alongwith them there are also options of Amplitude and Gap.I couldn't understand these options so Can someone tell me how these options are utilized effectively while routing a bus running at 66MHz. Regards, ADEEL MALIK * Tracking #: 0E65D282D6969F409D601E4E0E422F8499FF2F09 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] P99SE lockups
Hi Kat, Do Edit-Paste special and tick on Duplicate designators. Tick off Keep Net Name. You could also do Paste Array. Igor -Original Message- From: Katinka Mills [mailto:[EMAIL PROTECTED]] Sent: Sunday, 11 August 2002 9:48 PM To: Protel EDA Forum Subject: [PEDA] P99SE lockups Hi all, I am just starting to have problems with P99SE, I have a design, it is a simple 2 layer board, but it is having problems : #1 Auto Routing crashes protel on this design. (Access violation) #2 Routing one net at a time, causes the entire board to be routed and crashes protel. (Acess violation) Not sure why it does the whole board when all I asked it to do was one board. Also does anyone know how to panalise in P99SE (not a gerber as the fab shop wants it in P99SE format, but I have to panalise the 2 designs) I tried to make an outine of the panel and then cut and paste the PCB's in the panel, but all my component ID's change eg R4 may be come R4_3_1 etc. Regards, Kat. ** K.A.Q. Electronics. Electronic and Software Engineering. Perth, Western Australia. Ph +61 (0) 419 923 731 ** --- Outgoing mail is certified Virus Free. Checked by AVG anti-virus system (http://www.grisoft.com). Version: 6.0.381 / Virus Database: 214 - Release Date: 2/08/2002 * Tracking #: 7D6125021AA88C479868EF45654F4555BFC8908D * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Not DXP or P99SE, but have you seen the Cadence offer! !!!
Vincent, My two bit(che)s in reply: See inserts Igor -Original Message- From: vincent mail [mailto:[EMAIL PROTECTED]] Sent: Friday, 2 August 2002 6:42 AM To: Protel EDA Forum Subject: Re: [PEDA] Not DXP or P99SE, but have you seen the Cadence offer! !!! Darryl Newberry wrote: Ah, but does Cadence offer semi-functional, non-extensible, and pathetically slw 3D viewing? Or automated online submission of your precious Get a PIV-2.53 ghz with a gig of RDRAM If you want realtime 3d play quake or doom or duke nukem. Board layout is not about 3d viewing. Bit(ch) 1: We have a purposeful 3D interface between Protel and our Mech CAD. It is not Protel 3D, but it is 3D and can't live without it. design data to dozens of unknown PCB vendors? Or half-assed SPICE and SI simulations that make your entire computer system unusable for other tasks? Does it offer a proprietary (but broken) multi-user sharing and permissions scheme? How about metric conversion that changes your XY locations without use imperial like the rest of the world. Bit(ch) 2: Are you joking? Where is your Smiley sign? Which world do you live in? warning? Limitation of 16 hole sizes in the drill table? All these benefits and more are yours with Proteland probably with DXP too! IMO Specctra kicks all kinds of major bootay. No comparison to anything else I've ever seen. Even using default settings the route quality is comparable to manual design. pet . wrong answer. i'll get you a couple of 5.4 GHz strip line designs and we'll see how good your router does on them. If you make your daily living routing PCBs (note that I don't), I'm sure Specctra will easily pay for itself in reduced layout time, with the caveat that you have to become expert at scripting (DO files) to get the most out of it. autorouters suck . including specctra. they can't even route a ingle sided board decently . they are great for all digital boards. analog noise sensitive precision electronics . no way jose ! BTW, anybody going to join Altium's DXP list? I bet the real reason they are creating their own list is so THEY can filter and control the distribution. I prefer to bitch here in a public forum where the world can read about it. well , feel free to bitch about this email too if it makes you feel happier ** ** * Tracking #: 9F99C2AB242EB74C8A0A5720AFFABE62032500E6 * ** ** -- -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- _ // Vincent Himpe // _ ___/ Lab Manager / \ \ / / /ST Microelectronics /___\ \ / / / 5510 Six Forks Road . Suite 200 /__//_/__/ Raleigh NC 27612 Tel : (919) 850 6070 Fax : (919) 850 6689 e-mail : [EMAIL PROTECTED] -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] DXP schematic, any good?
Matt, Protel has a bad track in documenting their 'features', but this one is in a Protel 99SE book, page 80, although it is somewhat unclear that the wire is in fact a polyline. And I am sure it is in previous editions' books as well. Igor -Original Message- From: Matt Pobursky [mailto:[EMAIL PROTECTED]] Sent: Friday, 2 August 2002 12:36 AM To: Protel EDA Forum Subject: Re: [PEDA] DXP schematic, any good? On Thu, 01 Aug 2002 13:02:12 +1000, Ian Wilson wrote: The ability to break a wire is already sort of there (in P99SE) - you have to split the wire first. If you click (as if you are going to move it) on a wire and then hit the INS key you will add a vertex. You can then delete the wire you no longer want. Arrgghh! Why didn't anyone mention this before? It would have helped me immensely over the past few years! I guess it's another one of Protel's stealth features... ;-) This brings me to one of my biggest gripes about Protel in general: Documentation and Help files. Coming over from the Orcad world a few years ago, I was disappointed by both the written manual and Help files for Protel vs. Orcad's documentation. I find it much more difficult to find *complete * listings of how all commands work, options and even what's possible. It seems I've found many more answers on this list or just saying to myself there MUST be a way and poking about. Not very efficient though. I've been through all the tutorials, manuals, pdf docs, Help files, etc. It seems like you have to work really hard to find what you're looking for. I also find the indexing on the help files to be less than brilliant -- too few keywords and associated links -- you need to already know the command you are looking for or you're out of luck. Matt Pobursky Maximum Performance Systems * Tracking #: 3CAE0CE3A730AD449200AC0DE6A59CA46E6A130D * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Speaking of Protel Bugs. - Flame start!
Ian, well said. People have tried to hint before that it has gone over the top. Igor -Original Message- From: Ian Wilson [mailto:[EMAIL PROTECTED]] Sent: Thursday, 1 August 2002 6:51 PM To: Protel EDA Forum Subject: Re: [PEDA] Speaking of Protel Bugs. - Flame start! On 11:24 PM 31/07/2002 -0700, JaMi Smith said: - Original Message - From: Tony Karavidas [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Wednesday, July 31, 2002 10:09 PM Subject: Re: [PEDA] Speaking of Protel Bugs. As others have told you, there are reasons some programs misbehave when they are not the root cause. You really havn't understood all of the posts to this thread, have you? I've had enough of your rudeness. A lot of people have been trying to be constructive in the face of what is simply rudeness. I firmly think you should go back over the emails you have sent over the last few weeks and the replies. This is especially galling as some of us have gone out of our way to assist you and you simply throw back flack. I have not been responding to the goading you have been attempting. It is beneath me. I have admitted that I made a mistake in thinking you were beta testing DXP. Your were not. I was wrong, I said so. I am not sure you on going attitide is related to that but if it is please lets move on. However, your insistence that you are right in some matters that are, frankly, a matter of opinion, is simply foolish and damaging to your standing. You seem to want to call all aspects of Protel that do not conform to your way as bugs. Witness: 1) You have a preference for the PgUp and PgDn zoom actions to re-centre the screen. You call this a bug. Others prefer it. Others are told they are wrong. You make a claim the *my* server, that I wrote to calm your original onslaught on joining this forum some time ago, was an admission by me that it is a bug. And then you denigrate my denial that it is anything of the sort. I did you a favour, OK pal. I spent my time, doing something for you (yep just for you), to show you it could be done and to help you out. (Tue, 23 Jul 2002 16:32:34 -0700) 2) You have a problem with a mouse and key shortcuts. This is in fact a known bug in Protel but the solution is related to bugs in the mouse driver that you were supplied with your computer. Known driver bugs. Known solution. Yet you harp on this endlessly. Others attempt to explain this in a calm manner. You SHOUT at them. (Wed, 24 Jul 2002 21:57:21 -0700) 3) You call the formatting in Protels PP format a bug. Others are able to use the PP format but you can't, so it is a bug. Sure, you have to structure you library correctly. Bug exactly what is a bug. (Are right-hand drive vehicles buggy, BTW?) 4) You made a statement that implied you were surprised when someone came back with a contrary view to yours some time later. You had taken their previous silence as you having convinced them (rather than the more likely case of you having simply annoyed them). (Fri, 26 Jul 2002 14:18:43 -0700) 5) You repeat statements in a fashion only likely to raise tempers, and do nothing for sensible discussion (Wed, 31 Jul 2002 21:51:38 -0700) 6) You confuse motives, and then argue over the denials. (Tue, 30 Jul 2002 10:44:46 -0700). This gives me the appearance of arrogance, maybe you do not wish to convey that. 7) You are very ready to get personal. (Thu, 25 Jul 2002 00:40:59 -0700). What is especially galling about this is that the subject at the time, that you attempted to confuse (deliberately or not) are not related. The auto-pan bug in Protel is not related to the manner in which PgUp and PgDn zoom operates. 8) You confuse missing features with bugs in the program and then proceed to add snipe comments within your email (Tue, 23 Jul 2002 15:23:08 -0700) I think, you need to: a) learn to separate bugs from other failings b) stop being rude and arrogant c) start discussing things in a sane fashion Other issues: 1) referring to DXP you stated Realistically, it will almost surely be released prior to October 1st, whether it is ready or not, so as to comply with the promises made to all those who bought into ATS, so that they will sign up for yet another year. (Thu, 11 Apr 2002 15:40:44 -0700). I do not recall seeing a public admission that you were wrong by three quarters of a year. 2) In contrast to some of your recent statements (re: Protel on a new Dell computer with new mouse etc), you have previously stated To give credit where credit is due, the undocumented feature dates back far beyond Microsoft and Bill Gates to at least the early days of IBM. (Thu, 11 Apr 2002 15:31:10 -0700) The quote goes on...and the context here is not as simple as this brief quote suggests. Point is, you have recognised that software is not perfect, yet in some recent claims you have suggested that your new Dell with your new mouse was not the source of the
Re: [PEDA] DXP Discussion
And it looks like beta v2 to me. Igor -Original Message- From: Andrew Jenkins [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 31 July 2002 10:01 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] DXP Discussion -Original Message- From: Rene Tschaggelar [mailto:[EMAIL PROTECTED]] You're wrong. The NDA applies for afterwards too. The NDA covers the NDA too, I guess. The beta was a lot of tiring work, so let's forget about the beta and focus on the release. You do your purchase decision on the release and not on the beta. Not if the release is a beta. aj * Tracking #: 541D12CB1599CE4FA9E4170599E6696227A707AD * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] rectangle hole?
Tim, if you use those holes just for the mechanical fixing points, you can create them by using Fills in the footprint. If you want to plate them through, there are some PCB manufacturers doing it on request. If you want to create them as pads, that is not possible. You will have to wait until DXP SE(sixth edition). Igor -Original Message- From: Tim Fifield [mailto:[EMAIL PROTECTED]] Sent: Thursday, 1 August 2002 2:26 AM To: Protel EDA Form Subject: [PEDA] rectangle hole? I'm creating a connector footprint with two rectangle holes or slots for mechanical stability. How do I create rectangle holes? Tim Fifield * Tracking #: F043784119037E49B6F4845F2C828DF67ED2F5AD * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Altium Release Protel DXP
So the saga continues. You can bet their sales guys are happy. They have new shiny interface to sell. Gether all you vain engineers. There are new glass perls and DXP mirrors in the shop. Igor -Original Message- From: John Ross [mailto:[EMAIL PROTECTED]] Sent: Monday, 29 July 2002 9:39 PM To: Protel EDA Forum Subject: [PEDA] Altium Release Protel DXP Just D/L it Altium, Thanks for the proper metric support, NOT! in SCH for PCB directives layout. First thing I tried, as the lack of PCB rules definition in SCH their translation in 98/99/SE was years behind anyone else. Metric values entered are auto converted to imp units after they are saved. Once in PCB and converted back, you guessed it, 1mm becomes (ex. 1.1 mm) so I think it is fair to assume we can still expect the usual rounding errors in layout throughout. As well as all the other 'LOW' priority things that bug me on a daily basis. But the UI is now nice shiny... Best Regards John A. Ross RSD Communications Ltd 8 BorrowMeadow Road Springkerse Industrial Estate Stirling, Scotland FK7 7UW Tel +44 [0]1786 450572 Ext 225 (Office) Tel +44 [0]1786 450572 Ext 248 (Lab) Fax +44 [0]1786 474653 GSM +44 [0]7831 373727 Email [EMAIL PROTECTED] WWW http://www.rsd.tv == -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] Sent: 29 July 2002 11:00 To: Protel EDA Forum Subject: Re: [PEDA] Altium Release Protel DXP ( What is new in protel DXP?) This message is in MIME format. Since your mail reader does not understand this format, some or all of this message may not be legible. --InterScan_NT_MIME_Boundary Content-Type: multipart/alternative; boundary=_=_NextPart_001_01C236E6.C50EBA90 --_=_NextPart_001_01C236E6.C50EBA90 Content-Type: text/plain; charset=big5 Now, I have got it. Visit www.protel.com for detail. -Original Message- From: Dennis Saputelli [mailto:[EMAIL PROTECTED]] Sent: Wednesday, July 17, 2002 11:56 PM To: Protel EDA Forum Subject: Re: [PEDA] What is new in protel DXP? i am surprised that protel itself is not touting more specific feature enhancements maybe they don't know either or maybe they will pull broken features in the interest of shipping so they don't want to say they won't let the beta testers say anything (I am not one, i can say that can't i? or will a jolt from OZ travel up the net and strike me down through my fingertips?) at this stage, with beta just beginning, i would think it will be six months to a year before DXP is more than crashware or vaporware to continue my cynicism this might be a good time for them to start a complete rewrite of DXP! then it might be out timely Dennis Saputelli Yu-Ming Luo wrote: Hi, All, Does any one know what is new in Protel DXP? Does DXP support customized layer pairs? If the special string .Designator and .Comment had been replaced with .Des .Com or not, as someone had suggested before. I've expected these features for so long. Best Regards, Luo. ** ** * Tracking #: 496D2441F1D70F46BB1E0DE93F05F8A7B9C1C50A * ** ** -- __ _ www.integratedcontrolsinc.comIntegrated Controls, Inc. tel: 415-647-04802851 21st Street fax: 415-647-3003San Francisco, CA 94110 --_=_NextPart_001_01C236E6.C50EBA90 Content-Type: text/html; charset=big5 Content-Transfer-Encoding: quoted-printable !DOCTYPE HTML PUBLIC -//W3C//DTD HTML 3.2//EN HTML HEAD META HTTP-EQUIV=3DContent-Type CONTENT=3Dtext/html; = charset=3Dbig5 META NAME=3DGenerator CONTENT=3DMS Exchange Server version = 5.5.2653.12 TITLEAltium Release Protel DXP (RE: [PEDA] What is new in protel = DXP?)/TITLE /HEAD BODY PFONT SIZE=3D2Now, I have got it./FONT /P PFONT SIZE=3D2Visit www.protel.com for detail./FONT /P PFONT SIZE=3D2-Original Message-/FONT BRFONT SIZE=3D2From: Dennis Saputelli [A = HREF=3Dmailto:[EMAIL PROTECTED];mailto:dsicon @integrate= dcontrolsinc.com/A]/FONT BRFONT SIZE=3D2Sent: Wednesday, July 17, 2002 11:56 PM/FONT BRFONT SIZE=3D2To: Protel EDA Forum/FONT BRFONT SIZE=3D2Subject: Re: [PEDA] What is new in protel = DXP?/FONT /P BR PFONT SIZE=3D2i am surprised that protel itself is not touting more = specific feature/FONT BRFONT SIZE=3D2enhancements/FONT BRFONT SIZE=3D2maybe they don't know either or maybe they will pull = broken features in/FONT BRFONT SIZE=3D2the interest of shipping so they don't want to = say/FONT /P PFONT SIZE=3D2they won't let the beta testers say anything (I am = not one, i can say/FONT BRFONT
[PEDA] 3D models
Has anyone got 3D models for QualECAD's 3D View other than the sample ones available from QualECAD? Igor * Tracking #: 90D0420EA8562A48BA6FE3E9BBC03868CFDDF957 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Speaking of Protel Bugs.
Jami, don't take it personally. This is a discussion forum and not a winner-gets-to-live arena. We have several Dell machines with identical HW and identical SW. The only difference are the M$ and Protel licence numbers. Some (in fact only one) have mouse problems in Protel, some don't. So, what's a problem here? Igor -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Friday, 26 July 2002 9:11 PM To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] Speaking of Protel Bugs. Gisbert, Please se my response intermixed with your comment - JaMi - Original Message - From: [EMAIL PROTECTED] snip When you install a piece of hardware (e.g. a mouse), the driver software either goes with the hardware product, or you may chose to install the Microsoft driver (if supplied). I'm with you so far, but I believe that you already missed the problem - I did not install any Microsoft Mouse or Intellimouse Software - It came with the system - Like buying a car - it came with standard equipment - I did not install a new transmission - I did not install a new Mouse - I did not install a new Mouse driver. My company bought a standard system with a standard mouse and a standard mouse driver. That standard system was a Dell, that standard mouse was a Microsoft Wheel mouse, and that standard mouse driver was Microsoft Intellimouse. The application SW (like Protel) should not need to mess around with any special HW feature (like it used to be in old DOS times), Yes, Yes, I agree One Hundred Thousand Percent. Continue. but just call system (Windows) functions and leave the rest to the OS. Yes, Yes, Yes, Yes, Yes, Yes, Yes, Yes, Yes, Please Continue. I am just a simple-minded hardware developer, but if you state that the application works fine No, No, No, No, No, No, No, No, No, No, No, No, No, No, No, No! Thats the Problem - it didn't work - Protel crashed! PROTEL CRASHED - AND ONLY PROTEL! with a Logitech mouse and does not with a Microsoft mouse, there cannot be any question about who is to blame. Well - Lets stop and look at this for a minute. The Microsoft Mouse is in fact the Industry Standard Mouse. Apple stole the design from Xerox PARC (Palo Alto Research Center) and tried to say that they invented it, and even tried to sue Microsoft, but lost. Microsoft is and has always been the defacto standard mouse in the industry ever since the mouse has been used as an input device (and yes I do have a Microsoft Bus Mouse). If you don't like this assesment, don't blame me, go talk to all of the other mouse manufacturers in the world who put the words Microsoft Compatible on all of their mouse products. Enter Logitech. Logitech made a Mouse with Three Buttons. From the very first day, the Logitech Mouse was never compatible with the Microsoft Mouse or any of the Microsoft Mouse Drivers. However, Logitech did make their own Software Drivers for their Logitech Mouse that made their Logitech Mouse act like a Microsoft Mouse, and in that sense, the Logictech Mouse was deemed to be Microsoft Mouse Compatible. Logitech has always had their own Mouse Drivers which have thru the years have kept the Logitech Mouse compatible, although today, the actual Logitech Mouse and Microsoft Mouse are actually somewhat (although not completely) hardware compatible. From the perspective of virtually all systems around today except Apple, Microsoft developed the mouse, and Microsoft also developed the mouse driver. Microsoft is the standard. OK - So here we are with a standard Dell System, and a standard Microsoft Wheel mouse, and a Standard Microsoft Mouse Driver - Let us please continue. (Please note that while there is a parallel post arguing that Dell shipped an older driver with the system (and I will answer that post seperately), there appears to have never been any asertions by anyone, including the author of that post, that any Dell system ever at any time had any problem with any other applications while it had that mouse driver except for Protel.) I have no preference for any OS; I want a working system, that's all. Protel does have preferences, but Windows 2000 is one of them, lets continue. I just don't care about who writes drivers, be it the OS people, be it the hardware supplier. Yes, Yes, I agree One Hundred Thousand Percent. Continue. I dare to demand from SW the same as anyone takes for granted from any HW product they purchase: it shall function as specified. Yes, Yes, I agree One Hundred Thousand Percent. THIS is why I say that Protel has the Bug! In consequence: If Microsoft mice don't work with Microsoft SW (MS is the OS provider, But in fact the Microsoft Mouse does in fact work CORRECTLY with my Dell system and with My MS OS and EVERY OTHER APPLICATION that I have ever run on it. O N L Y P R O T E L C R A S H E S ! ! ! ! ! N O T H I N G B E S I D E S P R O T E L C R A S H E S ! ! ! ! don't buy mice
Re: [PEDA] Refdes on other Layers
We had no problems with designators on mech layers. Igor -Original Message- From: Steve Wiseman [mailto:[EMAIL PROTECTED]] Sent: Thursday, 25 July 2002 6:06 PM To: Protel EDA Forum Subject: Re: [PEDA] Refdes on other Layers 25/07/2002 06:11:53, Waldemar Kulajew [EMAIL PROTECTED] wrote: -- snipp -- In any case, we now see why changing the layer of a refdes is a VERY BAD idea, at least with the current software! you talked about this behavior during this thread. I searched the Buglist buthave not found anything about Problems with refdes on other Layers. Could you please explain more about it? I certainly didn't know it was a bad plan (otherwise I wouldn't have done it), but it looks as if Protel takes layer information from the component from which layer the refdes is on. I've been putting the refdes on various mech layers, and suffering from the problem I've been discussing here. Coincidence? As soon as I can generate a small test board that exhibits this, then I'll bug-report it (but, for the moment, I'll leave the refdes on the originial layer, and accept the slight inconvenience). Steve Wiseman * Tracking #: 4E977D934496BE428BB3D177D2023656B7F1F07F * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Fastest possible Protel system (LATEST)
Brian, my bit to you is: 1. Use dual digital interface video card with LCD monitors. You will be able to work longer ours. Apparently you will need that. You don't need many colours, so colour processing speed is not an issue. You want stable image and no flicker. 2. M/B with 266MHz or higher memory bus speed. QDR is a relatively new thing and therefore insufficiently tested. It's up to you. If it works, then you are one up. 3. ATA166 hard disk. Work localy, save on the network. Buy the time you get to SCSI through the PCI there are no speed benefits. SCSI on board would help, but with the 166 MHz speed on you IDE bus, do you need SCSI? Latest IDE drives are sufficiently reliable. 4. Protel needs number machine, so I say use dual AMD. They need lot of cooling, make sure you have additional fans or, if you want to go fancy, you could install solid state coolers or liquid cooling. They NEED more cooling. 5. Logitech optical cordless wheel ergonomic mouse. Taste the freedom. BTW, I am right handed, so push mouse around with my right hand. Therefoere need Home, Page up and other keys on the left side of the K/B. Anyone seen something like that? Igor -Original Message- From: Brian Guralnick [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 24 July 2002 12:36 PM To: Protel EDA Forum Subject: [PEDA] Fastest possible Protel system (LATEST) Here is what I gathered so far: #1. Use only a consumer grade NVIDIA based GF3, or GF4. With Protel's auto-pan problem, which differs from video card to video card, I can't even be sure that the work station grade NVIDIA cards will not create any unforeseen auto-pan problems. #2. Use 'only' Win2K Professional. The earlier M$ os's are useless WinXP has been demonstrated to have some minor questionable issues with P99SE. #3. Dual processors seem to run fine with Protel, and may help the system run with a better consistent pace. #4. Avoid using Postscript printers, or, if have a postscript printer which can be used in a HP emulated laser printer mode, it will probably be to your advantage to run it in this mode with Protel. #5. Use Win2K's generic mouse driver instead of the fancy ones which come with most Logitech mice. #6. More ram, the better. 2GB with a 3GB swapfile should make the system run as smooth as possible. Remember, my PCB has around 10K nets. Any corrections? Any additions, clear obvious items which I may have missed? So far, I have yet to hear any real Protel speed issues comparing dual AMD VS dual Intel. Also, if I were to go with Intel, should I go DDR, or QDR. Remember, I did say fastest possible Protel system. Also, it should have the least possible problems. Brian Guralnick [EMAIL PROTECTED] Voice (514) 624-4003 Fax (514) 624-3631 * Tracking #: 8F1F3B6020E4674CBC9997FA43BC35230D5669AA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] To Forum Admin : Things getting too much OFF Topic here
a good one... -Original Message- From: Schmitt Michael [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 24 July 2002 5:45 PM To: Protel EDA Forum (E-Mail) Subject: [PEDA] To Forum Admin : Things getting too much OFF Topic here Hey Folks ... One uppon a time there was a Protel Eda Users Forum that was a goof adress for Protel related questions and answers where tip and tricks were discussed. But This Forum gets more and more a CHAT about OS related Stuff (Linux vs M$), sometimes a kind of a war (like the Protel bug discussion, can't read that anymore). well okay sometimes it is okay to ask something what experiences are out there regarding video card but ... is that realy protel related ? i realy miss Mr. Lomax whith his knowledge, but i am not wondering that he is offline when i think of the thread about him ... Please Folks, if some of you have problems like the Protel Bugs thread ... go discuss that on a privat base but this is a protel user forum that is as far as i understand it, intended to exchange tip and tricks or sometimes workaround for PROTEL yes PROTEL and not the OS. of course we can discuss whishes as we all know that protel is reading this list. but sometime these discussion go much too far and end up ... off topic the skill this forum had a while ago is not the same it has know. sometimes i realy think of unsubscribing this list. So lets go back to what this list is intended for. Regards Michael Schmitt * Tracking #: 0D77F0ED5B692E418952E67525AAB6E9D75F0573 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Kudos
It goes both ways. PTC (PRO/Engineer) are about to release a PCB design package. Igor -Original Message- From: Brian Sherer [mailto:[EMAIL PROTECTED]] Sent: Thursday, 25 July 2002 1:40 AM To: Protel EDA Forum Subject: [PEDA] Kudos I guess I'm in the minority, but I find the Protel user interface quite powerful and, for the most part, intuitively consistent across servers. The labyrinthine command interface of Autocad and PCB packages using a similar interface (like Pads) are tedious and extremely trying. Protel is missing a bet by not offering a stand-alone full-featured Mechanical CAD package based on the 99SE interface. But *Please*, Protel, be sure to maintain full two-way file conversion with all ACAD File Formats ever released! Brian * Tracking #: 732E05315EAC2942A3FEB2F75BD40D71CF4E8FD5 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Kudos
Only a vague statement from their rep. We are looking into exchanging design info between Protel and Pro/E and he said they will release some kind of PCB package, without any details. I think he said it would be their own SW, there was no mention of third party involved. Igor -Original Message- From: Ian Wilson [mailto:[EMAIL PROTECTED]] Sent: Thursday, 25 July 2002 10:19 AM To: Protel EDA Forum Subject: Re: [PEDA] Kudos On 09:03 AM 25/07/2002 +1000, Igor Gmitrovic said: It goes both ways. PTC (PRO/Engineer) are about to release a PCB design package. Igor I couldn't find any reference to a PCB pkg on the PTC www site. In past news stories they have said they are not going into that market. They are setting up links with Cadence and mentor for design management interfaces etc but I could see nothing about a PCB package. Have you got more info on this? Ian * Tracking #: CC391BFF99C1F84CBBA1B0FF0CA3CF07C71D132F * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Kudos
Brad, that was just an aside bit of info, not directly related to our initial topic of design info exchange. I guess he was trying to attract our interest into their new offering, trying to get more sales. It was a promo for new product. Igor -Original Message- From: Brad Velander [mailto:[EMAIL PROTECTED]] Sent: Thursday, 25 July 2002 11:08 AM To: 'Protel EDA Forum' Subject: Re: [PEDA] Kudos Igor, this sounds like possibly the rep is just talking about a Protel/ProE mechanical interface utility like they have for PADS, CADENCE, MENTOR, etc., etc.. I think that you and the rep are talking to each other but each has their own concept in their mind for two different things. The key word that you used is exchange. That is not the same as import or covert. I would expect a module which allows PCB and mechanical databases to be passed between ProE and Protel. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com -Original Message- From: Igor Gmitrovic [mailto:[EMAIL PROTECTED]] Sent: Wednesday, July 24, 2002 5:34 PM To: Protel EDA Forum Subject: Re: [PEDA] Kudos Only a vague statement from their rep. We are looking into exchanging design info between Protel and Pro/E and he said they will release some kind of PCB package, without any details. I think he said it would be their own SW, there was no mention of third party involved. Igor * Tracking #: 8D82820BD7D30D4CBD06C7A092EAA233C881636E * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Speaking of Protel Bugs.
Ivan, Writing dates as MM/DD/YY is the same as writing time as HH:SS:MM. It does not seem logical. There should be linear ascendence or descendence in the order of things, IMO. In Australia we have 240V/50Hz. Compared to your 120V/60Hz. We could discuss frequency, but one thing is sure, the current in your system is twice as high as in our system. That means your losses are four times as high. Whatever you do, you will always have higher electricity costs. It might not seem a big to you as an individual. On a national scale, it costs all of you a lot of dough. Metric system is based on a decimal numerical system, which is natural to humans. So we have reasons for what we are doing. What are your reasons for the things you do? You are just used to? Igor -Original Message- From: Bagotronix Tech Support [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 24 July 2002 12:24 AM To: Protel EDA Forum Subject: Re: [PEDA] Speaking of Protel Bugs. Is this what happens when you write software applications down under when everyone at Microsoft in Belview Washington is at home in bed and cannot answer your technical questions about the software? Maybe the down under has something to do with it? ;-) From one episode of the Simpsons, when Lisa is helping Bart study for a geography test, he looks at a globe and says hey, I didn't know there's an island called Rand McNally in the Pacific Ocean. Lisa tells him that in Rand McNally, everyone walks on their noses, and hamburgers eat people. To which Bart replies Cool!. rant on I also don't like the way dates are written in other parts of the world. I frequently see dates written as YY/MM/DD (Canadian) and as DD/MM/YY (British). Why can't we all agree on MM/DD/YY as THE one true correct standard? When you use dates in a spoken sentence, you say July 23, 2002. So why not write it that way numerically? rant off Now, if we could just get everybody to drop that metric and 220V 50Hz crap... ;-) Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com - Original Message - From: JaMi Smith [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Cc: JaMi Smith [EMAIL PROTECTED] Sent: Tuesday, July 23, 2002 4:36 AM Subject: Re: [PEDA] Speaking of Protel Bugs. * Tracking #: FEA6A5084AAA1B4FBBCEA608A0CD8D2459FF9143 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Speaking of Protel Bugs.
Agree with Toni. I like it, too. Igor -Original Message- From: Tony Karavidas [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 23 July 2002 12:48 PM To: Protel EDA Forum Subject: Re: [PEDA] Speaking of Protel Bugs. -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Monday, July 22, 2002 7:23 PM To: Protel EDA Forum Cc: JaMi Smith Subject: [PEDA] Speaking of Protel Bugs. Speaking of Protel Bugs . . . What are the odds on whether your favorite Bug has been fixed in DXP? 1. ) I am betting that the Keyboard / Mouse problem that has been there since Protel 98 has not been fixed. What problem is this you're talking about? 2. ) I am also betting that the anti-intuitave panning is still there (yes Ian, I know that you like it, and I know that you wrote a routine to fx it, but it still is backwards and unlike no other system in the world). What is not intuitive about their panning? It seems to work pretty well. Have you ever tried to pan in MS Excel? As soon as I move my cursor to the bottom of the screen, I'm in cell 22,305! Talk about crappy panning. 3. ) I am also betting that Protel's Print Dialogue box is also still backwards as compared to the rest of the world (For those that don't consider the way that Protel handles printing a bug, go play with Adobe Acrobat (or any other Windows Application) for a while then come back to Protel to see how it it is not done right). Also, show me one other major application in the Windows world that has a Print Icon on a toolbar that invokes a Printer Dialog Box that will not print anything at all, as the one in the PCB 3-D View (It only does printer setup). That's because printing is much more complex in P99. There are numerous layers and options to consider, so when you press the print icon, the app will focus onthe PCBPrint process. You can then chose what you want to print from there. I think it's fine. This isn't just another typical Windows app. Why should it act like one? People like the special way Protel handles selection vs. focus. Name another app that does that. Speaking about the ability of any other Windows Application: I really HATE IT when I'm working on a document in MS Word and I decide to change my print driver for HP Laserjet to Acrobat and all my FRICKIN' PAGE FORMATTING CHANGES!! You what that to be our MODEL for success. Please! Why can't MS word and these damn print drivers just print what I see on my screen!??? Why does my screen change when I change drivers?? What a PITA that is! 4. ) I guess my one real question will be what have the done with Schematic. Will it still act like a bastard sibling that has been hastily patched into a system where it is totally foreign function wise, or have they actually taken the time to properly integrate it into the environment so that things like panning, zooming, and function keys, will work the same as within the other applications. When I saw it at the PCB show several months ago, it did the things you mentioned (Panning and zooming) I'm not sure what you mean about the F keys. Who's giving what odds? What else do you have for the list? No fair on you guys who have been beta testing letting the cat out of the bag. Cat's still in the bag... ;) JaMi Smith [EMAIL PROTECTED] * Tracking #: 194767ADA7AA1E4E85C23695D58B302A7C6D1DC3 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Using library
See the inserts. Igor -Original Message- From: Ferdinando Bignamini [mailto:[EMAIL PROTECTED]] Sent: Monday, 15 July 2002 5:07 PM To: Protel EDA Forum Subject: [PEDA] Using library Hi, I've some question about the library system of Protel in a shared evnironment. A- It's possible to define some global library and local library for a project? At now I haven't find a solution... Yes, you can connect as many libraries to your Protel station as you like. Some of them might be on the network, some on the local drive. Each Protel station can have different libraries connected. You could also have a library inside your_project.ddb. B- How It's possible to avoid invalidity of data in a library when tow people modify the library at same time... You could lock the file. That means that only one person at the time has write privileges to the file. We only allow write privileges to our main library to the administrator. It's better there's only one person who can modifying the library in the work group and all the other modify a local library and after all they ask them to upgrading the global library? That's the way we do it, or rather, quite similar to what we do. C- It's better we use the M$-Access database format or the Windows File system?. We use Access file format for security and space saving reasons. Access file format takes up only a third of the drive space when compacted, compared to the Windows format. D- We have used already the M$-Access database, but some time the files being destroyed by Protel (we use Protel 99SE): have you encountered the same problem? If affermative: have you reach to avoid this so strange trouble? If your database gets corrupted you could do a 'Repair database'. Look into the help files or the book. Thak's in advance. You are welcome. ing. Ferdinando Bignamini INTEA ENGINEERING S.R.L. Via chiusure 32 25057 Sale Marasino (BS) ITALY * Tracking #: DD47D4ED684C0C44B8CE7CF1B3681E98B719E907 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Re[2]: Drag Selection in PCB Editor
Jon , it is supposed to drag track endpoints. Does not drag selection. Hope you did not pay ATS. Igor -Original Message- From: Jon Elson [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 10 July 2002 5:08 AM To: Protel EDA Forum Subject: Re: [PEDA] Re[2]: Drag Selection in PCB Editor Igor Gmitrovic wrote: Jon, in PCB Editor you go to Tools-Preferences-Options-Component Drag and choose Connected Tracks mode. That would enable you to drag tracks. It works as it always did, since the DOS times. I have W2K and P99SE SP6. It drags the first segment of the track connected to the component. And while you are in the drag mode, you can't rotate the component. That's something I never really liked. Maybe someone would like to put that on the list for the DXP release. For me, with the ATS and the inflated pricing expected for the DXP, upgrade is a very, veeery distant possibility. Yes, I know how to enable the VERY limited drag tracks with component feature in Protel, but it is VERY limited! I want to be able to drag tracks with a selection, and maybe have the option of dragging all tracks that pass through the region, as well. It really does a poor job of this. I also seem to remember that it drags the tracks, rather than dragging the track ENDPOINTS, which would be MUCH more useful. That would keep the tracks connected. How about selecting a bunch of track segments, either within region or by toggle selection, and then doing a drag on all of them, just like it does a drag on one track. I seem to remember that it can't do this, either. It breaks the tracks rather than rubberbanding the connected track segments. Jon * Tracking #: 4450EECD84E6E2428C98565349B87E8177AC1421 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Re[2]: Drag Selection in PCB Editor
Jon, in PCB Editor you go to Tools-Preferences-Options-Component Drag and choose Connected Tracks mode. That would enable you to drag tracks. It works as it always did, since the DOS times. I have W2K and P99SE SP6. It drags the first segment of the track connected to the component. And while you are in the drag mode, you can't rotate the component. That's something I never really liked. Maybe someone would like to put that on the list for the DXP release. For me, with the ATS and the inflated pricing expected for the DXP, upgrade is a very, veeery distant possibility. Igor -Original Message- From: Jon Elson [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 9 July 2002 4:15 AM To: Protel EDA Forum Subject: Re: [PEDA] Re[2]: Drag Selection in PCB Editor Brad Velander wrote: Yuri, yes your suggestion would be the way that I performed that task. I believe that the drag function does not drag connected tracks, only the component. So I guess it is not truly a drag function in terms of routed connections. Yes, and I really MISS it! Protel used to do this, back in the Win 95 days. Accel's tango did it very well, too. I used to do this when tightening up a design after a first run at routing it. Jon * Tracking #: 04CCC151F2BE4841B9A522EDEEBC8AE8E398D61A * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Fwd: OS bugs WAS: Problems with schematic annotate function. Linux Added.
Don, for the same reasons I see Protel (ie Altium) starting to lose thier user base. With the ATS useless and increase in prices people will start looking elsewhere. How could they explain charging us for the ATS and then they claim to stop support for the P99SE. What do they want us to pay them for? What bugs have they fixed so far, does anyone know? Have they fixed schematic annotation? I wonder if Mr. Protel (excuse' moa, Altium) knows what's happening in the field and how much would their management care anyway. There were number of other people in this forum with the views similar to mine. If they don't change something it looks to me they are going M$ way, down. Slowly, but surely. Anyone heard of a Linux based PCB CAD program? Igor -Original Message- From: Don Ingram [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 9 July 2002 10:03 PM To: Protel EDA Forum Subject: Re: [PEDA] Fwd: OS bugs WAS: Problems with schematic annotate function. Linux Added. I agree re the move to look at Linux. Those that entertain themselves with a daily dose of the http://www.theregister.co.uk will be no doubt starting to think more along these lines. My impression of the way it is going ( for what it may or may not be worth ;-) is that Microsoft is very visibly making a direct and somewhat blind grasp at domination. Along the way it is arrogantly pushing everyone into a corner and demanding a lot of money for what, appears to be proven on a daily basis ( by the security reports), to be a rather suspect product. I think that the only thing that will come of this is that people will get their back up, as they indeed are, from Individuals and Corporations to the European Parliament. The end result is that Linux is getting one heck of a free ride. To date a number of 'alternative' products are some what 'thin', it is to be hoped that they can catch up as for all the MS bashing that takes place I still like Excel, although I could happily lose the Word2000 virus. As a Company we are now actively looking at ways of removing MS from our business equation. The harder that bill pushes, the harder that we will look elsewhere. Currently things are tolerable, however the emerging trend in their behaviour which feels like little more than common blackmail has us thinking that in the future we would be better placed by avoiding them where possible. Interesting one of our large Clients is spending money on exactly this eventuality. The wildcard is that the threat of loss of market share may push them back in their box and bring on a friendlier face ( I won't hold my breath ) Cheers Don * Tracking #: 133F7F6F53AC854893009551E19C04CA1FDD98E2 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] PCB breakoffs
I used via/hole size of 1mm/0.7mm. Could be smaller if they had sharp tool for V-grooving. Igor -Original Message- From: Danny Bishop [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 26 June 2002 2:44 PM To: 'Protel EDA Forum' Subject: Re: [PEDA] PCB breakoffs not a bad idea if you use big vias -Original Message- From: Igor Gmitrovic [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 26 June 2002 11:44 AM To: Protel EDA Forum Subject: Re: [PEDA] PCB breakoffs Ivan, you could V-groove the board and put vias on the tracks where they cross the V-groove line. Igor -Original Message- From: Jim McGrath [mailto:[EMAIL PROTECTED]] Sent: Tuesday, 25 June 2002 11:14 PM To: Protel EDA Forum Subject: Re: [PEDA] PCB breakoffs Ivan, Yes you can use FR4. I would score the board and use ribbon cable to interconnect from board A to board B. Jim Bagotronix Tech Support wrote: Hello, all: We have had our domain transferred to a new ISP last week, so e-mail has just begun working normally (I hope!). Anyway, I want to make a PCB that has a break-off area with extra circuitry on it. The idea is that some users may not need the extra circuitry, so they can break off that area of the board to reduce the size. I know this is easy for cheap PCB material (phenolic, etc.) but does this work with FR-4 and such? If this is feasible with FR-4, what technique should I use to make the break-off? I assume I will have to lay out a bunch of unplated holes spaced in a line, with traces going inbetween holes. And I assume that the way to indicate this to the fab is to put comments on the drill layer. Thanks in advance for your help. If no one replies, I will assume our e-mail still isn't working right. Best regards, Ivan Baggett Bagotronix Inc. website: www.bagotronix.com ** ** * Tracking #: FA14B7B41BC3F5459A4E929EDF87298D738F4111 * ** ** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 3D MODELS FOR PROTEL99SE
You can't do it in Protel. The solution could be to use third party SW. Try QulECAD's View3D. I find it very good. Igor -Original Message- From: Christopher Rhomberg [mailto:[EMAIL PROTECTED]] Sent: Wednesday, 19 June 2002 4:02 AM To: Protel EDA Forum Subject: [PEDA] 3D MODELS FOR PROTEL99SE Does anyone know how I can draw new 3D components for use with PCB's 3D view function. I have up to know only been able to use the default components and any new ones are just grey blocks. Regards Chris Rhomberg * Tracking #: F3A3098A6F6F204094EDFA4E60D2D3CD1C0C172F * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
