Re: [PEDA] Using P99SE schematic editor for creating general purpose flowcharts.

2004-09-30 Thread John A. Ross [Design]
 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] 
 Sent: 29 September 2004 13:28
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] Using P99SE schematic editor for creating 
 general purpose flowcharts.
 
 
 The viso comment was from my experience with Visio years ago 
 (mid 90s).
 Maybe it's gotten better, but once upon a time, clunker 
 would have been a complimentary terms, at least from me.

Aj

Ok, I have only used it since 2002 version and it was not too bad, I
used SmartDraw 3/4 before that (new versions speak 'MS Visio@ I believe)
it was basic, but amazingly easy to use but we needed some office/ms
project integration and Visio fitted the bill best, warts and all.

http://www.smartdraw.com/enterprise/visio.htm is interesting reading

John

 -Original Message-
 From: John A. Ross [RSDTV] [mailto:[EMAIL PROTECTED]
 Subject: Re: [PEDA] Using P99SE schematic editor for 
 creating general 
 purpose flowcharts.
 
  -Original Message-
  From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
  
  Um... John,
  
  Please tell me Visio was a tongue-in-cheek suggestion... 
 
 Hi aj
 
 Er no, Visio was actually a serious suggestion ;-)
 
 
 



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Re: [PEDA] Using P99SE schematic editor for creating general purpose flowcharts.

2004-09-28 Thread John A. Ross [RSDTV]
 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] 
 Sent: Monday, September 27, 2004 1:37 PM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] Using P99SE schematic editor for creating 
 general purpose flowcharts.
 
 Um... John,
 
 Please tell me Visio was a tongue-in-cheek suggestion... 

Hi aj

Er no, Visio was actually a serious suggestion ;-)

 S2F looks pretty cool up front.
 
 Have you used S2F, and if so, what are your impressions with 
 its efficacy for reverse engineering code? Is it really any 
 good at the task? How much has to be manually cleaned up 
 after app performs its conversion from code to ?
 
 Does it work with lower-level languages, ie, machine code and related?
 
 Any big caveats? Limitations? Unadvertised plusses?

Personally I do much software, my skills in that area kinda suck to be honest. 

But I have seen the reports from it and I managed to follow them, so it seems to do a 
decent enough
job in the end but any caveats on how to get to that I cannot answer. The job it was 
used on was an
embedded project and although mainly done in C it does have quite a bit of inline asm 
as well. 

But I guess the tool could not possibly be able to guess how every engineeer codes 
their own
applications and I would further guess it may fall over a little on asm stuff inline 
which is
processor specific.

Sorry cannot clarify much more

John

 -Original Message-
 From: John A. Ross [RSDTV] [mailto:[EMAIL PROTECTED]
 Subject: Re: [PEDA] Using P99SE schematic editor for 
 creating general 
 purpose flowcharts.
 
 Brian
 
 http://www.fatesoft.com/s2f/
 
 There is always MS Visio amongst others.
 
 John
 
  -Original Message-
  From: Brian Guralnick [mailto:[EMAIL PROTECTED]
  Subject: [PEDA] Using P99SE schematic editor for creating general 
  purpose flowcharts.
  
  To create software flowcharts, to date I've been using P99SE 
  schematic capture.  Sheet symbols basically were the functions  
  entering the symbols revealed the sub-layer flowchart.  Obviously, 
  these schematics did nothing electrical.
  
  Now I'm working on one of my largest software projects 
 to date, 
  involving multiple software engineers.  Should I stick 
 with P99SE's 
  schematic capture for my flowchart, or, is there a better
 utility out
  there designed for this particular task.
  
  
  Brian Guralnick
  
 
 
 




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Re: [PEDA] Using P99SE schematic editor for creating general purpose flowcharts.

2004-09-26 Thread John A. Ross [RSDTV]
Brian

Is this any help to you?

Never used it personally but it was recommended to me by someone a while back after we 
were
requested to add flowcharts to some documentation.

http://www.fatesoft.com/s2f/

There is always MS Visio amongst others.

John
 

 -Original Message-
 From: Brian Guralnick [mailto:[EMAIL PROTECTED] 
 Sent: Sunday, September 26, 2004 8:16 PM
 To: Protel EDA Forum
 Subject: [PEDA] Using P99SE schematic editor for creating 
 general purpose flowcharts.
 
 To create software flowcharts, to date I've been using 
 P99SE schematic capture.  Sheet symbols basically were the 
 functions  entering the symbols revealed the sub-layer 
 flowchart.  Obviously, these schematics did nothing electrical.
 
 Now I'm working on one of my largest software projects to 
 date, involving multiple software engineers.  Should I stick 
 with P99SE's schematic capture for my flowchart, or, is there 
 a better utility out there designed for this particular task.
 
 
 Brian Guralnick
 
 
 
 




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Re: [PEDA] XP SP2 stop Protel 99SE working ??

2004-08-11 Thread John A. Ross [Design]
 -Original Message-
 From: Ian Middleton [mailto:[EMAIL PROTECTED] 
 Sent: 11 August 2004 16:29
 To: Protel EDA Forum
 Subject: [PEDA] XP SP2 stop Protel 99SE working ??
 
 Dear all,
 
 I am seeing Protel 99SE hanging with scanning documents 
 when opening a ddb file after having installed XP SP2.
 
 Will investigate further, but SP2 looks a prime candidate to 
 have caused the problem.
 
Ian

http://www.microsoft.com/technet/prodtechnol/winxppro/maintain/sp2mempr.
mspx  

http://support.microsoft.com/default.aspx?pr=windowsxpsp2

Also a reply on the DXP forum from Altium

 snip 
Yes, we have tested DXP with XP SP2 and also XP 64-bit version. These
OS's display some problems, but only if you have a 64 bit machine. The
problems specifically are to do with scripts and VHDL simulation. These
problems should be resolved for the SP2 release.

Regards
David Wang,
Altium

 snip 

You can experience some problems if you're running DXP on Athlon64
machine with Windows XP SP2 installed.
We intend to fix these issues in SP2, till then there is an easy
workaround:
 
Right click on My Computer and select Properties. The System
Properties dialog opens. Switch to Advanced tab and click Perfomance
Settings.
Perfomance Options dialog comes up and the last tab on that dialog is
named Data Execution Prevention (DEP). There you can use Add button and
add DXP.EXE to the list of programs that are not affected by DEP.
That should fix it.
 
Best wishes,
Sergey Kostinsky
Altium
 snip 

All good fun ;-)

John



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Re: [PEDA] XP SP2 stop Protel 99SE working ??

2004-08-11 Thread John A. Ross [Design]
Joe

http://www.microsoft.com/technet/prodtechnol/winxppro/maintain/winxpsp2.
mspx#EABEAA

Or direct page

http://www.microsoft.com/downloads/details.aspx?FamilyId=049C9DBE-3B8E-4
F30-8245-9E368D3CDB5Adisplaylang=en

http://www.microsoft.com/technet/prodtechnol/winxppro/deploy/spdeploy.ms
px#XSLTsection126121120120

Is only place at the moment as far as I know.

John

 

 -Original Message-
 From: Joe Sapienza [mailto:[EMAIL PROTECTED] 
 Sent: 11 August 2004 17:22
 To: Protel EDA Forum
 Subject: Re: [PEDA] XP SP2 stop Protel 99SE working ??
 
 Excuse me for asking the obvious: I just checked and Billy 
 Gates hasn't put
 SP2 for XP up in the automatic updates section of the 
 Miscrosoft Website
 
 Hence the question Where is everyone getting SP2 for Windows XP?
 
 
 
 
 - Original Message -
 From: John A. Ross [Design] [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Sent: Wednesday, August 11, 2004 12:00 PM
 Subject: Re: [PEDA] XP SP2 stop Protel 99SE working ??
 
 
  -Original Message-
  From: Ian Middleton [mailto:[EMAIL PROTECTED]
  Sent: 11 August 2004 16:29
  To: Protel EDA Forum
  Subject: [PEDA] XP SP2 stop Protel 99SE working ??
 
  Dear all,
 
  I am seeing Protel 99SE hanging with scanning documents
  when opening a ddb file after having installed XP SP2.
 
  Will investigate further, but SP2 looks a prime candidate to
  have caused the problem.
 
 Ian
 
 http://www.microsoft.com/technet/prodtechnol/winxppro/maintain
 /sp2mempr.
 mspx  
 
 http://support.microsoft.com/default.aspx?pr=windowsxpsp2
 
 Also a reply on the DXP forum from Altium
 
  snip 
 Yes, we have tested DXP with XP SP2 and also XP 64-bit version. These
 OS's display some problems, but only if you have a 64 bit machine. The
 problems specifically are to do with scripts and VHDL 
 simulation. These
 problems should be resolved for the SP2 release.
 
 Regards
 David Wang,
 Altium
 
  snip 
 
 You can experience some problems if you're running DXP on Athlon64
 machine with Windows XP SP2 installed.
 We intend to fix these issues in SP2, till then there is an easy
 workaround:
 
 Right click on My Computer and select Properties. The System
 Properties dialog opens. Switch to Advanced tab and click Perfomance
 Settings.
 Perfomance Options dialog comes up and the last tab on that 
 dialog is
 named Data Execution Prevention (DEP). There you can use Add 
 button and
 add DXP.EXE to the list of programs that are not affected by DEP.
 That should fix it.
 
 Best wishes,
 Sergey Kostinsky
 Altium
  snip 
 
 All good fun ;-)
 
 John
 
 
 
 
 
 



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Re: [PEDA] P99SE installation

2004-08-05 Thread John A. Ross [Design]
 -Original Message-
 From: Alfonso Baz [mailto:[EMAIL PROTECTED] 
 Sent: 05 August 2004 06:47
 To: [EMAIL PROTECTED]
 Subject: [PEDA] P99SE installation
 
 I'm curious if anybody else has noticed the following when 
 installing P99SE
 SP6 on either WIN2K or WINXP.
 
 Recently I upgraded my PC. I noticed after a clean OS install 
 followed by installation of my usual software packages, 
 windows Start-Help and Support didn't work. Also 
 right-clicking My Computer on the desktop and selecting 
 Manage failed to respond.
 
 Thanks to XP's system restore, I found the offending software 
 installation.
 P99SE

Alfonso

I have XP here for some time now on all workstations (I suspect most
others users now have XP also) and the ones with P99SE are fine, 2 of
them also have DXP2004SP1 installed as well as other applications.
Mixture Dell4500/4600 and 8200/8250/8300/8400's different PU speed and
meory types (SD/RIMM/DDR)

Never seen the issue you report.

Sorry I cannot help, except to say that it should work.

John



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Re: [PEDA] Multiple Displays

2004-08-05 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Jim Monroe [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, August 05, 2004 7:54 PM
 To: Protel EDA Forum
 Subject: [PEDA] Multiple Displays
 
 I'm getting ready to add a second monitor for use with DXP04 
 running on Win2k.
 
 I'm hoping those with experience can guide me in the right 
 direction. I'm thinking about adding a 15 or 17 inch flat 
 panel as the secondary display to my 21 CRT. I thought the 
 flat panel would be used for display of panels and reports 
 while the CRT would be used for the editing workspace.
 
 Here are some things I'm curious sure about:
 
 1. Is this a good strategy?

Jim

Most definitely a wise move although be aware of the trade off on LCD panals as most 
at 17 will
only support 1280x1024 so in some instances a case can be made for a second 21 @ 
1600x1200 plus
instead.

 2. Is my proposed mix of CRT and flat panel even feasible, 
 and can the flat panel be set for a lower resolution than the 
 CRT. If this is hardware dependant, is there anything special 
 I should know?

There is also a lot to be said when swapping panels between monitors of same 
resolution so as not to
lose a part of the panel off screen!

Yes they can be mixed, I have used matrox cards for long and weary and never seen an 
issue, first
was G100/MilleniumII up to Parhelia (2 monitor mode, don't use 3 monitor stretched).
 
 3. I'd like to hear about multi-display configurations that 
 work especially well (or don't work well).

Currently at home I use a Parhelia working in 2 monitor mode, and an additional nVidia 
PCI card for
the third monitor all at 1280x1024 Flat panel display (2 x DVI, 1 x RGB).  

I thought this would be good for a while but find this configuration slightly less 
productive than
the dual 1600x1200 20 CRT. I had considered a 4th but there is no desk space left :-)

John





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Re: [PEDA] changing power symbols

2004-08-03 Thread John A. Ross [Design]
 -Original Message-
 From: Leo Potjewijd [mailto:[EMAIL PROTECTED] 
 Sent: 03 August 2004 09:30
 To: Protel EDA Forum
 Cc: 'Protel EDA Forum'
 Subject: Re: [PEDA] changing power symbols
 
 I just uploaded my powersymbol.lib to the yahoo forum file 
 area at http://groups.yahoo.com/group/protel-users/files/ so 
 you can all have a peek.

Leo

On the ones that you use the 'bar' or 'arrow' symbol for, the built in
one will place the net name below the bar anyway. The earth symbol will
not, which is a pain but I guess as earth should be earth it is not
necessary.

 There is no absolute _must_ to modify teh built-in symbols, 
 but the ones I created have no electrical hotspot and tend to 
 get off-grid when I move them around on the schematic...
 I _know_ that by making the pin 'visible' there will be a 
 hotspot, but then it also wants a footprint and shows up on BOMs.
 
 I know, I know, I'm just being silly here.

Well I have had requirements a lot sillier than what you are asking for.


I guess what you are really after is the ability to place the power
symbol with the net name hidden and just use a single letter to indicate
the net it belongs too?

John



 

 Leo
 
 At 2-8-2004 22:43, John A. Ross [RSDTV] wrote:
   -Original Message-
   From: Dennis Saputelli [mailto:[EMAIL PROTECTED]
   Sent: Monday, August 02, 2004 8:57 PM
   To: Protel EDA Forum
   Subject: Re: [PEDA] changing power symbols
  
   according to Leo they don't meet his drawing standards 
 requirements 
   in the Netherlands
 
 Dennis
 
 That's what I was meaning as I an mot sure what additional 
 symbols are 
 actually needed, NL is only a puddle jump away from me and I have 
 worked well with Dutch companies before and never been asked for any 
 additional symbols or had any other drafting conventions 
 specified even 
 when I was using UltiCap/UltiBoard, an EDA package by a 
 Dutch company! 
 Which only had circle/bar power objects as default but you 
 could create 
 your own.
 
 I am actually a bit more curious on what additional symbols 
 are needed 
 than the process to do it.
 
 John
 
 
 
 
 
 
   John A. Ross [RSDTV] wrote:
   
Dennis
   
Other than for the pure heck of it (as you say, 
 sometimes a valid 
reason :-) ), what other graphic symbols are actually
   needed for a power port ?
   
We have bar/circle/arrow/earth
   
Leo, what additional symbols were you after in your 
 original post ?
   
John
   
 -Original Message-
 From: Dennis Saputelli 
 [mailto:[EMAIL PROTECTED]
 Sent: Monday, August 02, 2004 4:27 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] changing power symbols

 ok so now we have a challenge! (albeit a meaningless 
 and stupid 
 challenge which is always the best kind)

 those pesky power symbols must coded in there somewhere!

 time to start sniffing around the binary files

 Dennis Saputelli

 Leo Potjewijd wrote:
 
  At 31-7-2004 13:34, Rolf Molitor wrote:
  You can edit the power symbols like this:
  Get the System Menu (down arrow) and select Customize.
  Right click the Power objects and select Edit. There
 you see all
  your actual power objects.
  You can add new power objects here or change the existing
 ones with
  right click and New or Properties.
  When you select Properties you will see what bitmap file
 this power
  object uses. Just edit the bitmap to change the view of
 the power object.
 
  Rolf,
  I probably am doing something wrong, but all I can edit
 when I follow
  you description is the button in the toolbar and not the
 actual power
  object itself as it appears on the schematic
 
  Leo Potjewijd
  hardware designer
  Integrated Engineering B.V.
 
  [EMAIL PROTECTED]
  +31 20 4620700
 

 --
 __
 _
 Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107
 2851 21st StreetFax: 415-647-3003
 San Francisco, CA 94110 
 www.integratedcontrolsinc.com




  
   --
   __
   _
   Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107
   2851 21st StreetFax: 415-647-3003
   San Francisco, CA 94110 www.integratedcontrolsinc.com
  
  
  
 
 
 
 
 
 
 



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Re: [PEDA] changing power symbols

2004-08-02 Thread John A. Ross [RSDTV]
Dennis

Other than for the pure heck of it (as you say, sometimes a valid reason :-) ), what 
other graphic
symbols are actually needed for a power port ? 

We have bar/circle/arrow/earth

Leo, what additional symbols were you after in your original post ?

John


 -Original Message-
 From: Dennis Saputelli [mailto:[EMAIL PROTECTED] 
 Sent: Monday, August 02, 2004 4:27 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] changing power symbols
 
 ok so now we have a challenge! (albeit a meaningless and 
 stupid challenge which is always the best kind)
 
 those pesky power symbols must coded in there somewhere!
 
 time to start sniffing around the binary files
 
 Dennis Saputelli
 
 Leo Potjewijd wrote:
  
  At 31-7-2004 13:34, Rolf Molitor wrote:
  You can edit the power symbols like this:
  Get the System Menu (down arrow) and select Customize.
  Right click the Power objects and select Edit. There 
 you see all 
  your actual power objects.
  You can add new power objects here or change the existing 
 ones with 
  right click and New or Properties.
  When you select Properties you will see what bitmap file 
 this power 
  object uses. Just edit the bitmap to change the view of 
 the power object.
  
  Rolf,
  I probably am doing something wrong, but all I can edit 
 when I follow 
  you description is the button in the toolbar and not the 
 actual power 
  object itself as it appears on the schematic
  
  Leo Potjewijd
  hardware designer
  Integrated Engineering B.V.
  
  [EMAIL PROTECTED]
  +31 20 4620700
  
 
 --
 __
 _
 Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107 
 2851 21st StreetFax: 415-647-3003
 San Francisco, CA 94110 www.integratedcontrolsinc.com
 
 
 
 




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Re: [PEDA] changing power symbols

2004-08-02 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Dennis Saputelli [mailto:[EMAIL PROTECTED] 
 Sent: Monday, August 02, 2004 8:57 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] changing power symbols
 
 according to Leo they don't meet his drawing standards 
 requirements in the Netherlands

Dennis

That's what I was meaning as I an mot sure what additional symbols are actually 
needed, NL is only a
puddle jump away from me and I have worked well with Dutch companies before and never 
been asked for
any additional symbols or had any other drafting conventions specified even when I was 
using
UltiCap/UltiBoard, an EDA package by a Dutch company! Which only had circle/bar power 
objects as
default but you could create your own.

I am actually a bit more curious on what additional symbols are needed than the 
process to do it.

John






 John A. Ross [RSDTV] wrote:
  
  Dennis
  
  Other than for the pure heck of it (as you say, sometimes a valid 
  reason :-) ), what other graphic symbols are actually 
 needed for a power port ?
  
  We have bar/circle/arrow/earth
  
  Leo, what additional symbols were you after in your original post ?
  
  John
  
   -Original Message-
   From: Dennis Saputelli [mailto:[EMAIL PROTECTED]
   Sent: Monday, August 02, 2004 4:27 PM
   To: Protel EDA Forum
   Subject: Re: [PEDA] changing power symbols
  
   ok so now we have a challenge! (albeit a meaningless and stupid 
   challenge which is always the best kind)
  
   those pesky power symbols must coded in there somewhere!
  
   time to start sniffing around the binary files
  
   Dennis Saputelli
  
   Leo Potjewijd wrote:
   
At 31-7-2004 13:34, Rolf Molitor wrote:
You can edit the power symbols like this:
Get the System Menu (down arrow) and select Customize.
Right click the Power objects and select Edit. There
   you see all
your actual power objects.
You can add new power objects here or change the existing
   ones with
right click and New or Properties.
When you select Properties you will see what bitmap file
   this power
object uses. Just edit the bitmap to change the view of
   the power object.
   
Rolf,
I probably am doing something wrong, but all I can edit
   when I follow
you description is the button in the toolbar and not the
   actual power
object itself as it appears on the schematic
   
Leo Potjewijd
hardware designer
Integrated Engineering B.V.
   
[EMAIL PROTECTED]
+31 20 4620700
   
  
   --
   __
   _
   Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107
   2851 21st StreetFax: 415-647-3003
   San Francisco, CA 94110 www.integratedcontrolsinc.com
  
  
  
  
 
 --
 __
 _
 Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107 
 2851 21st StreetFax: 415-647-3003
 San Francisco, CA 94110 www.integratedcontrolsinc.com
 
 
 




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Re: [PEDA] changing power symbols

2004-08-01 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Rolf Molitor [mailto:[EMAIL PROTECTED] 
 Sent: Saturday, July 31, 2004 12:35 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] changing power symbols
 
 You can edit the power symbols like this:
 Get the System Menu (down arrow) and select Customize.
 Right click the Power objects and select Edit. There you 
 see all your actual power objects.
 You can add new power objects here or change the existing 
 ones with right click and New or Properties.
 When you select Properties you will see what bitmap file 
 this power object uses. Just edit the bitmap to change the 
 view of the power object.

Rolf

I thought this just changes/adds buttons on the toolbar? 

It does not actually create a new power object itself does it, just sort/add new 
buttons with
predefined attributes?

As far as I know the default power objects cannot be changed except to assign 
nets/color and some
parameters etc by assigning the parameters in the process command.

I guess this is the same as I do below. (I cut this from another post)

Normally as there is plenty space on the toolbar when using 1600x1200 I just add the 
buttons found
on the power objects toolbar to the main one by right click/toolbar properties, add a 
new button and
then use the parameters to predefine its attributes (and a small custom bitmap into the
/system/buttons directory so I can see from the toolbar what it was).

When assigned to the main toolbar they can be made a bit more portable as the live in 
the .rcs file
in the same place under : ToolBar 'SchematicTools' 'Fixed Top'

I did not use multiple colors here, but if you are placing ports with predefined 
attributes color
coding them would not be a bad idea as the eye can sometimes play tricks when 
validating your own
work :-)

Here is a cut/paste from an old client99se.rcs file

Separator
 Button 'C:\P99SE\SYSTEM\BUTTONS\POARWHGND.BMP'
'Sch:PlacePowerPort(Color=111|Orientation=3|S=HGND|Style = 3|$Description=GND power
port|repeat=true)'
 Button 'C:\P99SE\SYSTEM\BUTTONS\POARWAGND.BMP'
'Sch:PlacePowerPort(Color=111|Orientation=3|S=AGND|Style = 1|$Description=aGND power
port|repeat=true)'
 Button 'C:\P99SE\SYSTEM\BUTTONS\POARWGND.BMP'
'Sch:PlacePowerPort(Color=111|Orientation=3|S=GND|Style = 1|$Description=GND power
port|repeat=true)'
 Separator
 Button 'C:\P99SE\SYSTEM\BUTTONS\POW3V3.BMP'
'Sch:PlacePowerPort(Color=111|Orientation=1|S=3V3A|Style = 0|$Description=3V3A power
port|repeat=true)'
 Button 'C:\P99SE\SYSTEM\BUTTONS\POW5D.BMP'
'Sch:PlacePowerPort(Color=111|Orientation=1|S=5D|Style = 0|$Description=5D power 
port|repeat=true)'
 Button 'C:\P99SE\SYSTEM\BUTTONS\POW12V.BMP'
'Sch:PlacePowerPort(Sch:PlacePowerPort(Color=111|Orientation=1|S=12V|Style = 
0|$Description=+12
power port|repeat=true)'
 Separator   

Same idea I as I applied to things like R/C etc for placing the more common values 
(100R/1K/10K...).

Once you have the customisations keep the rcs file handy, as long as the buttons exist 
in the
/system/buttons folder then all you need do (with 99SE closed) is cut/paste the line 
in the rcs,
rename the parameters attributes and rename the referred to bitmap. It s a lot quicker 
than doing it
manually with the button editor!

John




 - Original Message -
 From: Dennis Saputelli [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Sent: Friday, July 30, 2004 6:41 PM
 Subject: Re: [PEDA] changing power symbols
 
 
  you cant make your own power symbols
 
  but if you make a part with a pin (it can be very short)
  you should get a hot spot
  of course these parts would show in your BOM
  but this is where 'include blank part value' checkbox
  comes in handy, should be acceptable
 
  what do y'all use across the pond anyway ?
 
 
  Dennis Saputelli
 
 
  Leo Potjewijd wrote:
  
   Hi,
   at the risk of asking an old question:
   Has anyone found a way to change the shape of the 
 built-in power symbols
 of
   P99SE? We use different symbols here in Europe
   I know I can build my own (I have a wide collection of 
 them) but the
 lack
   of an electrical hotspot on these is (finally) getting to 
 my nerves
  
   Leo Potjewijd
   hardware designer
   Integrated Engineering B.V.
  
   [EMAIL PROTECTED]
   +31 20 4620700
  
  -
  
 __
 _
  Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107
  2851 21st StreetFax: 415-647-3003
  San Francisco, CA 94110 www.integratedcontrolsinc.com
 
 
 
 
 
 
 




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Re: [PEDA] 99SE SP6 updating footprints

2004-07-29 Thread John A. Ross [Design]
 -Original Message-
 From: Leo Potjewijd [mailto:[EMAIL PROTECTED] 
 Sent: 29 July 2004 10:12
 To: Protel EDA Forum
 Cc: 'Protel EDA Forum'
 Subject: Re: [PEDA] 99SE SP6 updating footprints
 
 At 28-7-2004 22:23, John A. Ross [RSDTV] wrote:
 If say
 
 PCB editor is open with MYLIB library loaded, I open MYLIB 
 for editing, 
 I then add a new footprint to MYLIB, save and close it,
 
 Only the save is essential.
 
 If I browse the library within the PCB editor the new 
 footprint is not 
 yet available A push process of update PCB still does not make the 
 footprint available.
 If I remove MYLIB and then add it back in the new footprint is now 
 available for use.
 
 You do not have to remove/re-add the library, clicking on it 
 in the navigator pane will do the trick
 I have several HF 'components' (read: copper structures) that 
 are board specific and need fine-tuning when I create the 
 final PCB; so I switch back and forth a lot and have the 
 library open for editing at the same time I am working in the 
 PCB This neat little trick save loads of time.

Leo

What I mean is that if a new component is added to the library, on the
fly, it does not appear until the library is reloaded.

Just clicking on the navigator pane in the PCB editor does not work for
me, never has.

So I open my PCB for edit, it has the default MYLIB loaded. 
First part in that list is 0402, 
so I place that on the PCB. 
I want to create a new footprint, 
so quick way to open MYLIB is simply to click EDIT in the navigator
panel 
The library editor is now opened. 
So I highlight 0402 in the lib editor navigator panel, 
right click, copy then paste the new footprint into the library, 
rename the new 0402-DUPLICATE to 0402-2. 
Save MYLIB. 
If I go to the PCB editor now, and click the navigator panel as you
suggest, the footprint 0402-2 is not available. It only becomes
available when the library is removed/reloaded.

I can switch back/forward without problem for footprints that exist
already in the library, parts created on the fly never seem to appear
without a reload of the library.

Anything I missed above?

John



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Re: [PEDA] 99SE SP6 updating footprints

2004-07-29 Thread John A. Ross [Design]
 -Original Message-
 From: Leo Potjewijd [mailto:[EMAIL PROTECTED] 
 Sent: 29 July 2004 13:08
 To: Protel EDA Forum
 Subject: Re: [PEDA] 99SE SP6 updating footprints
 
snip
 
 John,
 I just did what you described: opened an existing pcb, went 
 to the library editor via 'edit' in the navigator, copied and 
 renamed an existing footprint (thus creating a new one), 
 clicked on the save button, stepped back to the pcb and 
 clicked on the library name: presto!, the new component 
 showed up in the list
 I even checked it with removal of components, that works too 
 for me
 
 There is defenitely something very weird going on.
 Be it in my installation, yours, or both.

Leo

Thanks for taking time and checking it. 

I figured it out, it was a critical environment variable on my
installation that probably needs replaced :-)

Me actually.  

After reading again what you wrote I found it works if I highlight and
click the library name in the Browse part of the navigator panel. I was
just clicking in the space below it but within the panel, the wrong lib
was highlighted when I tried it before.

Thanks

John



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Re: [PEDA] 99SE SP6 updating footprints

2004-07-28 Thread John A. Ross [Design]
 -Original Message-
 From: Dennis Saputelli [mailto:[EMAIL PROTECTED] 
 Sent: 28 July 2004 02:24
 To: Protel EDA Forum
 Subject: Re: [PEDA] 99SE SP6 updating footprints
 
 i'm sure this has been discussed (?)
 but i just noticed the following in 99SE PCB
 
 if you have several or more parts of the same footprint on a 
 board and you type in a new and valid footprint name and do 
 the global thing: copy footprint, footprint=same
 
 the one you are editing changes to the new footprint and all 
 the others acquire the NEW FOOTPRINT NAME from the global 
 operation but the footpints don't change to the new one

Dennis

Not quite sure what you mean here.

I tried what I think you were describing quickly on a board here. I
picked a 0603 part, changed the value in the footprint field to 0805,
clicked global (footprint already checked) and set the combo box to
footprint=same, clicked OK and all 202 items were changed OK.

If I change the footprint field to a value which does not represent a
valid footprint name in the library, then I see a global change in the
footprint name according to the selection and no footprint change is
applied, but I get a warning for every update instance that fails
(footprint not in library), you don't mention a warning, and you state
you used a valid footprint name, so I guess this is not the same as you
are seeing. 

But I have seen some very strange behaviour with differences with the
loaded (cached) library and the actual library where you have to
drop/reload the library to update it. Not sure 'where' the actual pcb
being edited 'looks' for the valid footprint but I would guess it would
be the cached one so if the new valid footprint was added after the
library was added/cached to the PCB editor then something like this
could be possible I guess

Do not know if this helps you any.

John



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Re: [PEDA] was Shortcuts in 99SE ?

2004-07-22 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Dennis Saputelli [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, July 22, 2004 4:46 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] was Shortcuts in 99SE ?
 
 
 at the risk of beating a dead horse ...
 
 i don't recall any mention in this list over the years 
 regarding the file description you can enter in the DDB for a 
 given internal file
 
 don't know how i missed this and am finding it very useful
 
 has anyone else seen this, use it, don't care about it or whatever ?

Dennis

I seen it, but I do not use it as I never found any way to print it along with the SCH 
so I prefer
to keep the data which I would have used this field for in the actual SCH.

I guess its like the summary information in the properties page of any windows file, 
right
clickpropertiessummary where there is the ability to add information to a file also, 
but not
everyone uses it :-)

John 




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Re: [PEDA] FW: Shortcuts in 99SE ?

2004-07-21 Thread John A. Ross [Design]
 -Original Message-
 From: Terry Creer [mailto:[EMAIL PROTECTED] 
 Sent: 21 July 2004 03:42
 To: 'Protel EDA Forum'
 Subject: [PEDA] FW: Shortcuts in 99SE ?
 
 Apologies for the double post, but I just read Page 30 of the 
 manual a little closer and it mentions this linking process, 
 but doesn't tell you how to do it!!!
 
 Anyway, to follow up, I tried it on several external files on 
 my HDD and it works with PCBs, Libs, Schs, Word Docs, but 
 unfortunately not PDFs. Ah well, can't have everything I guess...

Terry

I thought it did work with PDF using WFS or DDB as long as you did not
export it again (it was not readable by Acrobat anymore complained it
was corrupt).

From memory this issue was because of the header appended to the top of
the PDF file by the access database system used by 99SE when it was
imported/linked, it overwites the expected %PDF header, and if you
exported it again, Acrobat seen a different header than %PDF and deemed
the file unreadable.

I am quite sure it was OK as long as you did not export it again.

I will try it again in a bit to double check.

John

 -Original Message-
 From: Terry Creer [mailto:[EMAIL PROTECTED]
 Sent: Wednesday, 21 July 2004 11:53 AM
 To: 'Protel EDA Forum'
 Subject: RE: [PEDA] Shortcuts in 99SE ?
 
 Hi Dennis,
 
 See page 30 of the P99SE Handbook.
 
 Just right click in a DDB window and choose 'Link' from the 
 menu (the menu that contains New, Import, Import Folder, 
 Import Project, Link, View).
 
 Cheers,
 
 TC
 
 
 
 -Original Message-
 From: Dennis Saputelli [mailto:[EMAIL PROTECTED]
 Sent: Wednesday, 21 July 2004 10:31 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Shortcuts in 99SE ?
 
 
 in the 99SE DDB system (not the windows file system) it is not
 possible to add a shortcut (or link) to an external file, is it ?
 would a be nice feature
 
 Dennis Saputelli
 
 
 -- 
 __
 _
 Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107 
 2851 21st StreetFax: 415-647-3003
 San Francisco, CA 94110 www.integratedcontrolsinc.com
 
 
 
 
 
 



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Re: [PEDA] FW: Shortcuts in 99SE ?

2004-07-21 Thread John A. Ross [Design]
Terry

Do you mean like described here http://www.altium.com/protel/kb/kb_item.asp?ID=2117 
here ?

Then I guess the changes I seen below are the addition ional wrapper ? Makes more 
sense now.

John

PDF to start with is say from line 1 line 10



%PDF-1.2 
%
 
8 0 obj

/Length 9 0 R
/Filter /FlateDecode 

stream
HWMx.

+++

After attaching to the Protel container, it can no longer be used externally. 

If exported and opened again the file is now like this

Lines 1-9 filled with Bin data I cannot cut/paste
Lines 10-96 are as follows. It takes to line 96 now (was line 10) to get to the same 
point as the original.

+++

1 0 obj
 
/Creator (Design Explorer - [D:\\Coral TB 005\\Coral TB 005.DDB])
/CreationDate (D:20040209100231Z)
/Title (Protel Schematic)
/Author (design)
/Producer (Acrobat PDFWriter 5.0 for Windows NT)
/ModDate (D:20040721093137+02'00')
 
endobj
2 0 obj
[ 
/PDF /Text 
]
endobj
3 0 obj
 
/Pages 52 0 R 
/Type /Catalog 
/Metadata 53 0 R 
 
endobj
4 0 obj
 
/Type /Page 
/Parent 5 0 R 
/Resources  /Font  /F0 6 0 R /F1 10 0 R /F2 12 0 R  /ProcSet 2 0 R  
/Contents 8 0 R 
 
endobj
5 0 obj
 
/Kids [ 4 0 R 14 0 R 17 0 R 20 0 R 23 0 R 26 0 R ] 
/Count 6 
/Type /Pages 
/Parent 52 0 R 
 
endobj
6 0 obj
 
/Type /Font 
/Subtype /TrueType 
/Name /F0 
/BaseFont /TimesNewRoman 
/FirstChar 32 
/LastChar 255 
/Widths [ 250 333 408 500 500 833 778 180 333 333 500 564 250 333 250 278 500 
500 500 500 500 500 500 500 500 500 278 278 564 564 564 444 921 
722 667 667 722 611 556 722 722 333 389 722 611 889 722 722 556 
722 667 556 611 722 722 944 722 722 611 333 278 333 469 500 333 
444 500 444 500 444 333 500 500 278 278 500 278 778 500 500 500 
500 333 389 278 500 500 722 500 500 444 480 200 480 541 778 500 
778 333 500 444 1000 500 500 333 1000 556 333 889 778 611 778 778 
333 333 444 444 350 500 1000 333 980 389 333 722 778 444 722 250 
333 500 500 500 500 200 500 333 760 276 500 564 333 760 500 400 
549 300 300 333 576 453 250 333 300 310 500 750 750 750 444 722 
722 722 722 722 722 889 667 611 611 611 611 333 333 333 333 722 
722 722 722 722 722 722 564 722 722 722 722 722 722 556 500 444 
444 444 444 444 444 667 444 444 444 444 444 278 278 278 278 500 
500 500 500 500 500 500 549 500 500 500 500 500 500 500 500 ] 
/Encoding /WinAnsiEncoding 
/FontDescriptor 7 0 R 
 
endobj
7 0 obj
 
/Type /FontDescriptor 
/FontName /TimesNewRoman 
/Flags 34 
/FontBBox [ -250 -216 1174 1000 ] 
/MissingWidth 326 
/StemV 73 
/StemH 73 
/ItalicAngle 0 
/CapHeight 891 
/XHeight 446 
/Ascent 891 
/Descent -216 
/Leading 149 
/MaxWidth 978 
/AvgWidth 401 
 
endobj
8 0 obj
 /Length 9 0 R /Filter /FlateDecode  
stream
HWMx..

++
















 

 -Original Message-
 From: Terry Harris [mailto:[EMAIL PROTECTED] 
 Sent: 21 July 2004 15:47
 To: Protel EDA Forum
 Subject: Re: [PEDA] FW: Shortcuts in 99SE ?
 
 On Wed, 21 Jul 2004 09:40:27 +0100, John wrote:
 
  Apologies for the double post, but I just read Page 30 of 
 the manual 
  a little closer and it mentions this linking process, but doesn't 
  tell you how to do it!!!
 
 I thought it did work with PDF using WFS or DDB as long as 
 you did not 
 export it again (it was not readable by Acrobat anymore 
 complained it 
 was corrupt).
 
 I can store and link to PDFs in either kind of database. I 
 have full Acrobat 6 Pro installed. Acrobat reader probably 
 does not provide the required OLE functionality to support this. 
 
 In a WFS database Acrobat 6 can't directly open stored PDFs, 
 link or full. 
 
 From memory this issue was because of the header appended to 
 the top of 
 the PDF file by the access database system used by 99SE when it was 
 imported/linked, it overwites the expected %PDF header, and if you 
 exported it again, Acrobat seen a different header than %PDF 
 and deemed 
 the file unreadable.
 
 It isn't an access header. In the 99SE database 'foreign' 
 files are stored as OLE objects which may also be known as 
 scrap files. Such files may have a standard header, I don't know.  
 
 The actual format of these files is up to the associated OLE 
 application.
 An OLE application associated with jpeg image editing may 
 decide to store the image in full colour uncompressed format. 
 I have seen 100k jpegs occupy tens of megabytes when imported 
 into P99SE. 
 
 Microsoft Office applications appear to be able to open OLE 
 scrap files directly. Acrobat can't and I haven't found any 
 other OLE application that can. 
 
 
 Cheers, Terry.
 
 
 
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Re: [PEDA] Shortcuts in 99SE ?

2004-07-21 Thread John A. Ross [Design]
Dennis, Terry

Sorry, my mistake, guess I should go back to sleep now :-)

John 

 -Original Message-
 From: Dennis Saputelli [mailto:[EMAIL PROTECTED] 
 Sent: 21 July 2004 16:59
 To: Protel EDA Forum
 Subject: Re: [PEDA] Shortcuts in 99SE ?
 
 
 John,
 we are talking about shortcuts or 'links' not importing the 
 file itself into the DDB, so i don't see how the wrapper is an issue
 
 Terry,
 
 i can't believe i never noticed that after all these years!
 works great for me, PDFs too
 
 but
 is see the following issues which i find puzzling:
 
 i started a new MSACCESS DDB design
 i dragged in a small schematic and a small board so it would 
 be something a bit like a real design both files were very 
 small, 10K + 900K
 
 i then made a LINK to a JPG
 the file size in the DDB shows 3M
 but the JPG is only 68K
 the ICON in the DDB shows the shortcut arrow thingy
 
 then i linked to a PDF
 the PDF external file is about 60K and the DDB link file is 
 about 6K which seems about right
 
 so what is up with the JPG case?
 
 BTW, the PDF pointer works fine, as does the JPG each 
 launcing their own associated apps
 
 also
 can you expose the properties
 of the LINK ?
 i want to see the path that the link contains but it is blank 
 in the right click properties dialog
 
 
 Dennis Saputelli
 
 
 Terry Creer wrote:
  
  Hi Dennis,
  
  See page 30 of the P99SE Handbook.
  
  Just right click in a DDB window and choose 'Link' from the 
 menu (the 
  menu that contains New, Import, Import Folder, Import 
 Project, Link, View).
  
  Cheers,
  
  TC
  
  -Original Message-
  From: Dennis Saputelli [mailto:[EMAIL PROTECTED]
  Sent: Wednesday, 21 July 2004 10:31 AM
  To: Protel EDA Forum
  Subject: Re: [PEDA] Shortcuts in 99SE ?
  
  in the 99SE DDB system (not the windows file system) it is not 
  possible to add a shortcut (or link) to an external file, is it ?
  would a be nice feature
  
  Dennis Saputelli
  
  --
  
 __
 _
  Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107
  2851 21st StreetFax: 415-647-3003
  San Francisco, CA 94110 www.integratedcontrolsinc.com
 
 --
 __
 _
 Integrated Controls, Inc.   Tel: 415-647-0480  EXT 107 
 2851 21st StreetFax: 415-647-3003
 San Francisco, CA 94110 www.integratedcontrolsinc.com
 
 
 
 



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Re: [PEDA] Ver 3.x -- 99SE or DXP??

2004-07-16 Thread John A. Ross [Design]
 -Original Message-
 From: RogerHead [mailto:[EMAIL PROTECTED] 
 Sent: 16 July 2004 03:45
 To: Protel EDA Forum
 Subject: Re: [PEDA] Ver 3.x -- 99SE or DXP??
 
 Hi John,
 
 You said
 
 In some ways it is actually functionally better but I prefer 
 to view it 
 without all the WinXP finishing touches which makes it look 
 worse than 
 it is.
 
 Is there a 'classic' setting somewhere?
 The library panel really irritates me. It could be so much better.
 

Roger

2 places, 

Control PanelSystemAdvanced TabPerformanceSettings Adjust for best
performance radio button 

Watch and see all tacky WinXP GUI crud will go away except taskbar.

Then Taskbar, properties, I find auto hide a benefit to see the taskbar
and panel buttons, better for 2004 and also turn it to classic mode. I
have also dragged the taskbar to the top of the screen instead of the
bottom.

Becomes Win2k like but the crud is gone. 

Maybe others like it, I just think a lot of it is a waste of visible
desktop space

John



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Re: [PEDA] Ver 3.x -- 99SE or DXP??

2004-07-15 Thread John A. Ross [RSDTV]
 -Original Message-
 From: RogerHead [mailto:[EMAIL PROTECTED] 
 Sent: Friday, July 16, 2004 1:50 AM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] Ver 3.x -- 99SE or DXP??
 
 I've used Protel since the V1.1 days. We stopped upgrading 
 after buying a couple of licenses for 3.x, mainly because it 
 does about 99% of our needs. 

Roger

I did not use V3, Autotrax was my last adventure before P98.

But I would say that if V3 still fits your needs then stick with it.

 I've had cursory looks at other versions as they came out, 
 but nothing really grabbed me. Now I'm looking hard (using a 
 trial cd with SP2), but I detest the DXP interface - maybe 
 just a personal thing, but it seems like a lot of froth and 
 bubble, done (not particularly well) by programmers for their 
 own gratification, instead of as a straightforward, 
 hardworking, everyday tool.

No you are not alone, many people have commented on the UI. How much of the users 
views on the poor
UI Altium have taken on board, who knows, but they do listen. 
In some ways it is actually functionally better but I prefer to view it without all 
the WinXP
finishing touches which makes it look worse than it is. 

Yes I think the developers could have made better use of the panels features and cut 
down on
multiple panels with similar, sometimes overlapping functions, but who are us users 
really to spoil
their fun :-)

 Am I missing something?? I certainly don't want 'integrated 
 tools'. I'll always use the manufacturer's tools for 
 CPLD/FPGA/..., because I believe that they will be more 
 up-to-date, and with less 'gotchas than when a third party 
 tries to shoehorn it into their own product. Again I might be 
 wrong, but it can be very time-consuming to find whose fault 
 it is when something doesn't work, and even harder to get it fixed.

If you do not want to use the tools don't, I do not use the FPGA tools at all, but I 
have tried
them. 
Leaving the additional tools redundant does not effect other functions. You still need 
the vendor
tools anyway to do the real work, DXP2004 really just adds a capture  sim shell. The 
IP is nice,
but not essential.

 So, my question... although I haven't put 99SE up yet (I have 
 a trial cd), what little I have seen leads me think that I 
 will feel more comfortable with it than DXP. Is there 
 *anything* in DXP that would make it a must-have over 99SE?

If you want to change packages to a current one with a future roadmap then save 
yourself some time
and go straight to DXP2004. But consider the roadmap if PCB design is your primary 
objective and the
words in the article that Mike posted earlier where Altium quoted on their view of how 
much more
important FPGA integration was over PCB tool development,  

..view as a more important shift than higher speeds, embedded passives or 
differential pair
routing. 

There were changes P98P99SE so I am assuming V3.5 would be a bit more of a change. So 
if you have
to invest in retraining then try and do it only once, not twice if you decide later on 
DXP2004
because 2004 will be a big change and better tackled head on and up front and not as 
a part time
expedition.

I am pretty sure no-one will knock 99SE SP6 for stability, still has some bugs but 
they are well
known and at least a lot of the UI will be familiar for you. I am still using it every 
day (legacy
design support for external clients) as well as 2004, if I used 2004 all the time I 
could work with
it, but going back to a familiar 99SE environment so often is just a reminder of how 
much easier
2004 could be to use.
 
 I recall many unhappy posts related to the database system in 
 99SE, and it seems that has been dumped in DXP. Do you lose 
 any significant features in 99SE if you just use the Windows 
 file system?

There were some bugs that could kill the database, all well cleared by P99SE SP6 and 
it is stable,
you can always export the contents back to a file system for backups 

 Of course, when they have an auto router that *really* works, 
 then I'll be there...

Now, others have much more experience on the comparisons than me, but my impressions 
are that 
Situs still has a long way to go just to be on par with some other router offerings 
and still much
in development.

John




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Re: [PEDA] We Need Your Help!

2004-06-30 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Tom Hausherr [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, June 30, 2004 12:23 AM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] We Need Your Help!
 
 Terry,
 
 Phillip Restall - [EMAIL PROTECTED] is a programmer 
 but does not know of an easy way to Batch Move the 
 silkscreen data to the correct layer. 

Tom

The abilities of the DelpiScript engine exposed in 2004 is very powerful indeed, in 
fact pretty much
overkill, but probably not that well documented. I believe selection of the entities 
would be the
critical part, assuming a consistent rule for primitive sizes are applied across all 
parts already
and no rounding errors from Altium side when applying selection filters.

Have you tried asking the Protel library center directly on this, its just a 
suggestion, as both
libraries are free I don't see any conflict. 

I am sure when Altium were modifying their own libraries they did not do them one at a 
time so they
may already have some nifty utilities/scripts they wrote in house that might help 
Philip as they
will have come across the same issues with consistent line widths across parts etc. 
This assumes a
definitive selection of primitives is possible.
 
Perhaps Phil Loughhead or Geoff Harland can put Philip in touch with someone off list, 
or arrange
some help via the developers at Premier (fellow IPC members and instructors) as it is 
actually a
result of a bug in the translator (not present in Pads importer in PCAD I believe, so 
they know why
it happens).

Just an idea as I really believe the script engine should be capable of doing this 
with at least one
constant to filter (or nested filters). 

Should not really be needed but I've cc'd this to dxp list as well to make sure it 
gets noticed by
Altium. I don't do any programming work myself, but can appreciate what the 2004 
script engine can
be capable of.

 Here is the situation:
 The IPC-7351 library has a silkscreen outline and an assembly 
 outline. They are two totally different outlines. The 
 silkscreen is a fake outline and does not represent the 1:1 
 scale component body. It represents the component, but does 
 not touch any pads or exposed copper. The Assembly Drawing 
 outline is an exact replica of the physical component and it 
 may run right over pads because it's just a drawing.
 
 When we converted 9,000 library parts from PADS to Protel 
 everything went smooth except the translator merged the 
 Assembly Outline and the Silkscreen outline to the same layer 
 in Protel. That was the stock PADS to Protel translator 
 provided by Altium. Now we have to manually edit each library 
 part to separate the two distinct outlines.

I believe that you do not get this issue from PadsPCAD as the translator does not 
have this bug.

Perhaps a shorter route, if Altium assistance is not offered, would be PadsPCADProtel

 We can easily write programs that make global edits but we 
 cannot think our way out of this problem. 

;)

John




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Re: [PEDA] We Need Your Help!

2004-06-30 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Tom Hausherr [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, June 30, 2004 8:31 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] We Need Your Help!
 
 snip 
 
 Tom
 
 The abilities of the DelpiScript engine exposed in 2004 is 
 very powerful
 indeed, in fact pretty much
 overkill, but probably not that well documented. 
 
 John,
 
 Can you point me to where it is documented at *ALL* ?
 I keep seeing people here and elsewhere referring to its 
 capabilities and
 flexibility, but I've never seen it mentioned - except 
 obliquely - anywhere
 in the documentation. In fact I'll go one better. One of my 
 main complaints
 about Protel in general is the difficulty of getting at the 
 voluminous
 documentation. I find the whole process extremely counter - intuitive.

Tom

Ill resist a comment or two about the help system, it is getting better ;)

If you just type Delphi Script into the Help Search there is quite a few hits.

I only know a few people here which have written utilities using the engine.  

Premier EDA had some PCB utilities fo DXP which included a Copy silk screen to 
mechanical layer but
I do not know if it came with source.

Others who have used the engine might volunteer, but that would be up to them.

John





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Re: [PEDA] Licenses

2004-06-29 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Mike Reagan [mailto:[EMAIL PROTECTED] 
 Sent: Tuesday, June 29, 2004 6:49 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Licenses
 
 That is pretty interesting data gathered here.  The 
 interesting part is that Cadence has been successful in 
 trashing OrCAD from number 1 to a has been.
 I doubt if PADs schematic has overtaken OrCad.

Powerlogic is a non contender, you were joking right? ;) Other than its tight 
integration with PPCB,
well, enough said.

DxDesigner is still clumsy compared to Orcad, once its adopted we can see what happens 
to
powerLogic...

John

 -Original Message-
 From: Tom Hausherr [mailto:[EMAIL PROTECTED]
 Sent: Tuesday, June 29, 2004 1:30 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] IPC-2581  IPC-7351.
 
 
 Bill,
 
 I just talked to Mentor Graphics PADS division and they say 
 that since the 1st release of PADS Software in 1985 they have 
 logged 85,000 licenses.
 PowerLogic (schematic) and PowerPCB (layout) are separate licenses.
 
 There are currently 18,000 PADS-PowerPCB seats on yearly maintenance.
 
 It's my personal guess that there are about 35,000 
 PADS-PowerPCB seats in use. There are many people using old 
 licenses that are not on yearly maintenance due to financial 
 hardships over the past 4 years.
 
 Tom
 
 Tom Hausherr
 PCB Libraries
 CEO, Director of Technology
 858.592.4826 Phone
 847.745.0450 Fax
 E-Mail: [EMAIL PROTECTED]
 Website: http://www.PCBLibraries.com  http://www.PCBYellowPages.com
 
 
 -Original Message-
 From: Brooks,Bill [mailto:[EMAIL PROTECTED]
 Sent: Tuesday, June 29, 2004 9:50 AM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] IPC-2581  IPC-7351.
 
 I wonder just how many licensed seats there are of Protel in 
 the world
 is that published anywhere?
 Also I wonder if Pads has published the same info?
 
 I didn't participate in the poll so it's at least off by one.
 LOL...
 
 I would venture to say Protel may have more seats that 
 Pads... but they are mostly not in the Southwest of the U.S.
 
 How about it Altium... how many active seats of Protel are there?
 
 
 Bill Brooks
 PCB Design Engineer , C.I.D., C.I.I.
 Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 http://pcbwizards.com
 
 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
 Sent: Tuesday, June 29, 2004 5:28 AM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] IPC-2581  IPC-7351.
 
 According to what statistical method?
 
  -Original Message-
  From: Tom Hausherr [mailto:[EMAIL PROTECTED]
  Sent: Monday, June 28, 2004 7:09 PM
  To: 'Protel EDA Forum'
  Subject: Re: [PEDA] IPC-2581  IPC-7351.
 
  Ian,
 
  We took a poll and Protel is number two in worldwide installations 
  (behind PADS).
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 




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Re: [PEDA] IPC-2581 IPC-7351.

2004-06-29 Thread John A. Ross [RSDTV]
Bill

Or the seats could be like the ones I have.

I have 2 active seats of my own.

For each client that I have who specifies particular tools, I require them to supply 
me with a
licensed seat of the tools (same version) as they use. For P99SE that totals 7. This 
is actually in
case I ever dump Protel myself and they proceed to a newer version than I have. They 
have to provide
their own as it would not be fair to have one client pay for a seat and let the others 
use it for
free :-)

So out of total 9 seats, only 2 are ever active, hope that ratio is not across the 
board. Hope the
other 7 did not take part in the poll :-) and say yes...

John

 -Original Message-
 From: Brooks,Bill [mailto:[EMAIL PROTECTED] 
 Sent: Tuesday, June 29, 2004 5:50 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] IPC-2581  IPC-7351.
 
 I wonder just how many licensed seats there are of Protel in 
 the world
 is that published anywhere? 
 Also I wonder if Pads has published the same info? 
 
 I didn't participate in the poll so it's at least off by one. 
 LOL...
 
 I would venture to say Protel may have more seats that 
 Pads... but they are mostly not in the Southwest of the U.S.
 
 How about it Altium... how many active seats of Protel are there? 
 
 
 Bill Brooks
 PCB Design Engineer , C.I.D., C.I.I.
 Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 http://pcbwizards.com
 
 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
 Sent: Tuesday, June 29, 2004 5:28 AM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] IPC-2581  IPC-7351.
 
 According to what statistical method?  
 
  -Original Message-
  From: Tom Hausherr [mailto:[EMAIL PROTECTED]
  Sent: Monday, June 28, 2004 7:09 PM
  To: 'Protel EDA Forum'
  Subject: Re: [PEDA] IPC-2581  IPC-7351.
  
  Ian,
  
  We took a poll and Protel is number two in worldwide installations 
  (behind PADS).
 
 
 
 
 
 




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Re: [PEDA] Recommendations please! -- DXP2004 - PADS - Expedition

2004-06-28 Thread John A. Ross [Design]
 -Original Message-
 From: Leon Heller [mailto:[EMAIL PROTECTED] 
 Sent: 28 June 2004 07:15
 To: Protel EDA Forum
 Subject: Re: [PEDA] Recommendations please! -- DXP2004 - PADS 
 - Expedition
 
 - Original Message -
 From: Tom Hausherr [EMAIL PROTECTED]
 To: 'Protel EDA Forum' [EMAIL PROTECTED]
 Sent: Monday, June 28, 2004 4:33 AM
 Subject: Re: [PEDA] Recommendations please! -- DXP2004 - PADS 
 - Expedition
 
  John,
 
  It would be really great if Altium Protel  PCAD had a PADS V4 or V5
 import.
 
  Altium has been dragging this issue for 4 years when they 
 stopped working
 on
  their PADS importer with V3.5. And there's all kinds of 
 quirks with that
  interface.
 
 Pulsonix import designs and libraries from PADS, Accel, 
 P-CAD, Cadstar,
 OrCAD, Eagle, Ultiboard and Protel.
 

Leon

Pulsonix does not support these bi-directionally. 

As such would only suit companies who handle their own designs on the
same platform which negates the importers benefit if you need to supply
the deign back in its native format.

I was interested in the Pulsonix demo but never got time to run it, the
chip utilities were of interest as they seemed to be better priced than
the BGA option for Pads but. Protel seems to be standing still with
respect to developing layout tools into this area (BGA,COB...) and
additional importer support, but Protels Capture tools have came on very
well indeed.

As has been discovered by Joe, the Pads importer in DXP2004 does not
work 100%, but the PCAD one seems to be OK and I am at a loss really to
see why the import format to Protel needs to be  V3.5 format in the
first place but that's what we have.

Same old story, one tool never fits all :-)

John

GM1BSG



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Re: [PEDA] Recommendations please! -- DXP2004 - PADS - Expedition

2004-06-27 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Symanski, Jerry SPAWAR [mailto:[EMAIL PROTECTED] 
 Sent: Sunday, June 27, 2004 9:08 PM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] Recommendations please! -- DXP2004 - PADS - Expedition
 
 Gentlemen, I am currently involved in the all too familiar 
 task of choosing an EDA tool for our group.

Jerry

Do not envy you this task :-)
  
 Our group consists of about 20 engineers. We do small, low 
 power high density systems consisting of analog and digital 
 components.  We cover the full spectrum from algorithms 
 through design, fabrication, packaging, programming, testing, 
 documentation and user interfaces.
  
 The group has used Protel for many years but now finds 
 ourselves in need of a complete, full spectrum EDA suite.

I think you are looking for something that does not exist. IMO all you can hope for is 
a best fit
for the majority of tasks and a good interface to the other tools you need to get the 
job done.

I would not IMO say that any of the 3 are a complete solution for all aspects of the 
design cycle.
  
 I am interested in comments, comparisons, recommendations, 
 etc., from anyone who has experience in using at least two of 
 the latest versions of Expedition, PADS and Protel suites.

You are spreading across quite an expanse of $$ here, in fact for 20 seats, it is 
a petty major
gap if you are going to enable full seats for everyone.

I do not think you need any advice on Protel if you already use it. 
For multi user environments I am having serious trouble getting DXP2004 integrated 
within our
internal QA system and ISO without bogging everyone down with un-needed caveats and 
gotcha notices
that need to interfere with a natural flow, something as simple as Save or Save as can 
produce quite
different things at project tree level. 
This overhead is purely a result of the current way in which files are handled within 
a project and
the risk to design integrity through improper following of critical procedures and no 
redundancy for
the integration of remedial loops to make corrective actions (project rebuild). I have 
been
preparing some idea of mine on this but its not ready yet, perhaps I need to get 
moving before 2005
is released :-) 

But I would give your Mentor rep a bit of a commitment test up front as you will be 
paying major $$$
each year for as long as you own the tools, ask them to come in to your site, and 
survey/recommend
tools based on your needs and specifically ask about training. 
They can tailor a license package for you so you do not need full suites on everyone's 
desk at same
time. For 20 seats of any combination that should be worth their while. If they will 
not do this
much for you, well, Cadence is worth a call too..

I only use Protel and Pads here, but I work with colleagues in Spain who have nearly 
70 people in
RD and the whole dept use Mentor productions from end-end. However they do have a 
warning, they do
not speak highly of Mentor support, they prefer to invest in Mentor training for their 
engineers and
then handle product training and support in house. You can draw from that what you 
will...

Sorry for the ramblings

John




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Re: [PEDA] Recommendations please! -- DXP2004 - PADS - Expedition

2004-06-27 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Tom Hausherr [mailto:[EMAIL PROTECTED] 
 Sent: Sunday, June 27, 2004 10:15 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Recommendations please! -- DXP2004 - PADS 
 - Expedition
 
 snip 

 Also, PADS will soon (September / October) have a complete 
 Protel translator so you can move all your legacy work 
 directly over to PADS.  

Tom

Thanks for that snippet ;), perhaps Altium will now escalate the remedial work on the 
Pads Importer
:-) and perhaps even expand to a Plogic or DxD importer as well.

Is the planned translator at PCB level only or at capture level also?

John





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Re: [PEDA] DXP/P2004 comment - storing views

2004-06-25 Thread John A. Ross [Design]
 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED] 
 Sent: 25 June 2004 02:06
 To: [EMAIL PROTECTED]
 Subject: [PEDA] DXP/P2004 comment - storing views
 
 A while ago there was a discussion about P2004 not doing much 
 for PCB designers. This is a note on a small feature to those 
 interested.
 
 Something I find I am using more and more now is P2004's 
 ability to save a view of the board (or Sch) to allow easy 
 access - Altium called them Favourites - I would have called 
 them something else like Saved Views but anyway (by the end 
 of a design the area I have been working most in (so I am 
 more likely to have saved as a view is likely to be anything 
 but my favourite :-)
 
 I have requested an extension of the facility so it save the 
 layer setup as well as just the view bounds as this would 
 improve the facility.  There are also some things about 
 dealing with the Favourites panel that could be improved - 
 but there is an easy enough way around this particular problem.

Ian

Could be good, put an option in ProjectProject optionsOptions tab for
default 'startup?' files for each editor and have 'Save As' startup file
defined in the File menu for each editor which stores all the settings
except actual parts/netlist?

Just an idea

John



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Re: [PEDA] Spice Simulation (V I) Probes on Schematic?

2004-06-25 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Joe Sapienza [mailto:[EMAIL PROTECTED] 
 Sent: Friday, June 25, 2004 5:34 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Spice Simulation (V  I) Probes on Schematic?
 
 John,
 
 If you are truly getting ready for retirement maybe we can 
 address you al old man Ross???

Joe

Hopefully I have a few years left yet 
 
 The changeover is inevitable, personally I see where the tool 
 can go and I'm starting to invest my time to it. Working 
 outside a large company I can also see that if layout doesn't 
 wind up outsourced overseas(US) those of us that stay in PCB 
 layout/design will do well, I get the impression that Junior 
 engineers are not the same way as some of us have been, they 
 all sorta think they are bosses, I'm not sure how to 
 accurately articulate my impressions of the current crop of  
 engineers and I trust this is accurate enough to convey my 
 impressions.

Customer demand my friend, I have some still on Pads Perform, still have some on 
Protel 2.8, the
majority on 99SE and a very few on DXP2004.

When I changed to P98 I managed without to much effort to get the majority to at least 
keep a seat,
From P98 99SE was also a very positive change, despite the DDB introdcuction.

I would be more than happy to try and egg them on a little to a common, up to date 
platform, but the
general feelings on DXP, even 2004 has been a bit, well to tell the truth, extremely 
negative and
some of the larger names, which Altium like to boast as customers have point blank 
refused to accept
anything other than 99SE designs. Despite even demontsrting some features in person at 
one clients
site last time I was in Germany, and the engineers liking them, they would not budge 
from 99SE.

The resistance to change to the DXP platform, regardless of their motives, has been 
extremely poor
compared to previous versions. One of our policies for accepting external work is that 
the client
should supply the toolset of there choice to use and they must maintain it with the 
latest versions
(support etc) and the resistance to change has been very noticable.

Now, time to hunt some food.

John




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Re: [PEDA] Spice Simulation (V I) Probes on Schematic?

2004-06-25 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Darren [mailto:[EMAIL PROTECTED] 
 Sent: Friday, June 25, 2004 5:59 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Spice Simulation (V  I) Probes on Schematic?
 
 Joe/John,
 
 Just curious, do you guys work from home doing contract PCB 
 design? This is something I would like to do if there are 
 such opportunities.

Darren

Although I have an office at home and I do work from here sometimes this is due to 
personal
responsibilities at home which restrict my office availability even although it is 
only a few miles
away. 

I am a salaried person but also a shareholder in the company I work for. Have been 
here since 1987
full time and worked with more or less the same people for over 20 years. As part of a 
team I have
to rely on others and they rely on me, no room for slacking, we are all each others
motivator/managers.

I get calls every day from contract companies and contactors looking for work, I trash 
some as they
are asking for too little, I trash others for asking for over inflated rates and under 
inflated CV. 
As yet I have not found one yet that would justify the rates or investment in my time 
to get their
work practices licked into shape. 

Contracting is a bloody tough game to be in and can sometimes be seriously depressing 
as I have seen
good, skilful guys see it as 'escaping the leash' and have had their efforts thwarted 
by nothing
more than their own lack of skills in marketing and selling themselves or identifying 
companies with
skill gaps they can fill at the right price, and exploiting those needs correctly (to 
both parties
benefit, the secret of longevity). 
I have seen others who could sell snow to Eskimos and very poor skills indeed, these 
guys do very
well, but tend to 'milk the cow dry' every chance they get and then look for another 
cow. S...
Floats as they say. 
In this respect the IPC certification programs which list engineers is something I 
like very much,
it's a pity is not a requirement every say 2 years or so to keep it valid, it would 
weed out a lot
of the bogus CV entries I have found! 

Some of the people I would like I would have to 'head hunt' from other companies.

Most of the external work I do is part of a symbiotic relationship with companies we 
have licensed
out reference designs or embedded applications to, they use us as their RD and we use 
them for
sales, marketing and distribution of products. Although we manufacture our own designs 
for some
people we do not employ any sales or marketing staff at all. This relationship has 
extended over the
past 5-7 years to include work on pre release silicon from some of our suppliers, not 
customers, for
the TV sector including test boards for devices pending tape out, recommendations on 
pin-outs for
the IC so that end clients can rout complex devices on min layer counts and some BGA 
work. 

This if done as a contract job would be enough to sustain perhaps 1 - 1 1/2 people 
(volunteers for
the 1/2 ?? :-) ) but the travelling and moving/shaking involved in keeping it is 
difficult.

If you are considering it make sure you get plenty leads and some commitment from 
companies up
front, do not be too fussy on the type of work, bread and butter stuff.  

I hope no-one who does contract work takes too much of my pessimistic look at 
contacting in the
wrong way, not all contractors fit into the 2 categories I have painted above and 
perhaps they can
give you a bit more of a real insight into the 'game' than I can.

John












 
 Darren
 - Original Message -
 From: Joe Sapienza [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Sent: Friday, June 25, 2004 10:33 AM
 Subject: Re: [PEDA] Spice Simulation (V  I) Probes on Schematic?
 
 
  John,
 
  If you are truly getting ready for retirement maybe we can 
 address you al
  old man Ross???
 
  The changeover is inevitable, personally I see where the 
 tool can go and
 I'm
  starting to invest my time to it. Working outside a large 
 company I can
 also
  see that if layout doesn't wind up outsourced overseas(US) 
 those of us
 that
  stay in PCB layout/design will do well, I get the 
 impression that Junior
  engineers are not the same way as some of us have been, 
 they all sorta
 think
  they are bosses, I'm not sure how to accurately articulate 
 my impressions
 of
  the current crop of  engineers and I trust this is accurate 
 enough to
 convey
  my impressions.
 
  Joe
 
 
  - Original Message - 
  From: john [EMAIL PROTECTED]
  To: 'Protel EDA Forum' [EMAIL PROTECTED]
  Sent: Friday, June 25, 2004 12:06 PM
  Subject: Re: [PEDA] Spice Simulation (V  I) Probes on Schematic?
 
 
-Original Message-
From: Protel Hell [mailto:[EMAIL PROTECTED]
Sent: Friday, June 25, 2004 4:27 PM
To: [EMAIL PROTECTED]
Subject: Re: [PEDA] Spice Simulation (V  I) Probes on 
 Schematic?
   
I'm doing quite nicely Joe, thanks for asking
   
Never left, nor do I intend to, I am fascinated 

Re: [PEDA] Spice Simulation (V I) Probes on Schematic?

2004-06-25 Thread John A. Ross [RSDTV]
Ian has collected some things here,

http://www.considered.com.au/DXP_vs_P99SE.htm

John 

 -Original Message-
 From: Stephen Noftall [mailto:[EMAIL PROTECTED] 
 Sent: Friday, June 25, 2004 11:27 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Spice Simulation (V  I) Probes on Schematic?
 
 John A. Ross [RSDTV] wrote:
  The resistance to change to the DXP platform, regardless of their 
  motives, has been extremely poor compared to previous 
 versions. One of 
  our policies for accepting external work is that the client should 
  supply the toolset of there choice to use and they must 
 maintain it with the latest versions (support etc) and the 
 resistance to change has been very noticable.
 
 Hello all; First post on the forum for me!
 
 I understand how you feel John. I have been a Protel/Orcad user since
 DOS3.1 days. Sometimes, I wish I was still back there ;-)
 
 There are times when waiting for the 15 Seconds DXP takes to 
 fire up on my rig that I wish Protel had just concentrated on 
 what I wanted. I still think the original Orcad was a better 
 schematic entry tool than what I use now.
 
 But for my question: I have just received Protel PCB 2004. 
 Now, everytime I ask Altium why would I want to upgrade from 
 DXP (SP2) to PCB 2004, I get a cryptic answer (It's our 
 latest software!). Can anyone explain the difference between 
 the two? From all I can gather, they are exactly the same. 
 But what real-world difference is there?
 
 Thanks!
 
 Stephen Noftall
 
 
 




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Re: [PEDA] How to open OrCAD schematics in Prote DXP?

2004-06-24 Thread John A. Ross [Design]
 -Original Message-
 From: Darren [mailto:[EMAIL PROTECTED] 
 Sent: 24 June 2004 06:01
 To: [EMAIL PROTECTED]
 Subject: [PEDA] How to open OrCAD schematics in Prote DXP?
 
 Greetings.
 
 Does anyone know of the best way to translate OrCAD 
 schematics to Protel?
 
 My understanding is that EDIF may be the best way to go, but 
 I can not figure out how to open the EDIF file in Protel to 
 be converted to a schematic. Protel opens it as a text file.
 
 Is there a way to generate the schematic from the EDIF file? 
 Is there a better way?
 
 I also tried opening the *.dsn file that is the OrCAD file 
 format, but Protel does not do a great job of it. the font is 
 too small, and the borders are messed up. There seem to be a 
 few other artifacts that I find unacceptable.
 
 Any advice would be appreciated. The reason I want to 
 transfer OrCAD schematics to Protel, is that I want to use 
 OrCAD for doing the simulations, and Protel for the PCB 
 development (for me the simulation capabilities in Protel are 
 inadequate).

Darren

Why don't you just keep the SCH as Orcad and layout in Protel?

All you really need from the imported DSN is a netlist and matching
footprints in the PCB library available in the PCB editor. So no need
really to have a nice SCH in Protel, just increase sheet size to avoid
off sheet objects as I have seen some strange behaviour when compiling
with objects outside sheet border, all orcad imports :-)

You did not mention what version of Orcad you were translating from.

Yes the imports can be untidy, but usually the design is intact once you
pick the correct connectivity model.


John



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Re: [PEDA] P.S. Corrupted database

2004-06-02 Thread John A. Ross [RSDTV]
Steve

Might not help but, have you tried exporting the DDB contents to a folder, create a 
new project DDB
with a different name in it, using the windows file system (link) instead?

My memory is fuzzy but I can recall an issue where it seemed the structure of the DB 
got damaged,
could be repaired and compacted as a separate operation but would cause errors and 
would either not
compact at close, or crash at close when trying to compact.

Worth a try

John



 

 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, June 02, 2004 3:56 AM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] P.S. Corrupted database
 
 I can still open PCBs in other databases, so it doesn't seem 
 to be the Protel installation itself. I did, however, try 
 deleting AdvPCB99SE.Ini in the Windows directory, to no avail.
 
 Steve Hendrix
 



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Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?

2004-06-01 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Abd ulRahman Lomax [mailto:[EMAIL PROTECTED] 
 Sent: Tuesday, June 01, 2004 5:00 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?
 
 At 11:23 PM 5/29/2004, Ian Wilson wrote:
If you have to type sentences into a dialogue box,
 
 That is what the Find Similar Object dialog is designed to stop you 
 having to do.  I really do get tired of typing this. Every 
 one new to 
 the query language should now write out by hand 100 times - 
 I know what the FSO is.
 
 I knew I should have just shut up and not put my tuppence worth in.
 
 No, Mr. Wilson's experience and commentary are extremely 
 valuable to us. 
 Mr. Wasti has, quite clearly, *not* learned how to use DXP 
 efficiently, so his comments are the voice of inexperience, 
 coupled with a measure of anger and frustration. Yes, it 
 should not have been this difficult to make the transition. 
 But DXP exists as it is.
 
 FOR N = 1 TO 100
 PRINT I know what the FSO is.
 NEXT


Mr Lomax

More painful like this :-)

(Ian, told you my coding skills were bad)

Just thought I would give you guys who write code for a living a laugh :-)

But the FSO/Inspector does need a tweak or more.

John



/*
*  I know what the FSO is
*/

#include stdio.h

void main()
{
char key;
int a;

printf(Do you know what the FSO feature is?\n\n);
printf(Type yes, then hit enter to continue\n);

gets(key);

printf(I know what the FSO is!\n\n);

for(a=1;a=101;a++)

if(a100)
{
printf(Do you know what the FSO feature is?\n\n);
printf(Type yes, then hit enter to continue\n);

gets(key);

printf(I know what the FSO is!\n\n);

}

else
{
printf(Finished);
}

}


















 
 
 
 
 



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Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?

2004-05-30 Thread John A. Ross [RSDTV]
I had dreaded a query language bashing session, Ill only add, as one of the users who 
find it a
stumbling block, due to this forced use of the language as a key feature in 2004, that 
I find most
things slower, not because of the application, but because I struggle with the 
required skill itself
(driving it as Ian put it), so the actual thought that must go into the desired  
process (and the
inevitable self doubt when doing it) actually takes longer than the physical typing it 
in and
running it.
Its my own limitations, simple. 
In Altiums eyes I guess that makes me stupid and not in the user demographic they wish 
to now
target. 
Will I make enough use of the language daily to ever have it as a natural skill, I 
doubt it.
Is the penalty in wasted time having to use it enough to make me move completely to 
another toolset,
no. I already use other tools and they have just as many plus points as weaknesses, in 
some cases
more weaknesses than DXP/2004 IMO.
But are there other features in 2004 that saves time/works better compared to 99SE, 
yes there is,
use of complex time consuming queries is a minority use of my time. 

But I would like to put forward, as it seems to be always missed out in such exchanges 
that the
engine was available, partly, in 99SE under EditQuery Manager. All that has really 
happened is that
Altium have allowed user 'open' access to the engine in DXP/2004. 
 
For a user to guess how big an impact this will have on their daily use I suppose they 
could ask
themselves how often they used the E,Q shortcuts? And how often they could not get 
'just exactly'
the type of query they wanted? They might find what took 2 to 4 goes in 99SE would 
take 1 in 2004.


But the 2004 product is definitely not focussed on the SCH/PCB market anymore, so 
changes to the IDE
was inevitable. It is more intimidating to find things than use them.

Terry, I would not take too much talk over the query system as doom  gloom, I was 
always lousy at
software development and gave up a long time ago trying to improve those skills, hence 
my issues
with the query system, but there are much more improvements in 2004 over 99SE than 
just this one
area.

John 


 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED] 
 Sent: Sunday, May 30, 2004 4:24 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?
 
 On 12:52 PM 30/05/2004, Hamid Wasti said:
 Ian Wilson wrote:
 
 The learning curve is very significant in only one major 
 commonly used 
 area but this affects quite a few aspects of the software.  
 The query 
 language is like a small programming language that you can use to 
 select and mask objects in your design.  This language uses boolean 
 operators (AND, NOT, OR etc) and a provides big bunch of key words 
 like InPolygon, InNet, InNetClass IsPad etc etc.
 
 I have installed 2004 today and intend to do one simple 2 
 layer orphan 
 board in it before deciding whether to stick with it or move to 
 Expedition. So my experience comes from doing 2 orphan boards in DXP 
 with
 SP2 and what I have heard from others.
 
 I have 2 issues with the new method of global editing.  
 First, it is slower.
 
 No - it is slower when you are not used to them and used to 
 using all the stuff that can speed them up (like saving 
 favourites, history, the y-hot key, selection memories 
 .).  They are slower when you drive them slower
 - this is not the user's fault necessarily but it is my 
 opinion that this the much talked about learning curve in a 
 nutshell.  The difference between being proficient at queries 
 and not is to a significant extent the difference between 
 productivity in P99SE and DXP/P2004 - if it has to be reduced 
 to a single thing.  Learn the query language, and the tools 
 that make it easier to use the querying language, and the 
 difference between globals in P99SE and multi-object edits in 
 DXP/P2004 becomes so much less significant that it is no 
 longer a buying decision point.  That is for some edits one 
 will be faster, for others it may be the other way around, 
 and for still others not possibly practically in P99SE - the 
 difference becomes insignificant in a project time scale.
 
 The question then comes up is what is the learning time to 
 become proficient?  Are you better off putting that to 
 learning another application altogether?  That is the really 
 hard decision - much harder than whether the old globals are 
 better or worse or slower or faster than the new.
 
 The 99SE global edits could be done with just the mouse, or 
 a couple of 
 characters.  This means that the right hand stayed on the 
 mouse and the 
 left hand stayed on the keyboard, which is how most of the time is 
 spent in the program.
 
 Exactly how I run the vast bulk of the ones I do.  The 
 complex ones require complex typing but these are things you 
 couldn't do in P99SE or you had to do as much typing.
 
If you have to type sentences into a 

Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?

2004-05-30 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Jim Monroe [mailto:[EMAIL PROTECTED] 
 Sent: Sunday, May 30, 2004 5:15 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?
 
 At 08:23 PM 5/29/2004, Ian wrote:
 The 99SE global edits could be done with just the mouse, or 
 a couple 
 of characters.  This means that the right hand stayed on 
 the mouse and 
 the left hand stayed on the keyboard, which is how most of 
 the time is 
 spent in the program.
 
 Exactly how I run the vast bulk of the ones I do.  The complex ones 
 require complex typing but these are things you couldn't do 
 in P99SE or 
 you had to do as much typing.
 
If you have to type sentences into a dialogue box,
 
 That is what the Find Similar Object dialog is designed to stop you 
 having to do.  I really do get tired of typing this. Every 
 one new to 
 the query language should now write out by hand 100 times - 
 I know what the FSO is.
 
 Ian,
 
 I don't have much DXP experience yet, but so far I'd be 
 inclined to agree with Hamid. For a number of simple 99se 
 edits that I've tried in DXP, I haven't been able to find a 
 simple DXP method.
 
 Here is an example: Change the designator height and width 
 for all '0402' 
 footprints.

Jim

For things like this I have just used the list panel as I found it easier than FSO.

In my favourites I keep some things like 
IsDesignator And HasFootprint('0603')
IsDesignator And HasFootprint('0805')
Then all I need do is edit selected columns and the change is applied.

If I follow the FSO route for this type of edit I find it a world of pain. 

Using FSO, select footprint=same, check create expression as it is a good guide to 
what FSO is
actually doing, and uncheck run inspector then click apply. 

You now have cleared other selections and correctly selected all 0402's. 

The FSO box has done its stuff. 

If you then hit F11 for inspector, or ran it from within FSO panel, then you may find 
no option to
change text height or width here, so now to the list panel, click the list tab at the 
bottom, right
click to remove non-selected items and you are left with a list of 0402 only, but 
still no option to
change text height, hmmm, where did it go? 

If the height/width attributes of the designator/comment text were always available at 
this point
for direct entry of the value to be applied you would have a home run, but no, too 
simple.

Well, the columns and or entries shown in the list panel or inspector are driven by 
background
generated scripts/queries which determine which columns are applicable for editing, 
the user has
little choice in this as far as I know. 

The expression generated by the FSO for select by footprint=0402 would be like 
(ObjectKind =
'Component') And (Footprint = '0402') and that just does not cut it as it does not 
apply
specifically to designators (guess). 

If in the list panel you right click on the column headers and 'choose columns' you 
will find the
display mode for all attributes set to Automatic. So if you then select to show text 
height / width
anyway then you get empty fields in that column which you cannot edit. If I can 
display the column I
would expect the fields for that record to be available. Dead end.

You would logically think that all attributes applicable to a selection of same 
footprint parts
would be available for edit after correct selection/filter by FSO but they are not, 
certainly I
would have expected text height/width to be available for edit in the inspector panel 
directly after
FSO for change. Unless some hidden, design or environment setting is stopping this, 
but I doubt it
as you can globally change the selections  name/comment visibility as well as
type/rotation/height/layer/lock unlock status So why not text height?

This I guess is exactly what you found right? 

This is a case where typing, or recall from favourites will be faster than FSO route, 
unless my
understanding is also flawed. 
Certainly recall from favourites IS faster than 99se for repetition,
F12,favourites,select,applyexpression and do your edit as selection criteria are 
already defined and
they can be as complex as you want. 

 This can be done in one dialog box with 7 mouse clicks 
 (excluding typing the new height/width values) in 99se. I 
 have not been unable to find a simple way to do this in DXP. 
 The problem I see in this case is that DXP does not select or 
 mask designators along with their components.
 
 I hope that you can prove me wrong.

John



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Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?

2004-05-30 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Hamid Wasti [mailto:[EMAIL PROTECTED] 
 Sent: Monday, May 31, 2004 2:47 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?
 
 John A. Ross [RSDTV] wrote:
 
 For things like this I have just used the list panel as I 
 found it easier than FSO.
 
 In my favourites I keep some things like IsDesignator And 
 HasFootprint('0603') IsDesignator And HasFootprint('0805') 
 Then all I 
 need do is edit selected columns and the change is applied.
 
 How many favorites will I have to save in order to get a baord done?

Hamid

Too many really, or none at all, depending on how you have set up library parts and 
default
primitives.

Your example was how to edit all RefDes size for 0402, I would be more likely to 
select 0402 on a
dense board and hide all text, which I can do from inspector without any queries. But 
everyone is
different.

 Using FSO, select footprint=same,...
 This I guess is exactly what you found right? 
 
 I don't know because I lost you 25% into the dissitation.  If 
 someone claims that that method is just as straightforward as 
 doing the change in 99SE, I have to wonder about them.

For what you wanted to do I have always gave up using FSO. Sorry you missed my point. 
I was actually
agreement with you, in part.

No it is not as straightforward as 99SE was for THIS example, because the attributes 
for text are
not always displayed in the inspector or list panels. These methods seem only to list 
attributes
common or similar to all of the selection.

Asking for the 99SE type global editing style to be adopted to DXP has been requested 
many times,
and more or less glossed over as it does not fit well within the product architecture. 

IMO it would not take much to adopt the Inspector/List panel to work better, but until 
the Product
managers at Altium see a need for it.. 

 Certainly recall from favourites IS faster than 99se for repetition, 
 F12,favourites,select,applyexpression and do your edit as selection 
 criteria are already defined and they can be as complex as you want.
 
 The problem is that the tasks are similar but not identical.  
 by the time you have a comprehensive lists of favorites, your 
 list is just too long to be manageable or practical.

Depends on what you are doing and the source of your netlist and libraries in many 
respects. 
Looking up a list of favourites is not as bad as having to continually repeat the same 
sequence in
99SE. 
If favourites were available in 99SE I would bet it would be a well used feature.

John



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Re: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?

2004-05-29 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Terry Harris [mailto:[EMAIL PROTECTED] 
 Sent: Saturday, May 29, 2004 6:26 PM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] Is Protel 99SE to 2004 upgrade a good idea yet?
 
 Having just been offered a discount to upgrade from 99SE to 
 2004 it's time to think about it again. (I knew those special 
 offers would keep coming). 
 
 Is it fit to use yet or should hold out for a couple more 
 service packs and the next special offer? 

Terry

IMO if you can use the additional features and prepared to tackle the learning curve 
head on then I
would say yes. 

I got a complimentary upgrade on one seat as I had already upgraded to DXP when DXP 
was first
released. I recently upgraded another seat from 99SE2004 and although I do not regret 
either
upgrade, the path to productivity for me is not as quick as I would like it to be due 
to my lack of
skills in some disciplines (mainly the query language) limit the advantages in 2004 
for me, more
than shortcomings of the software itself. 
In addition to these seats I have another 5 client supplied seats, none of those 
clients wish to
upgrade, so I have to jump between 99SE and 2004 quite regularly, and this is the 
worst way to work
and learn, split between 2 quite different environments, sometimes getting back to 
99SE seems like a
breath of fresh air, sometimes it seems a curse. If you can stick to using 2004 alone, 
then you will
have less of a learning curve than most I would guess and get productive with it far 
quicker than I.

Do not expect to get blown away with Situs, you will find it a bit of an anti climax 
compared to the
marketing hype and thus expectations from it. 

If you can make use of the multi channel feature then you will save time for sure as 
this is a core
improvement in 2004, you could cover the cost of the upgrade easily just with this one 
feature,
covering the retraining costs is an individual matter.

But if you do not feel limited by 99SE feature set, then I think the most honest 
answer is no.

In 2004 you will need to change a lot of the ways in which you currently work and 
think, but it is
not to bad.

The areas I have issues on are spread across the PEDA and DXP lists as are some of the 
benefits.

As an existing user I am quite sure your local Altium VAR would be more than happy to 
arrange an
extended trial for you, that way you can judge for yourself :-)

John



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Re: [PEDA] Flipping a PCB layout - 99SE

2004-05-18 Thread John A. Ross [Design]
 -Original Message-
 From: Abd ulRahman Lomax [mailto:[EMAIL PROTECTED] 
 Sent: 18 May 2004 18:33
 To: Protel EDA Forum
 Subject: Re: [PEDA] Flipping a PCB layout - 99SE
 
 snip 

 If the old track does not form a loop with the new, it will 
 be left in place. This is not an antenna removal tool.

Just a quick $0.02 worth

Bad use or misunderstanding of this feature, along with bad/no grid
choices can actually be one of the sources of antennas in Protel

John



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Re: [PEDA] TO-263 and TO-220 footprints?

2004-05-17 Thread John A. Ross [Design]
 -Original Message-
 From: Peter Moreton [mailto:[EMAIL PROTECTED] 
 Sent: 17 May 2004 12:48
 To: [EMAIL PROTECTED]
 Subject: [PEDA] TO-263 and TO-220 footprints?
 
 
 Hi, I am trying to create a simple PCB using Protel 99SE, and 
 am nearly there, but cannot seem to find footprints for an 
 LM2940 regulator in a TO-263 package, and a MC7806 regulator 
 in a TO-220 (horizontal) package. Surely these commonly used 
 footprints already exist in the PCB libraries?

Peter

I would have thought you would have made these yourself. 

Personally I never liked to use footprints I have not optimised for the
process they will go through, but that's me. 

The TO220 ones definitely exist in the 99SE libraries.

Anyhow you can find a quick dump here of footprints that might help.

http://www.proteluser.com/bbs/showthread.php?t=62


Or a copy of Brian libraries here may help even more

http://www.proteluser.com/bbs/showthread.php?t=17

 I'm tearing my hair out (what's left of it!) -  about to 
 redesign the PCB in Eagle!

No comment :-)

John


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Re: [PEDA] 3d viewers.

2004-05-17 Thread John A. Ross [RSDTV]
You could try http://www.qualecad.com/

John 

 -Original Message-
 From: Darcy Davis [mailto:[EMAIL PROTECTED] 
 Sent: Monday, May 17, 2004 6:10 PM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] 3d viewers.
 
 Hey Guys,
 
 As a consumer products development company, we're continually 
 trying to shrink our pcb into a smaller form factor. 
 Therefore, it would be really nice to be able to export 3d 
 files that we could assemble into 3d plastics models in order 
 to do clearance checking etc. This is a necessity for us, 
 however right now I do this manually. I know there are a 
 couple products available as add-ons for Protel99SE. Has 
 anybody used either View3d, or Protel IDF 3d Modeler from 
 Desktop EDA? What do you think of them?
 
 Darcy Davis
 Design Engineer,
 Dynastream Innovations, Inc.
 
 



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Re: [PEDA] OT: Mentor PADS comparison

2004-05-16 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED] 
 Sent: Monday, May 17, 2004 12:17 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] OT: Mentor PADS comparison
 
 snip 

   Even with a net label on the wire, I still see a diode's pins 
 shorted. Yes, I have a junction but both pins are shorted.
 Am I missing any thing obvious here?
 
 Yes. I wrote that the autobreak facility was in DXP. Now, if 
 I recall correctly -- I can't check on this notebook because 
 my 99SE installation on it is broken -- you can drop a 
 resistor on a wire and the wire *will* be broken, but the 
 middle wire segment is not deleted. You have to manually 
 delete it, one extra step. In practice, you might want to 
 move it out of the way before deleting it But I'm not 
 sure of my memory. It has become simpler in DXP.

Does not work for me in 99SE. It is really a DXP feature.

99SE  If I have an existing wire and drop a resistor onto it 2 junctions are placed 
at each
resistor pin. But no separate wire segment is created 'under' the part between the 2 
pins. 

If an attempt is made to select the wire segment between the 2 resistor pins (under 
it) then the
whole wire will be selected. No additional 'nodes' have been added at the junctions 
created at the
resistor pins or under the part to isolate that wire segment.

Unless I am missing some setting ? 

John



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[PEDA] My connectivity woes

2004-05-14 Thread John A. Ross [RSDTV]
He all

I just wanted to conclude the last issues I mentioned on the global connectivity 
problems I was
having with a legacy design which was 9899SE2004.

The warnings issues were a combination of a few things.

There was some net labels and ports lurking under some connections which were 
connected to power
ports, must have been me who moved them there when removing my power port connectivity 
routes off
the top/child sheets. I know others worked on the project, but I did a lot of work on 
this one so
I'll need to carry the can for it. Some ports were set to No Style and 0 width so 
looked like just
net labels.

But the others I have had to concede defeat on. I deleted the last 2 offending sheets 
which
indicated error from the project and replaced them with ones from the previous 
revision which had no
PCB (only value) changes. 
This fixed the problem. 
I exported both sheets as ascii and ran a compare on them, some differences were noted 
around the
208QFP and on the SDRAM parts, invalid characters that did not belong. I suspect that 
this design
may have been subject to the P98 bug which could cause SCH to be corrupt when using 
update from
cache feature, it's a posibility that this came back to bite me in the ass.

I can now run the PCB update and no changes are made to the PCB and no errors 
introduced, so the SCH
seems safe now.

Thanks all who helped.

John



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Re: [PEDA] OT: Mentor PADS comparison

2004-05-13 Thread John A. Ross [Design]
 -Original Message-
 From: Protel Hell [mailto:[EMAIL PROTECTED] 
 Sent: 11 May 2004 20:08
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] OT: Mentor PADS comparison
 
 keep in mind with PADS 2004 you have the option to use Orcad, 
 PowerLogic, and ViewDraw as the schematic capture. depending 
 on what you are trying to do will determine which you will 
 want to use, but in reality the one you use will be the one 
 that you either are told to use or are familiar with.

Hmmm, Protel ? 

You can use any capture package that will produe a compatible netlist
(as long as the fottprint names match the decal names).

 Snip 
 
 you get what you pay for, when buying CAD you should spend 
 what you can afford, 

Wrong attitude my freind, you spend what is needed to get the job done
right. 

By spend I mean investing in ones own skills as well as the tools, tools
are dumb unless driven by someone who knows what they should be doing.

If that means multiple tools and some translation so be it. 

If the cost is beyond ones means then you are in the wrong job.

Just a few $0.02 worth

JOhn




 
 
 From: John A. Ross [RSDTV] [EMAIL PROTECTED]
 Reply-To: Protel EDA Forum [EMAIL PROTECTED]
 To: 'Protel EDA Forum' [EMAIL PROTECTED]
 Subject: Re: [PEDA] OT: Mentor PADS comparison
 Date: Thu, 6 May 2004 23:37:05 +0100
 
   -Original Message-
   From: Nukien [mailto:[EMAIL PROTECTED]
   Sent: Thursday, May 06, 2004 8:52 PM
   To: Protel EDA Forum
   Subject: [PEDA] OT: Mentor PADS comparison
  
   Hi All -
  
   Somewhat offtopic here ...  I'm currently a 99SE devout user
   - we haven't made the switch to 2004 yet.  I've been 
 discussing it 
   with some colleagues, and a couple of them have gone to Mentor's 
   PADS 2004 product.  They're still new at it, but are definitely 
   singing praises.
 
 Dean
 
 I am Jealous :-), I have not got my Pads 2004 copy yet, it 
 was released 
 then a patch was done for some issues (mostly fab releated) 
 but it has 
 not hit my desk yet.
 
 Thought I would add that in, for the benefit of one of the 
 employees at 
 my Mentor VAR who also frequents this list :-)
 
   Does anyone else here have any experience with it at all 
 ?  I would 
   dread the learning curve - going to DXP/2004 while still 
 a curve, is 
   at least in the same family/paradigm.  I would really 
 like to hear 
   what some of the pros and cons are between DXP/2004 and PADS/2004.
 
 But knowing Pads as I do it wont have changed that much from 
 5.01, it 
 is a very nice tool, never liked Plogic much and that is 
 where you are 
 going to miss out big as the capture side is a dinosaur to say the 
 least.
 
 You learning curve will be less with DXP2004 for sure, it looks 
 different, and has different design approach, but IMO it has 
 been made 
 to look WAY more complex than it needs to be, considering a lot of 
 things in it are the same.
 
 There are a lot of features I would have liked to see in DXP that 
 exists in pads, but I fear my requests will fall on deaf ears 
 sometimes, but do not be fooled, there are also a lot of things in 
 Protel I would like to see in Pads as well.
 
 All that glitters is not gold :-)
 
 What I would strongly advise is that you make a design spec, say a 
 small micro that flashes some LEDs, well, it may as well 
 look good, and 
 do it in the most complex and difficult way.
 
 Keep notes  times on this exercise, likes dislikes, put 1 LED per 
 sheet, the micro on another, draw ALL the Decals/Footprints 
 yourself, 
 bring the design into PowerPCB and make a complex board 
 outline and a 
 few copper / board cut-outs and some polygons / copper pours. Then 
 produce the fab files (if you use your own SMT place 
 equipment then you 
 will like the CAM outputs)
 
 Now repeat exactly the same process  design in Protel and 
 when you are 
 finished compare notes.
 
 Then you will have a well formed opinion and substance to back it up 
 when confronting your colleagues.
 
 Anytime I have seen some-one that impressed with a Pads demo 
 was when 
 it is done by an experienced Pads user/sales person.
 
 Hope this helps
 
 John
 
 
 
 _
 FREE pop-up blocking with the new MSN Toolbar   get it now! 
 http://toolbar.msn.com/go/onm00200415ave/direct/01/
 
 
 


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Re: [PEDA] DataBase Size too big!

2004-05-10 Thread John A. Ross [Design]
 -Original Message-
 From: Michael Biggs [mailto:[EMAIL PROTECTED] 
 Sent: Monday, May 10, 2004 4:20 PM
 To: Protel EDA Forum
 Subject: [PEDA] DataBase Size too big!
 
  After designing a PCB in 99SE SP6 and my database file keeps 
 getting bigger. Of coarse I always save different file names 
 of my design every so often. But here is my question, after I 
 have deleted all the extra files and deleted my recycle bin 
 files why is my database file still very large? I could start 
 a new database with the extracted .pcb file and it seems to 
 keep all the rules and preferences, but is this the only way?
  I know this has been discussed somewhere, I just couldn't 
 find it in the archive.

Michael

Have you compacted the database?

Are you using DDB file system?

The DDB database size grows at an exponential rate if not compacted at
close.

Try the little un-named 'Arrow Down' button on the top left of the
window, drop down to 'Design Utilities' and you will get a 'Compact 
Repair Box'

I would suggest first backup your database to another location, then
first run a 'repair' pass, then run 'compact'

After that check the box for 'Perform Compact After Closing Design' box
and the operation will be automatic after each session is closed.

How big is your DDB file?

You can export / import rules from within the PCB editor
DesignRulesMenu or Right Click on workspaceRulesMenu

Good luck

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==   


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Re: [PEDA] OT: Mentor PADS comparison

2004-05-07 Thread John A. Ross [RSDTV]
Rene

Show a man what to do and he will retain 50% of what he is told at the most, maybe :-) 
a day is
nothing, even with an experienced user.

Make a man do it himself and that ratio is a lot more :-)

No pain, no gain as they say sometimes.

John

 -Original Message-
 From: Rene Tschaggelar [mailto:[EMAIL PROTECTED] 
 Sent: Friday, May 07, 2004 2:32 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] OT: Mentor PADS comparison
 
 John A. Ross [RSDTV] wrote:
 
 
  
  What I would strongly advise is that you make a design spec, say a 
  small micro that flashes some LEDs, well, it may as well 
 look good, and do it in the most complex and difficult way.
  
  Keep notes  times on this exercise, likes dislikes, put 1 LED per 
  sheet, the micro on another, draw ALL the Decals/Footprints 
 yourself, 
  bring the design into PowerPCB and make a complex board 
 outline and a 
  few copper / board cut-outs and some polygons / copper pours. Then 
  produce the fab files (if you use your own SMT place equipment then 
  you will like the CAM outputs)
  
  Now repeat exactly the same process  design in Protel and 
 when you are finished compare notes.
  
  Then you will have a well formed opinion and substance to 
 back it up 
  when confronting your colleagues.
  
  Anytime I have seen some-one that impressed with a Pads 
 demo was when 
  it is done by an experienced Pads user/sales person.
 
 While that would be great it is not payable in terms of time 
 spent to become familiar. Rather spend a day with a 
 professional user and go through all that.
 
 Rene
 --
 Ing.Buro R.Tschaggelar http://www.ibrtses.com Your newsgroups 
 @  http://www.talkto.net
 
 
 



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Re: [PEDA] Connectivity - Netlist issues

2004-05-06 Thread John A. Ross [Design]
 -Original Message-
 From: Abd ulRahman Lomax [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, May 06, 2004 5:08 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Connectivity - Netlist issues
 
 At 07:14 PM 5/5/2004, John A. Ross [RSDTV] wrote:
   From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]
 [...]I also assume
   that you have verified that the problem does not exist in 
 the 99SE 
   version of the design. If [this is] not true, please correct me!
 
 No, this is in the 99SE design I am preparing for DXP2004 import.
 
 Okay, let's see if I've got it right now. If there is a bug, 
 it is a 99SE bug. You have a 99SE schematic that, *in 99SE*, 
 generates ERC errors and which assigns the power nets 
 contrary to expectation (i.e., it splits them, as if they 
 were local, not global). You also have problems when you try 
 to import the schematic due to multiple sheet entries with 
 the same name on the same symbol.

More or less, I had already translated 14 designs througout last year,
some a lot bigger than this one to DXP7.x, then 2004.

I had already encountered the multiple sheet entry  one port (many to
one) but thought I would ask if anyone had a smart workaround to get
that working in DXP as re-drafting is a pain and potential point for
error.

However this design threw me a curve ball with this connectivity issue.
I really do reckon that the connectivity may be OK, but the net name is
somehow being introduced twice with same nodes or partial matches and
that is the error rather than broken connectivity which is just the
result of the badly loaded netlist. I am being cautious here as I have
found the ERC and Netlist load process seem to treat the netlist
differently.


 When opened in DXP, the compiler chokes because of the power port 
 connectivity issues (assumes demotion to local net for 
 power) and also 
 chokes on the multiple sheet entries.
 
 The top sheet can be easily rewired to remove the sheet entry issues 
 but the connectivity issue is driving me nuts.
 
 Of course, fixing the sheet entry issues *might* fix the 
 other problem, though the connection would be obscure. 

Nope, tried that already
 
 If my new assumptions are correct, this is a good example of 
 why it is important to (1) set the ERC matrix to show all 
 possible error conditions and warnings, (2) suppress 
 single-pin net warnings where the single-pin condition is 
 intentional, and (3) track down and eliminate all errors, 
 even if they might seem to be harmless. Sometimes an engineer 
 will look at an error, say I don't see anything wrong here 
 and so they pop a No-ERC directive on the error, thus 
 suppressing it. Very bad idea. Even if it seems arbitrary, it 
 is much better, i.e., safer, to satisfy the ERC by how one designs.

I never like to see any errors, I also disagree with turning any
warnings off including single pin nets. 

For single pin issues in 99SE I usually just placed a 0.5x0.5mm SMT test
pad on those net, so no warnings :-)  Taking them out the BOM was a
pain, but better than an error

 If you are in a hurry, understand that haste makes waste and 
 if you decide to barge ahead anyway, at least don't suppress 
 the error message! Leave it, there is no law that a schematic 
 must be free of error markers, and the marker and message 
 next time ERC is run are a reminder that the paperwork is not 
 done. Using a No-ERC marker to suppress the error or 
 not-clearly-understood warning is like spraying perfume 
 instead of cleaning up the mess

Don't quite get that one.

As you picked up from the other message I can be 'excessively neat' and
the whole reason for me attacking the issue was to get to the bottom of
it.

The workaround of connecting power rails using ports/sheet entries is in
theory harmless, and actually only adding redundancy to the connectivity
model of global power ports. 

But you are right, I guess looking back, I did more or less sweep the
power port connectivity issue under the carpet on this one due to a
successful workaround, not good practice at all really. 

Trust me, that's not normal for me you can be sure.

 snip 

   So I intend to pick through the netlist first then all 
 sheets one at a time.
 
 That should not be necessary. Since you have an obvious test 
 for the error condition, you can delete whole sheets; if the 
 error condition remains, you have not deleted the problem 
 condition, so you don't need to even look at the sheet you 
 deleted. (Of course, if there is more than one instance of 
 the problem, you might have deleted one of them, but you'll 
 find that out later, and at that time you'll likely know 
 exactly what to look for.)

There a few designs like this, not all of them exhibit the same
behaviour.

I can run some macros and scripts on the netlist to strip it down, if I
can follow the sheet order I think ill at least get the right area as
all my sheets follow a common annotation methodology. Perhaps I should
explain that one. If I have say an output

Re: [PEDA] Connectivity - Netlist issues

2004-05-06 Thread John A. Ross [Design]
 -Original Message-
 From: Abd ulRahman Lomax [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, May 06, 2004 5:35 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Connectivity - Netlist issues
 
 At 07:51 PM 5/5/2004, John A. Ross [RSDTV] wrote:
 snip 

 There is a bit of pressure on me just now on other projects 
 so I might 
 be overlooking something obvious, too much haste is usually counter 
 productive.
 
 Yes. You can focus on what needs to be done now; as to all 
 the upgrades, I'd suggest trying each of them, if it imports 
 fine, or with a few obvious and easily fixable problems, then 
 finish it. If not, set it aside (with the one you've already 
 described).

I think I might have gave the impression that this was my first
translation, I have designs running in DXP7.x that I translated OK, I
have others that need to be done, but the one in question is an anomaly
at present.

The most common errors I get are either multiple sheet entries of same
name (already covered that) and 'off grid' warnings. 

Off grid warnings are a real pain also as I never understood it. All my
SCH in 98/99SE were on 5/5 grid as was all lib parts. I never use off
grid objects. Perhaps the DB format changing causes issue.  

 If, after you've worked with a few, it looks like most of the 
 projects have serious problems, then you might put the whole 
 translation project on hold and come back to it when you can, 
 or when one of the translations becomes hot.

The translation process at the moment is on an 'as needed ' basis, many
have been done, but before any more are done I would like to get any
issues documented and procedures formed around them so that I am not
always the one that has to do it. 

That is to say a set of procedures to prepare a 99SE design as DXP
friendly to reduce time. 

In 99SE any changes can be done, a forward annotation update to the PCB
and a full PCB DRC done to validate there are no electrical changes or
otherwise that will effect PCB design integrity. 

 If there *are* a lot of problems, it would seem that 99SE 
 error conditions were routinely being ignored and dealt with 
 in an ad-hoc manner, thus accumulating problems, pointing out 
 how failing to fix an error condition when it is first found 
 can lead to more error conditions in the future, etc.

Not the cases, this designs stubborn attitude is an anomaly, albeit an
anomaly that may or may not exist across many designs, a lot of the
designs have had power rails routinely connected via sheet entries and
sheet ports regardless of any error as a precautionary procedure. 

This has been done since P98. As far as risk goes, that could be viewed
as one, but as I never use a connectivity model other than sheet
symbol/port connections the results are consistent and predictable and
never had it effect a PCB. But its always possible.

As DXP2004 did not like this import, (warned that net was reduced to
local) , on this design, as I have done successfully before, I
removed all the top sheet level power ports and sheet entries, then
edited each sheet to remove the ports/net labels.

I still suspect I have either made a mess of the sheet edits in
frustration and hidden or moved a net label or net naming object, or the
design has a corrupt SCH symbol, or had an update done from a library
other than the company validated one, perhaps with hidden pins or pins
with power nets assigned (if I find that, I will hang the SOB that did
it, as company procedure bans hidden pins or pins with nets pre-assigned
when drafting SCH symbols) 

But my Friday afternoon mission is to nail this down, it will be done
before its time to go home.

All help is greatly appreciated.

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==   


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Re: [PEDA] OT: Mentor PADS comparison

2004-05-06 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Nukien [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, May 06, 2004 8:52 PM
 To: Protel EDA Forum
 Subject: [PEDA] OT: Mentor PADS comparison
 
 Hi All -
 
 Somewhat offtopic here ...  I'm currently a 99SE devout user 
 - we haven't made the switch to 2004 yet.  I've been 
 discussing it with some colleagues, and a couple of them have 
 gone to Mentor's PADS 2004 product.  They're still new at it, 
 but are definitely singing praises.

Dean

I am Jealous :-), I have not got my Pads 2004 copy yet, it was released then a patch 
was done for
some issues (mostly fab releated) but it has not hit my desk yet.

Thought I would add that in, for the benefit of one of the employees at my Mentor VAR 
who also
frequents this list :-)

 Does anyone else here have any experience with it at all ?  I 
 would dread the learning curve - going to DXP/2004 while 
 still a curve, is at least in the same family/paradigm.  I 
 would really like to hear what some of the pros and cons are 
 between DXP/2004 and PADS/2004.

But knowing Pads as I do it wont have changed that much from 5.01, it is a very nice 
tool, never
liked Plogic much and that is where you are going to miss out big as the capture side 
is a dinosaur
to say the least.

You learning curve will be less with DXP2004 for sure, it looks different, and has 
different design
approach, but IMO it has been made to look WAY more complex than it needs to be, 
considering a lot
of things in it are the same.

There are a lot of features I would have liked to see in DXP that exists in pads, but 
I fear my
requests will fall on deaf ears sometimes, but do not be fooled, there are also a lot 
of things in
Protel I would like to see in Pads as well.

All that glitters is not gold :-)

What I would strongly advise is that you make a design spec, say a small micro that 
flashes some
LEDs, well, it may as well look good, and do it in the most complex and difficult way.

Keep notes  times on this exercise, likes dislikes, put 1 LED per sheet, the micro on 
another, draw
ALL the Decals/Footprints yourself, bring the design into PowerPCB and make a complex 
board outline
and a few copper / board cut-outs and some polygons / copper pours. Then produce the 
fab files (if
you use your own SMT place equipment then you will like the CAM outputs)

Now repeat exactly the same process  design in Protel and when you are finished 
compare notes.

Then you will have a well formed opinion and substance to back it up when confronting 
your
colleagues.

Anytime I have seen some-one that impressed with a Pads demo was when it is done by an 
experienced
Pads user/sales person.

Hope this helps

John



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Re: [PEDA] Connectivity - Netlist issues

2004-05-05 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, May 05, 2004 6:56 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Connectivity - Netlist issues
 
 At 08:12 AM 5/5/2004, John A. Ross [Design] wrote:
 However I made a small test board, parent + 5 child sheets using the 
 same ID key.sch file in it and it does not show the error under the 
 same enviroment so the problem seems localised to the other 
 design (or 
 the number of sheets).
 
 Very good. Now, if you've been specific about this, please 
 refresh my memory. My impression is that the problem exists 
 only in DXP, and with this specific design. I also assume 
 that you have verified that the problem does not exist in the 
 99SE version of the design. If these are not true, please correct me!

No, this is in the 99SE design I am preparing for DXP2004 import.

When opened in DXP, the compiler chokes because of the power port connectivity issues 
(assumes
demotion to local net for power) and also chokes on the multiple sheet entries.

The top sheet can be easily rewired to remove the sheet entry issues but the 
connectivity issue is
driving me nuts. 

I actually enjoy these challenges but when time is against you it takes the fun out of 
it :-)

I have been collecting some notes, caveats and precautionary tactics to move the last 
of these 99SE
designs I have to DXP2004 (about 60 or so) which is why I have been re-evaluating my 
workaround of
wiring up power nets on the top sheet (thus bypassing the assumed 'global' power 
connectivity). The
end document will be formed to a procedure for others to follow and it is a lot faster 
and easier to
edit / prepare it in 99SE than in DXP2004.

Although I have had to put this aside for the moment, currently my train of thought is 
that a wire
label or other additional net naming object is present or exists on some other sheet 
than the id
key.sch one, possibly hidden or moved under a component with the POE touching a pin / 
wire which is
already connected to a power object. 
This would make sense to me. 
It is not the first time I have seen the error markers in 99SE placed at the conflict 
target
position and not the source (due to position in netlist). 
So I intend to pick through the netlist first then all sheets one at a time.

John



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[PEDA] Connectivity - Netlist issues

2004-05-04 Thread John A. Ross [Design]
Hi

I have had a few discussions previously on this list about the
connectivity models within 99SE and how I have had in some cases seen
errors where power ports are not treated as global when using Sheet
Symbols/Port connections.

Before committing the last of my larger designs to 2004 I would like to
track down the error of my ways.

Some screenshots here
http://www.proteluser.com/bbs/showthread.php?p=68#post68

A short summary is that the design has one parent sheet and the rest are
child sheets. No complex hierarchy. Connectivity model is set to sheet
Symbol / Port connections as it should be. This is a real design in
production, not a test board.

But Update PCB fails with errors. If previewed it wants to rip up the
power nets completely.

If I generate a netlist and then try to load it manually I get a similar
issue but with more detail, this time the power nets are ripped up and I
get netlist load errors 'net already exists' as it tries to add many
instances of the same power net name (one instance per sheet).

If I add a sheet entry to each sheet symbol with the name of the power
net and as a sheet port to the child sheets all is happy, no errors.

My understanding was always that power ports were always global, but I
seem to have an exception here, unless I cannot see the wood for the
trees.

Any suggestions appreciated.  

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==   


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[PEDA] Sheet entry methodologies in 99SE

2004-05-04 Thread John A. Ross [Design]
Does anyone else use this method for keeping top sheets clean in 99SE?

See screenshot http://www.proteluser.com/bbs/showthread.php?p=71#post71

If you look at net labels HA[0..18], HD[0..15] and HA20/HA21/WE0 you
will see that I have added additional sheet entries of the same name
while using only a single port on the child sheet. 

Sort of a one (child sheet) to many (parent sheet) and it seems to work
fine.

But Importing this to 2004 and compile, the compiler does not like this
at all. I tried creating the same number of sheet entries as the sheet
symbol has but it seems 2004 will choke on same name items.

I have been given today the task of translating some more 99SE designs
which have between 20-40 sheets and it seems this small workaround has
come back to bite me. If anyone has any ideas on a workaround to save
redrawing the top sheets 'ugly' then please let mw know.

Best regards

John



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Re: [PEDA] Sheet entry methodologies in 99SE

2004-05-04 Thread John A. Ross [Design]
Ok, got some opinions, thanks

Looks like I will need to rework the top sheet connectivity, I had
already guessed as much, just wanted a final exploration of the subject
before picking up the mouse. 

As Mr Lomax put it There is such a thing as an excess of neatness!
which seems to apply quite well in this case.

It has been a personal preference of mine to keep certain top sheets
this way, I have never liked crossed lines for wires or buses, bus
structures can look confusing when printed in monochrome in Protel.

I actually started doing this out of a remedial action brought about by
client complaint as a compromise due to Protel not supporting complex
buses so control lines had to be drawn seperately from the bus itself.
The previous package I used prior to P98 did support complex buses and
this was what they were used to (wires did not need to cross busses for
connectivity)

Thanks all :-)

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==   

 -Original Message-
 From: Leo Potjewijd [mailto:[EMAIL PROTECTED] 
 Sent: Tuesday, May 04, 2004 5:33 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Sheet entry methodologies in 99SE
 
 At 04-05-2004 16:48, John A. Ross [Design] wrote:
 Does anyone else use this method for keeping top sheets 
 clean in 99SE?
 
 See screenshot 
 http://www.proteluser.com/bbs/showthread.php?p=71#post71
 
 If you look at net labels HA[0..18], HD[0..15] and HA20/HA21/WE0 you 
 will see that I have added additional sheet entries of the same name 
 while using only a single port on the child sheet.
 
 Sort of a one (child sheet) to many (parent sheet) and it 
 seems to work 
 fine.
 
 Well, I don't use that method.
 For one reason, it makes it less clear which bus goes where.
 
 But Importing this to 2004 and compile, the compiler does 
 not like this 
 at all. I tried creating the same number of sheet entries as 
 the sheet 
 symbol has but it seems 2004 will choke on same name items.
 
 Apparently 2004 gets confused too.
 
 I have been given today the task of translating some more 
 99SE designs 
 which have between 20-40 sheets and it seems this small 
 workaround has 
 come back to bite me. If anyone has any ideas on a 
 workaround to save 
 redrawing the top sheets 'ugly' then please let mw know.
 
 I make branches in buses using bus entries and specify what 
 bus members are in each branch using net labels; if the bus 
 goes two places with all its members I use a junction and 
 label each section.
 That way the clutter is minimal and it is always clear which 
 bus goes where with what members.
 
 
 Leo Potjewijd
 hardware designer
 Integrated Engineering B.V.
 
 [EMAIL PROTECTED]
 +31 20 4620700
 
 
 


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Re: [PEDA] Need more software

2004-04-14 Thread John A. Ross [Design]
 -Original Message-
 From: Mike Reagan [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, April 14, 2004 4:56 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Need more software
 
 snip 

 Camtastic is a step in the right direction. Again I don't 
 like the integration. Specifically, I don't like the fact 
 that every time you generate gerbers it automatically pops 
 up.  Protel this is waist of my time.

Mike

You can disable this by telling it not to open output files after
generated.

Project Options, Output Options, Open output after compile, uncheck.

I know that makes no sense because of this compile word. 

Ian drops hints about the poor choice of the word 'compile' quite
regularly in his postings, but it is still there, perhaps in SP1 ? :-) 

As regards, net antennas  Camtastic, I just tried a board with a spare
2mm trace sticking out from a 1.2mm via and the PCB Design Check comes
up clean. I am looking to see if it is me, or the tool before posting
more.


John


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Re: [PEDA] Need more software

2004-04-14 Thread John A. Ross [RSDTV]
Sorry Mike

Assumption is the mother of all Or so they say

Yes I assumed it was in a project :(, never tried it any other way

John



 -Original Message-
 From: Mike Reagan [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, April 14, 2004 6:01 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Need more software
 
 John
 See, now Ya'll dont read everything I write.  No, you can not 
 disable Camtastic unless a project is open.  I only design 
 PCB so the Project Button is muted and can not be disabled.  
 Trust me  I ve been thru this with tech support also Mike
 
 
 
 
 
 -Original Message-
 From: John A. Ross [Design] [mailto:[EMAIL PROTECTED]
 Sent: Wednesday, April 14, 2004 12:21 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Need more software
 
 
  -Original Message-
  From: Mike Reagan [mailto:[EMAIL PROTECTED]
  Sent: Wednesday, April 14, 2004 4:56 PM
  To: 'Protel EDA Forum'
  Subject: Re: [PEDA] Need more software
  
  snip 
 
  Camtastic is a step in the right direction. Again I don't like the 
  integration. Specifically, I don't like the fact that every 
 time you 
  generate gerbers it automatically pops up.  Protel this is 
 waist of my 
  time.
 
 Mike
 
 You can disable this by telling it not to open output files 
 after generated.
 
 Project Options, Output Options, Open output after compile, uncheck.
 
 I know that makes no sense because of this compile word. 
 
 Ian drops hints about the poor choice of the word 'compile' 
 quite regularly in his postings, but it is still there, 
 perhaps in SP1 ? :-) 
 
 As regards, net antennas  Camtastic, I just tried a board 
 with a spare 2mm trace sticking out from a 1.2mm via and the 
 PCB Design Check comes up clean. I am looking to see if it is 
 me, or the tool before posting more.
 
 
 John
 
 
 



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Re: [PEDA] Need more software

2004-04-14 Thread John A. Ross [RSDTV]
, or in the case of new projects, the group root folder.

If files are imported to the project, and do not belong to a file group, a
copy of the imported files should be auto copied to a /root/project/file
type folders first then the /root/project/imports folder if the file type is
not assigned (documents, PDF...). They can always be deleted later.

With the exception of the next point, the above is not a big deal, it is
merely looking up defaults, very little to leave to chance, and elimination
of error or just saving time is a good thing right?

The view / structure of these files/folders should be followed in the
Project browser window in DXP.

##

The ODB++ standard defines a structure for file sorting, perhaps we need a
DXP file structure standard.

Do not know about others, but I detest playing 'hunt the file' games, or not
knowing what files are linked to what projects as it uses link files. The
file structure and project structure should be 'self contained' or self
explanatory, with or without DXP open.

Best Regards

John A. Ross

RSD Communications Ltd
8 BorrowMeadow Road
Springkerse Industrial Estate
Stirling, Scotland FK7 7UW

Tel +44 [0]1786 450572 Ext 225 (Office)
Tel +44 [0]1786 450572 Ext 248 (Lab)
Fax +44 [0]1786 474653
GSM +44 [0]7831 373727

Email   [EMAIL PROTECTED]
WWW http://www.rsd.tv
==


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You are currently subscribed to dxp For details about using the list,
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 Mike Reagan
 
 
 
 
 
 
 



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Re: [PEDA] Good schematic/PCB development suite recommendation?

2004-04-12 Thread John A. Ross [Design]
FYI, I reside in the UK but spend a lot of working time also in Sweden
and Germany, not so much in China/Korea any more as those operations are
well up and running now.

US orientated, political nomenclature means little to me although I
guess, I better get used to it for NAB next weekend if I want to
appreciate the humour ;)

John


 -Original Message-
 From: Abd ulRahman Lomax [mailto:[EMAIL PROTECTED] 
 Sent: Monday, April 12, 2004 2:56 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Good schematic/PCB development suite 
 recommendation?
 
 At 07:16 PM 4/11/2004, John A. Ross [RSDTV] wrote:
 You can hardly call me silent [...]
 
 I'm not sure where Mr. Ross lives, but in the United States 
 various politicians have been known to use the term silent 
 majority to claim that anyone who disagrees with them merely 
 represents some extremist fringe, and they are the true 
 spokespeople for the majority.
 
 My point was that we don't know how the majority feels simply 
 from how we individually feel, nor do we necessarily know it 
 from the squeaky wheels. 
 This is *not* a criticism of squeaky wheels, nor is it any 
 attempt to denigrate Mr. Ross or what he has been saying.
 
 As far as being coherent, I will devote as much time, 
 documentation and 
 effort as otherwise required to get my point across, on one simple 
 condition.
 
 In my usage of the word, then, Mr. Ross is a single photon. 
 Coherent as I used it would mean some coordinated 
 expression of users, not merely an individual expression.
 
 That is as long as I believe my efforts are not wasted, nor 
 in vain, or 
 that they are actually being acknowledged at all.
 
 Yes, though the last clause is ... incoherent. :-) At least I 
 couldn't quite make sense of it. But the point is clear from 
 the first part. 
 (Coherent is here used to mean unintelligible, which is 
 *not* how I was using it in my previous post.)
 
 The last point is Altiums weakness. An insular community and 
 train of 
 thought. There are many specialists who could compile a survey for 
 Altium, in my experience home grown surveys, even by the most 
 experienced 'marketing' types is flawed from the start.
 
 I don't know what kind of surveying Altium has done. I've 
 received informal calls, and it is possible that something 
 was being compiled from these. But I do have in mind a more 
 active form of communication between users and the company.
 
 I see helping other users without reward a positive use of my time.
 
 As do I.
 
 If I think for a moment I am wasting my time I would rather 
 spend it on 
 my kids  my family, they are by far my preferred future investment.
 
 Understood.
 
 I guess you just see my comments as being incoherent, ineffective, a 
 waste of your reading tome and of no practical use. So be it.
 
 No, that is not at all how I see Mr. Ross's writing. When I 
 see writing that is a waste of time I pass it by!
 
 Mr. Ross, unfortunately, appears to have taken some very 
 general comments I made as if they were directed at him, 
 merely because his post triggered the observations. I'll 
 quote what I wrote that might have occasioned this:
 
 Anyway, I'd like to see better communication between Altium 
 and the users, and that is going to require a certain level 
 of organization of the users. 
 You can't communicate with someone who is incoherent, and 
 there is no active mechanism which will allow the users to 
 speak coherently.
 
 Incoherent did not refer to Mr. Ross, but to the body of 
 users -- all of us --, who have no means of communicating 
 coherently, that is, with one voice (ideally, representing 
 a broad consensus). The mailing lists function partially 
 toward this direction, sometimes, but not reliably.
 
 I'll ignore the other bait ;)
 
 There was an implicit invitation at the end of my post for 
 users to join in developing coherence (on 
 [EMAIL PROTECTED], which has 
 decision-making mechanisms); I could speculate that Mr. Ross 
 is saying that he will ignore this, but, to be truthful, I 
 don't really know what he meant.
 
 
 
 


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Re: [PEDA] Nanoboard

2004-04-12 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Tony Karavidas [mailto:[EMAIL PROTECTED] 
 Sent: Monday, April 12, 2004 9:21 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Nanoboard
 
 You could have accepted it and then sold it on this list for 
 $500. There are other people that want it and they won't be 
 getting a free one, so 1/2 price is a good deal.

Tony, I did not think about that one.

Hmmm, I got one free when I upgraded another seat from 99SEP2004 last
month. I had already upgraded another to DXP, so have a free upgrade (no
nanobaord) on that one.

Although I have been having some fun with it at the moment I doubt if I will
ever seriously use it, although one FAE from a distributor who visited me
recently thought he could use it to promote Altera devices.
 
If anyone would be interested in it feel free to contact me off list and I
can let them know if I decide to put it up for grabs.

Cheers

John



  -Original Message-
  From: Mike Reagan [mailto:[EMAIL PROTECTED]
  Sent: Monday, April 12, 2004 11:24 AM
  To: 'Protel EDA Forum'
  Subject: Re: [PEDA] Would it not be nice?
  
  Once again I have to agree with Mr. Brooks.  I wanted to 
 purchase PCB 
  and Schematic.  I did not want the NanoBoard, PLD, or 
 anything else.  
  Actually if there was a free schematic viewer, I wouldn't need the 
  schematic tools either.
   Basically, all I wanted was PCB, not even the router.  I 
 have a large 
  investment in routers so I don't need to pay extra for Protel's.
  Well, I had to insist that Altium keep the nanoboard.  
  Literally, I had to insist that it would end up in the 
 trash as soon 
  as I received it.  They kept it.  One size does not fit 
 all. Marketing 
  has driven this one shoe fits
  all for the past few years and it aint workin' guys.At 
  least OrCAd has
  allowed me to purchase the schematic capture without 
 spending 10 grand 
  on the rest of their layout and simulation.
  
  Mike Reagan
  
  
 
 
 



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Re: [PEDA] Good schematic/PCB development suite recommendation?

2004-04-11 Thread John A. Ross [RSDTV]
Mr Lomax

You can hardly call me silent, I am certainly not in Jami's league when it
comes to hell raising but I am certainly not quiet (no insult intended
Jami).

As far as being coherent, I will devote as much time, documentation and
effort as otherwise required to get my point across, on one simple
condition. 

That is as long as I believe my efforts are not wasted, nor in vain, or that
they are actually being acknowledged at all. 

The last point is Altiums weakness. An insular community and train of
thought. There are many specialists who could compile a survey for Altium,
in my experience home grown surveys, even by the most experienced
'marketing' types is flawed from the start.

I see helping other users without reward a positive use of my time.

If I think for a moment I am wasting my time I would rather spend it on my
kids  my family, they are by far my preferred future investment.

I guess you just see my comments as being incoherent, ineffective, a waste
of your reading tome and of no practical use. So be it.

I'll ignore the other bait ;)

John
  

 -Original Message-
 From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED] 
 Sent: Saturday, April 10, 2004 10:31 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Good schematic/PCB development suite 
 recommendation?
 
 At 02:40 PM 4/10/2004, John A. Ross [RSDTV] wrote:
 It is a sad fact that Altium would prefer to listen to the 
 'few' than 
 the many as regards how their tools are now styled, viewed and the 
 direction that they have taken.
 
 This brings us to a classic problem, that of the alleged 
 silent majority. 
 Unless you actually survey a population, you don't really 
 know what the population, as a whole thinks, and even polls 
 and surveys can be problematic. Many people simply assume 
 that the majority thinks the way they do. I think I have a solution.
 
 By the few I mean the 'yes' men who will agree to anything 
 from Altium 
 that betters their own needs [...]
 
 Hmmm Isn't it normal for people to agree with something 
 that betters their own needs?
 
 It seems fairly clear that some users *like* DXP and others 
 don't. The balance is far from clear.
 
 Anyway, I'd like to see better communication between Altium 
 and the users, and that is going to require a certain level 
 of organization of the users. 
 You can't communicate with someone who is incoherent, and 
 there is no active mechanism which will allow the users to 
 speak coherently. So there is just whatever happens to be 
 written on the mailing lists, often by those who are 
 disproportionally motivated to write (and I include myself in 
 this) or whatever Altium privately gleans from isolated users 
 (or, perhaps, determines more scientifically, I certainly 
 don't know the extent or power of Altium's research in this area).
 
 And I'm going to have to write about that on 
 [EMAIL PROTECTED]
 
 
 
 
 
 



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[PEDA] Would it not be nice?

2004-04-11 Thread John A. Ross [RSDTV]
A quote I just seen on DXP list

Would it not be nice to be asked the same type of questions on the SCH and
PCB tools that have been the 'bread  butter' for Altium for so long instead
of just the 'new Altium baby'.

When you see such feedback, well, I can only repeat myself. 

I really do see the 2004 roadmap as being a positive move, but they are
making it real hard for themselves.

From a feature point of view I would have paid my upgrade bucks for dual
monitor, multi channel, better Orcad compatibility and proper schematic
driven rule sets and leave the 99SE style interface. 

Proper pin / gate swapping, a VERY high wish on all users wish list, still
has not made it, but would have been nice, but we have FPGA tools, so much
better than pin / gate swapping.

John


 -Original Message-
 From: Nick Martin [mailto:[EMAIL PROTECTED] 
 Sent: Monday, April 12, 2004 12:00 AM
 To: DXP Technical Forum
 Subject: Re: [dxp] NanoBoard
 
 snipped 
 
 I would be interested to know why you feel the need to use 
 ISE and what areas of it are most interesting / useful to you.
 
 Best Regards,
 
 Nick




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Re: [PEDA] Good schematic/PCB development suite recommendation?

2004-04-10 Thread John A. Ross [RSDTV]
 -Original Message-
 From: edsi [mailto:[EMAIL PROTECTED] 
 Sent: Friday, April 09, 2004 6:48 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Good schematic/PCB development suite 
 recommendation?
 
 snip 
 
 Altium better start to listen to folks like Ray.  Ray came to 
 the same conclusions that everyone else has about DXP without 
 anyone holding a prompter if front of him.  Ray's statement 
 are pretty significant from a marketing standpoint
 

It is a sad fact that Altium would prefer to listen to the 'few' than the
many as regards how their tools are now styled, viewed and the direction
that they have taken. 

By the few I mean the 'yes' men who will agree to anything from Altium that
betters their own needs, it is a shame that Altium cannot think for
themselves in this respect. Just because certain users can communicate well
with Altium (speak software developer language well) does not make their
guidance on product direction a good thing, or a fair representation of the
user base as a whole.

But when success is measured in pure $ at the bottom line of the
companies books instead of product quality, or user base, it is very common
for successful companies to believe that first, they can do no wrong (based
purely on their financial success and not on the product), second, their
users are locked to them so they can do what they want, third, their own
opinion (and that of their loyal followers and advocates) is more important
than the user base as a whole.
 
Generally companies fooled into a train of thought like this will 'skip'
user complaints or good suggestions that do not fit their master plan or
take a 'blinkered' view if it does not come from a source they like and will
never admit their error to themselves, and so they become isolated from the
majority of their user base.

Again IMO the trend is to restyle the Enviroment to resemble a software IDE
which better suits the FPGA tools integration (or take over), a useful
evolution indeed, and re-positions Altium tools pretty well, but I think the
core reason is that it is easier for the developers to produce an Enviroment
THEY would like, THEY understand, find NATURAL for THEM or use, than spend
the time to ask and understand what the PCB designers would actually like.

Despite its market re-positioning, I don't think the FPGA tools will stand
up well to other FPGA tool vendors on their own, so treating the PCB tools
as the poor cousins is a bad decision and IMO a mistake. 

Feature and functionality wise DXP/2004 is a big improvement, but I have
seen nothing added in DXP/2004 that could not have been left inside the 99SE
GUI (no retraining, no new skills needed, just more productive tools), but
as said above, that would have been a lot harder for developers to meet the
UI requirements at the same time as considering the needs of the PCB
designer.

How many software developers do you know that would prefer DOS boxes brought
back and return everyone to command line entries :-) ? Er, no thanks. Sound
familiar (query language, scripting...)

Altium have did it very badly IMO (glad I am not alone) to the point that
the pain is in some cases, simply not worth the gain, due to making simple
things harder (un-natural for non software familiar people) to do.

Like others, I converted many of my customers from other vendors products to
98/99 purely on its ease of use, short learning curve, stability and I would
happily have stood my ground to defend statements I made to promote
P98/P99SE when challenged.

I cannot in honesty do this with DXP/2004, I would need to respond that
unless you do FPGA or need Multi Channel design, you do not gain that much
more. I think Altium have seriously underestimated this type of 'sale by
recommendation' outlet. Big mistake. I guess they can expect the same from
the PCAD community when they move them to the DXP platform.

It's a hard and sometimes lonely path to get a good reputation, it's a lot
easier to get a bad one. Which path Altium are on, only time will tell.

Could I go on about this all day, yes, but that would be boring for all as
it is really repetition of all that has gone before as well as being ignored
by Altium because it is not what Altium likes to hear.

John






 Reagan
 
 
 
 
 
 -- Original Message --
 From: Brooks,Bill [EMAIL PROTECTED]
 Reply-To: Protel EDA Forum [EMAIL PROTECTED]
 Date:  Fri, 9 Apr 2004 09:12:42 -0700 
 
 Ray,
 
 I made the mistake that you are considering before. The group I was 
 with in Temecula bought Pads on my misguided recommendation... I was 
 taken in by the demo. The guys made it look so easy, then when I got 
 the software and realized they sold me a package that was 
 stripped down 
 compared to the one they demonstrated... I saw red.  If I wanted the 
 package that did all the fancy stuff like interactive 
 routing and push 
 and shove placement etc, I would have to pay thousands 
 more for the 
 'add-ons'. The 

Re: [PEDA] Nanoboard

2004-04-02 Thread John A. Ross [Design]
Jami

A printed version is at the rear of the Nanoboard tech manual

The design is located in the P2004 examples sub directory

C:\P2004\Examples\Reference Designs\NanoBoard-NB1

In my case its C:\2004\ so just change to wherever yours is.

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==   

 -Original Message-
 From: JaMi Smith [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, April 01, 2004 7:22 PM
 To: Protel EDA Forum
 Cc: JaMi Smith
 Subject: [PEDA] Nanoboard
 
 Has anyone reverse engineered the Nanoboard yet?
 
 Where's the schematic?
 
 JaMi
 
 


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Re: [PEDA] reg hole on PCB and library

2004-03-29 Thread John A. Ross [Design]
 -Original Message-
 From: Paresh Pai [mailto:[EMAIL PROTECTED] 
 Sent: Monday, March 29, 2004 8:43 AM
 To: protel forum
 Subject: [PEDA] reg hole on PCB and library
 
 Hi everybody.
 
 I am facing the following problems in 99SE
 
 1. I have designed a single sided PCB for a microcontroller 
 programmer. It has a 7812 regulator chip which is to be 
 soldered and also fitted to the PCB (using a small nut), so 
 that the PCB ground copper acts like a heat sink. To do this, 
 I have placed a rectangular copper fill with a hole in the 
 center and aligning the hole with that of the 7812 (TO220 
 package).To generate the hole I placed a pad(multilayer) and 
 adjusted its hole size to be equal to X-size and Y-size (all 
 100 mil).But when I generate a print preview by using 
 following settings, I do not see the hole in the copper fill. 
 The whole copper fill appears as black.
 The settings I use are :
 
 Include Top side
 Include bottom side
 Include double sides  all are selected(checked)
 
 Show holes ..selected(checked)
 
 Color set... Black  White
 
 The layers selected in the preview are
 Bottom layer
 Keepout layer
 Multilayer
 
 Can anybody help me to find the hole ?

That seems strange, your layer build up works OK for me, show drill hole
in preview.

Have you tried promoting the multilayer pad to the top of the list?

I tried the same thing using a fill on the top layer instead (I know you
do not us it) and had to promote the multilayer to the top before I
could see the hole for the 'tab'

Try moving the 'multilayer' layer to the top and have all other layers
below it.

 2. My second problem is regarding libraries.
 When I load a new schematic, is there any way to know the  
 library from where  each component was taken by the designer 
 of the schematic ? If you double-click on a component , it 
 shows the library reference,footprint etc.  but the library 
 is not known. Similarly in PCB editor, it shows the footprint 
 etc. but the library is not shown.

I have never had to do that so I do not know.

Working with multiple libraries with possibly same name parts is always
a bad idea.

However if you have concerns, you can create a separate project library
from the PCB and SCH For PCB it would be Design, Make Library. All
footprints currently active on your PCB will be merged into one library.

John


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Re: [PEDA] Antenna coil

2004-03-28 Thread John A. Ross [RSDTV]
For spirals you could try Brians script as well for drafting after doin
'what ifs' in the other application.

http://www.proteluser.com/bbs/showthread.php?t=17

John 

 -Original Message-
 From: matt [mailto:[EMAIL PROTECTED] 
 Sent: Sunday, March 28, 2004 10:18 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Antenna coil
 
 you may try to design  a spiral inductor instead . Download 
 the free software called Appcad (from Agilent) , it has 
 spiral inductors design. Play some what if scenarios with it 
 and you'll see if you can do it one way or another, with and 
 without vias .
 
 Best Regards,
 Matt Tudor , MSEE
 
 - Original Message -
 From: John C. Echols [EMAIL PROTECTED]
 To: [EMAIL PROTECTED]
 Sent: Sunday, March 28, 2004 3:32 PM
 Subject: [PEDA] Antenna coil
 
 
  I'm the guy still using Protel 1.61 (1992) with Windows 
 3.11 and I'm 
  on a phone linenow that you're through laughing my 
 question is - 
  my present project requires a coil for an antenna for a prox card 
  reader.  The coil is about 3.25 X 4.25, 700uHy and takes 
 60 turns of 
  mag wire.  Can I do this with traces? The easiest would be 
 30 turns on 
  one side and one via to do 30 on the back.  I'd probably go 
 .004/.004
  so it's not too hard for the board house and would only 
 take .24 width 
  of board space.  Will this work or is the spacing too big?  Or do I 
  need to do one turn on top, the next on bottom, next on 
 top, etc?  All 
  the vias would take up too much room.
 
  Thanks for the help.
 
  John Echols
 
 
 
 
 
 



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Re: [PEDA] Antenna coil

2004-03-28 Thread John A. Ross [RSDTV]
I never sleep 

John

 -Original Message-
 From: Brian Guralnick [mailto:[EMAIL PROTECTED] 
 Sent: Sunday, March 28, 2004 11:56 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Antenna coil
 
  For spirals you could try Brians script as well for drafting after 
  doin 'what ifs' in the other application.
 
  http://www.proteluser.com/bbs/showthread.php?t=17
 
  John
 
 Hey, I was just replying to that as well...  You won 
 hitting the Send
 on your email by a few seconds...
 
 _
 Brian Guralnick
 
 
 - Original Message -
 From: John A. Ross [RSDTV] [EMAIL PROTECTED]
 To: 'Protel EDA Forum' [EMAIL PROTECTED]
 Sent: Sunday, March 28, 2004 5:57 PM
 Subject: Re: [PEDA] Antenna coil
 
 
 
   -Original Message-
   From: matt [mailto:[EMAIL PROTECTED]
   Sent: Sunday, March 28, 2004 10:18 PM
   To: Protel EDA Forum
   Subject: Re: [PEDA] Antenna coil
  
   you may try to design  a spiral inductor instead . Download
   the free software called Appcad (from Agilent) , it has
   spiral inductors design. Play some what if scenarios with it
   and you'll see if you can do it one way or another, with and
   without vias .
  
   Best Regards,
   Matt Tudor , MSEE
  
   - Original Message -
   From: John C. Echols [EMAIL PROTECTED]
   To: [EMAIL PROTECTED]
   Sent: Sunday, March 28, 2004 3:32 PM
   Subject: [PEDA] Antenna coil
  
  
I'm the guy still using Protel 1.61 (1992) with Windows
   3.11 and I'm
on a phone linenow that you're through laughing my
   question is -
my present project requires a coil for an antenna for a 
 prox card
reader.  The coil is about 3.25 X 4.25, 700uHy and takes
   60 turns of
mag wire.  Can I do this with traces? The easiest would be
   30 turns on
one side and one via to do 30 on the back.  I'd probably go
   .004/.004
so it's not too hard for the board house and would only
   take .24 width
of board space.  Will this work or is the spacing too 
 big?  Or do I
need to do one turn on top, the next on bottom, next on
   top, etc?  All
the vias would take up too much room.
   
Thanks for the help.
   
John Echols
   
   
   
  
  
  
 
 
 
 
 



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Re: [PEDA] Component Type (Ex:2004 Global edits)

2004-03-28 Thread John A. Ross [RSDTV]
 

 -Original Message-
 From: edsi [mailto:[EMAIL PROTECTED] 
 Sent: Sunday, March 28, 2004 7:21 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Component Type (Ex:2004 Global edits)
 
 snip 

 Component type:
 I would be willing to quiz every engineer I have worked with 
 for the past 30 years and 99 percent would not be able to 
 correcty answer a definition of Standard, mechanical, 
 graphical, NET TIE, etc. Nor would they care or even use it 
 even if they could

Brian

This was one of the most asked for features on this list, since as far back
as P98, not the DXP one, and cause for many people complaining about how
items in the SCH such as nuts/washers/bolts/insulators. can be shown on
the SCH, included in the BOM, but not required for the PCB.

There were cries to have this functionality for P99 release as I recall and
in subsequent SP's but it never happened.

The net tie is the result of many discussions on the 'Lomax short' work
around and allows for differently names nets such as isolated gnds to be
tied to a single point. Again, many cries of why this was not supported as
standard.

Graphical is for things not required in BOM but wanted on PCB, like hazard
warning in PSU, ESD symbol, logo and so on.

Although the naming does not follow what would be recognised as 'standard'
terms, the terms are not that obtuse as to hide their function. 

I don't need to tell you the benefits of these additions in DXP, you can see
that for yourself. 

Each one of these was a workaround in 99SE, now standard in DXP and they do
save time.

These features would not be top of my 'most hated' list in DXP by a long
shot, guess most people already know the parts I seriously dislike.

You had some other comments on netlist management  ECO, as you know I also
work a lot with netlists from clients or between tools where I do not have
access to the source documents. I would agree this could be made a lot more
user friendly in DXP.

John



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Re: [PEDA] 2004 Global edits

2004-03-26 Thread John A. Ross [RSDTV]
If I understand correctly what Mike was trying to achieve by 'programming',
was handled with a few mouse clicks for selection (shift-Click in DXP for
select should have made it easier) and the T,I,P shortcut which still exists
in 2004, to select how you wanted it positioned in 99SE. It use to work on
hidden text.

IMO its actually an example of how the over-engineering of the GUI/Panels
and the query system impacts on productivity and when you look at what is
needing to be done why jump through the loops of FSO/Inspector/link 

For a global positioning of comments, no way can the panels loops be quicker
than ESATIP and mouse clicky.

The FSO/Inspector panel has its uses and I still think the Inspector panel
deserves an apply button at the bottom.

If its support that's needed to restore simple edits like this to some sort
of sensible procedure then, for what's its worth, I give it.

Sorry if I got the wrong end of the stick.

John

 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED] 
 Sent: Friday, March 26, 2004 11:38 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] 2004 Global edits
 
 On 09:07 AM 27/03/2004, Phillip Stevens said:
 
 Click on the *text* of the comment or designator.  (not the component
 itself.)  Run find similar objects.
 With all of the objects selected you want to apply the 
 change to, Click 
 to the right of Autoposition in the inspector window.
 Select the position you want from the pull down list.  I haven't 
 actually tried this on my PCB design here,  but I believe 
 this is the 
 way it's done.
 
 ---Phil
 
 Phil, this will work if you have the designators selected and 
 not the components.
 
 If Mike has the components selected then you can add a 
 further step to select the designators of selected 
 components.  Run a selection query of:
 IsComponentSelected and IsDesignator
 
 Now you have the designators selected and you can position 
 them as you want with the AutoPosition attribute.
 
 Now I know, Mike, from previous discussion that you may not 
 like the programming. But that is the current solution.
 
 I have been asking Altium to make this sort of edit easier.  
 If you have just components selected you will see in the 
 Inspector that the Name and Component Comment fields are 
 hyperlinks.  I think that when you click on one of these 
 hyperlinks you should be able to edit those attributes on all 
 selected components (in effect this would cause the selection 
 to drill down across all the selected components).  However, 
 currently the system will only edit the attribute of one of 
 the components (after drilling down).
 
 If you agree with what I am proposing I suggest you let 
 Altium know - this is not the forum to do that.  I have made 
 my point a number of times, I am not sure if there is any 
 support for this concept.
 
 I am surprised that Tech Support couldn't figure this out.  I 
 am sure Geoff Harland would have set them right quick smart.  
 The IsComponentSelected, and it's ilk, keywords were added 
 after detailed discussion and back and forth over selection 
 methodolgies and task descriptions by users. It is actually a 
 pretty good example of how the users (that bothered) have had 
 a significant impact on the program - not to say that I think 
 everything about DXP/P2004 is good, just that the users have 
 influenced quite a bit of it, at least within the bounds of 
 the overall architecture.
 
 Ian
 
 
 e Hi Y'all
 
 e Does anyone know how to auto position the references on 
 selected 
 e components only in 2004. I just talked to Tech Support 
 and managed 
 e to stump them for  a day.  Any help is appreciated.
 
 e Mike Reagan
 e EDSI
 
 
 



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[PEDA] 2004 DXP Looks Great,

2004-03-17 Thread John A. Ross [RSDTV]
  -Original Message-
 From: Protel Hell [mailto:[EMAIL PROTECTED]
 Sent: Wednesday, March 17, 2004 9:32 PM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] 2004 DXP Looks Great,
 
 productivity, productivity, productivity
 
 those are the three things that need improvement in DXP

Do you have suggestions how? 

You could help by posting what you like, do not like, or what you see as
non-productive with your proposed solution, any other constructive comments
here or to

The dxp mailing list at

http://forums.altium.com

Or at

http://www.proteluser.com/bbs/forumdisplay.php?f=10

John
 
 From: Brooks,Bill [EMAIL PROTECTED]
 Reply-To: Protel EDA Forum [EMAIL PROTECTED]
 To: 'Protel EDA Forum' [EMAIL PROTECTED]
 Subject: Re: [PEDA] 2004 DXP Looks Great,
 Date: Tue, 9 Mar 2004 16:01:07 -0800
 
 
 My advice to Altium, Improve our productivity through the
 use of smart
 tools, not more complexity.
 
 _
 Get rid of annoying pop-up ads with the new MSN Toolbar   FREE! 
 http://clk.atdmt.com/AVE/go/onm00200414ave/direct/01/



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Re: [PEDA] Common PCB footprint specifications

2004-03-16 Thread John A. Ross [RSDTV]
 -Original Message-
 From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] 
 Sent: Tuesday, March 16, 2004 8:07 PM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] Common PCB footprint specifications
 
  -Original Message-
  From: John A. Ross [Design] [mailto:[EMAIL PROTECTED]
  Sent: Thursday, March 11, 2004 10:00 AM
  To: Protel EDA Forum
  Subject: Re: [PEDA] Common PCB footprint specifications
  
  If Protel could assign a different footprint for rotation, or side, 
  based on some sort of logical system, then it would make 
 life so much 
  easier to define DFM rules even at SCH level.
  Perhaps that's worth a new feature request on the DXP forum :)
 
 FYI, PCAD has this feature and it seems to work quite well.  
 As PCAD moves toward DXP (as I assume it will) I'd be 
 surprised if it didn't show up in DXP.  

Gary

I was used to this feature before in Ultimate (now EWB) from a long time
ago, and missed it very much

I was looking at PCAD a while back but as I have just upgraded another seat
of P99SE to DXP Ill press on with it for now and see what I can do to push
for such features in future SP's. I would think such features would be a
popular addition for most people. 

Best Regards

John A. Ross

RSD Communications Ltd
8 BorrowMeadow Road
Springkerse Industrial Estate
Stirling, Scotland FK7 7UW

Tel +44 [0]1786 450572 Ext 225 (Office)
Tel +44 [0]1786 450572 Ext 248 (Lab)
Fax +44 [0]1786 474653
GSM +44 [0]7831 373727

Email   [EMAIL PROTECTED]
WWW http://www.rsd.tv
==
 
 
 



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Re: [PEDA] Mouse insists first click is a double-click

2004-03-15 Thread John A. Ross [Design]
 -Original Message-
 From: Leo Potjewijd [mailto:[EMAIL PROTECTED] 
 Sent: Monday, March 15, 2004 4:03 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Mouse insists first click is a double-click
 
 At 15-03-2004 16:09, Carpenter, Dean wrote:
 Hi All -
 
 OK, this is an odd one ...  Recently 99SE started insisting 
 that I did 
 a double-click on the mouse when starting an operation.  But 
 only for 
 the first time.
 snip
 
 Phew ! What a relief !
 I thought I was the only one... had worn out my trackball 
 (again)... drank too much... 

Leo

Is drinking too much possible ?   :-)

John
(Guiness is food of life)










was developing  Parkinson's 
 desease... was going nuts...
 
 It happened on my system too, and started quite suddenly; no 
 percievable link to any previous action (installed software 
 and the likes). I'm using a M$ optical trackball.
 I haven't noticed it (yet) on the various place commands, but 
 first noticed it on the measure commands. Pehaps because it 
 is more noticable there...
 
 Thought it was the trackball driver, downloaded the latest 
 stuff direct from M$: no success.
 Thought it was the trackball itself, digged up the ol' trusty 
 Logitech Marble (no wheel): no success.
 Thought it was the KVM switch, wired the trackball around it: 
 partial success.
 That last one will need some clarification:
 I had the weird situation (again, all of a sudden: it used to 
 work fine) that the first trackball move after using the 
 scrollwheel generated an 'enter'. Extremely annoying when 
 you're near completion of a three-hour backup procedure and 
 the only button on the screen is 'cancel'. Well, that was 
 solved by connecting the trackball directly to the PC.
 
 Since I haven't really noticed it yet on the place commands I 
 thought it might be the microswitch, but since it does not 
 happen in any other software that cannot be.
 When the schedule permits, I'll do a little digging and 
 experimenting; but that will probably wander off into the next week.
 
 
 Leo Potjewijd
 hardware designer
 Integrated Engineering B.V.
 
 [EMAIL PROTECTED]
 +31 20 4620700
 
 
 


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Re: [PEDA] The road to DXP, one mans story, warning long post, (was)2004 DXP Looks Great,

2004-03-11 Thread John A. Ross [Design]
 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, March 11, 2004 1:17 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] The road to DXP, one mans story, warning 
 long post, (was)2004 DXP Looks Great,
 
 also long reply - generally in agreement with John.
 
 On 12:21 AM 11/03/2004, John A. Ross [Design] said:
 ..snip..

 When the DDB came out is was almost universally denigrated.  
 Then lots of people went quiet about it and now we have 
 admissions that people liked it. 
 (I am not saying you were one of the people that changed view 
 over time;  I was though).

I was of the same view on the first release of 99 (not 99SE), I cried
give me back my WFS as well, especially after 99 burned me badly with
the new ddb file system, I got flashbacks of Capture DSN files and
corrupt cache

John


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Re: [PEDA] The road to DXP, one mans story, warning long post, (was)2004 DXP Looks Great,

2004-03-11 Thread John A. Ross [Design]
 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, March 11, 2004 1:17 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] The road to DXP, one mans story, warning 
 long post, (was)2004 DXP Looks Great,
 
 also long reply - generally in agreement with John.
 
 On 12:21 AM 11/03/2004, John A. Ross [Design] said:
 ..snip..
 In a single user or workstation environment where the whole 
 design is 
 driven/managed by one person, it is workable and very flexible, an 
 improvement, but start expanding it to other users, then the project 
 system without CVS is 'over flexible' and in some cases to risky.
 
 When the DDB came out is was almost universally denigrated.  
 Then lots of people went quiet about it and now we have 
 admissions that people liked it. 
 (I am not saying you were one of the people that changed view 
 over time;  I was though).
 
 DXP, and P2004, uses normal disk files rather than the DDB.  
 The project file is a simple series of links to files along 
 with configuration info - all very much like a software 
 development environment as you say.
 
 So what in DXP/P2004 makes it *worse* than traditional (disk 
 file-based) systems for configuration control?

Ian

A lot of other tools I use have a fixed folder system, although usually
the folder locations can be user defined by config menu or file. 

When I get to the question, on my checklists for documentation  risk
assessment, of how I can be sure the correct files in the correct place
and keep project integrity for archives and portability I have to answer
that as the project system is 100% link based, and can be corrupted
during normal use by simply forgetting some workaround or a click of the
mouse.

You mentioned one point below but when you have 1st user + x more, or
multiple projects running at same time, you need to have your wits about
you, its scary. The additional overhead of managing this is nuts.

 I find that, with DXP/P2004, I am more likely to muck up a 
 project when using the Save-As command as it causes the 
 project link to change - which is often *not* what I want.  I 
 know tend to use the Save Copy As command and manually deal 
 with the project updates.  This is irritating and a possible 
 source of problems.

Correct, corruption to the project structure should not occur, it is the
foundation of all we do, in this case it is definitely an area that the
software should be working for us to ensure integrity, not the other way
about.

 It is possible to include one Sch file in multiple projects.  
 I am doing that on a design right now.  One Sch sheet exists 
 in three PCB projects.  This does take some management and 
 care, but does have advantages. It is possible to design an 
 aspect into the sheet that is inconsistent with one of the 
 other projects.  But design re-use always has this issue.  
 All these projects reside in the same folder but I am 
 considering splitting it into separate folders.

As you know I managed to do some design reuse in 99SE that worked fine,
some manual tweaking yes, some rigid procedures on Cref/net name
management  sheet numbering needed but it is do-able.

But what I always did, is keep the sheets in another project and treated
them as a 'sheet library' if you will. All sheets and PCB blocks were
kept in that one container for picking like parts.
 
 Would you prefer to see me forced to copy that Sch sheet 
 three times and so now risk a design branch or would your 
 rigid folder/project relationship have some means of dealing 
 with this?  I can see advantages both ways.

Yes, but not manually, the software should do it for you when it is
imported to the new project, when used the files should be copied to the
project container that was to include them, and worked from there.

I think you already seen the risks, if one sheet is changed, it will
affect all projects it is included in, even if the change is not needed
in say 1 of 3 projects it is re-used in.

In another posts, as well as the folder structure, I also requested a
property be added to the SCH page itself to enable\disable referential
updates. This would be a benign change to the SCH file structure really.
When the re-used sheet is imported into the current project container, a
prompt to enable\disable these updates on import, would be all that is
required initially as a user check. No 'silent' changes. Should be
default, disabled.

This additional sheet property would both allow sheets to be updated
under user control, or disable updates because of intentional, project
specific sheet changes like component values or fit/not fit options. 

 I have a project library that is building as I design the 
 three related systems.  This SchLib is part of each of the 
 three PCB projects (project library, not just a PCBLib 
 installed in the Libraries panel). What do you see as the 
 config control risks here?  If different users are each 
 dealing with a separate one of the related PCB projects

Re: [PEDA] Common PCB footprint specifications

2004-03-11 Thread John A. Ross [Design]
 -Original Message-
 From: Ray Mitchell [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, March 10, 2004 5:36 PM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] Common PCB footprint specifications
 
 Hello,
 
 I'm sure this is a repeat, but is there a simple 
 specification readily available that gives the commonly 
 accepted (if there is such a thing) dimensions for 0402, 
 0603, ..., SIOC-14, etc., and all the other standard 
 footprints?  I don't really want to wade through a bunch of 
 technical stuff to derive all of this myself and I certainly 
 don't want to trust a priori the patterns that come with 
 Protel or any other product.  It's really annoying when part 
 manufacturers don't provide these footprints, assuming they 
 are common knowledge.

Ray

I have accumulated quite a library of such footprints but most of them
will have been optimised to suit our in house processes more than
following the IPC standards.

The supplied Protel IPC land patterns are not too bad, they are
certainly a good basis to build your own on. But most libraries stop at
the land pattern stage, which is what the IPC are looking to change. 

A lot of the way the IPC are trying to structure library conventions are
along the lines of what I was already doing for years anyway, not
because it is good, but because it make life easier for us internally if
the naming conventions for footprints already match vision library
footprints on placement machines (which then relates to mechanical
dimensions as well, as a Murata 16V X7R 0603 will have different
dimensions to a Kemet 16V X7R 0603 in same voltage) and other EDA
packages we use etc. 

I especially like the way the new IPC recommendations take account of
things like, 0 deg positions in tape or tray, if Protel could also make
allowances for rotation on non-polarised chip parts (only use 0,90) to
reduce un-necessary head rotations on turret head placers that would be
even better as I currently use an in house utility to parse the PP
files and check for string matches on footprint  part number to
identify non-polarised parts and it will replace 360 or 180 values with
0 and 270 values with 90. 

In DXP I planned to use a parameter for that at SCH level, so I only
need to check for one match, but that's another story, no time for
documenting or agreeing how this should be done internally yet.  

Same with pad sizes, I slightly oversize SMT pads in some cases against
IPC recommendations (not much) to allow for place tolerances when
reducing Z height  down pressure, Vac release and place speed,
especially on Chip r/c's as well as wave flow direction and so on. 
Same for connector placement, especially for IDC and connector rows
2.54mm, I sometimes enlarge the pads beyond IPC recommendations in one
direction to get the best out of the features on our wave soldering
equipment (Vitronics-Soltec with Select-X debridging).

If Protel could assign a different footprint for rotation, or side,
based on some sort of logical system, then it would make life so much
easier to define DFM rules even at SCH level. 
Perhaps that's worth a new feature request on the DXP forum :)

To me a library has to be more than just a symbols collection, or the
manual pre-processing required diminishes its value, very little third
party libraries do this, so IMO are not worth it.

I like the IPC new offerings for library recommendations very much, and
would like to see it adopted, even although some of the naming
recommendations may choke some placement machines offline programming
software or optimisers software a bit like white space, characters, case
sensitivity and a lot of other things that should be non-issues in this
day/age. I prefer a direct import approach to programming these
machines, Gerber import, pattern search and processing is alright, but
takes to long and can be error prone.

If anyone wants me to split  upload the library contents I have here,
ill do it as a part time job, but I guess most people will have these
things already, or prefer to use their own in-house libraries.

John



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Re: [PEDA] Common PCB footprint specifications

2004-03-11 Thread John A. Ross [Design]
Ray

I know your pain, I started off life as a designer, then a layout
engineer and after working with a lot of sub contractors did my bit in
process engineering, then in service/manufacturing doing failure
analysis and feeding that back to design where I ended up (again) and
due to the experience I had stayed there doing a better job (IMO anyway)
than I did in the first place.

But I think your frustrations are getting to you a bit, or my long
response tipped you over the edge (sorry), but as you mentioned in your
reply below, you had issues with data sheets and also manufacturing,
because of library/footprint issues, so as I said, a library has to be
more than it looks. And you cannot rely on the data sheets 100% unless
it has a report attached to it with all manufacturing details, Motorlola
and NSC do a lot of this, but most passive companies do not.


Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==   

 -Original Message-
 From: Ray Mitchell [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, March 11, 2004 7:48 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Common PCB footprint specifications
 
 Everyone,
 
 Thanks for all the responses on footprints.  This whole issue 
 is pretty sickening actually.  Since we produce low 
 quantities of diverse products we have no dedicated PCB 
 layout people.  All engineers do their own circuit designs 
 and parts specification and ultimately are expected to do 
 tiny PCB layouts of everything and get them to work.  The 
 thing that gets me is that it seems like it would be 
 extremely simple for parts vendors to provide land patterns 
 for their parts along with the mechanical drawings of the 
 parts themselves.  Some do but most don't.  I just talked to 
 Maxim about this and they said they simply don't provide this 
 information.  They recommended IPCSM782.  Of course a good 
 percentage of the parts you need are not listed in this 
 document and a lot of them that are there do not match the 
 recommendations of the vendors of the parts.  I asked Maxim 
 how they layout their own eval boards since they provide no 
 guidelines and no guidelines exist in IPCSM782.  They didn't 
 have an answer but I suspect they rely on rules of thumb and 
 intuition, which is what we end up doing with our designs 
 here most of the time.  After enough bad yields and scolding 
 from our PCB fabricators we manage to stumble into something 
 that seems to work.  I did find what I thought was a good 
 layout for 0402, 0603, etc. from AVX capacitors.  Upon closer 
 inspection, however, I found that their recommended 
 footprints violated their own guidelines given on a 
 different page of the same document.   Go figure!
 
 Ray Mitchell
 
 
 At 04:59 PM 3/11/2004 +, you wrote:
   -Original Message-
   From: Ray Mitchell [mailto:[EMAIL PROTECTED]
   Sent: Wednesday, March 10, 2004 5:36 PM
   To: [EMAIL PROTECTED]
   Subject: [PEDA] Common PCB footprint specifications
  
   Hello,
  
   I'm sure this is a repeat, but is there a simple specification 
   readily available that gives the commonly accepted (if there is 
   such a thing) dimensions for 0402, 0603, ..., SIOC-14, 
 etc., and all 
   the other standard
   footprints?  I don't really want to wade through a bunch of 
   technical stuff to derive all of this myself and I 
 certainly don't 
   want to trust a priori the patterns that come with Protel or any 
   other product.  It's really annoying when part 
 manufacturers don't 
   provide these footprints, assuming they are common knowledge.
 
 Ray
 
 I have accumulated quite a library of such footprints but 
 most of them 
 will have been optimised to suit our in house processes more than 
 following the IPC standards.
 
 The supplied Protel IPC land patterns are not too bad, they are 
 certainly a good basis to build your own on. But most 
 libraries stop at 
 the land pattern stage, which is what the IPC are looking to change.
 
 A lot of the way the IPC are trying to structure library conventions 
 are along the lines of what I was already doing for years 
 anyway, not 
 because it is good, but because it make life easier for us 
 internally 
 if the naming conventions for footprints already match 
 vision library 
 footprints on placement machines (which then relates to mechanical 
 dimensions as well, as a Murata 16V X7R 0603 will have different 
 dimensions to a Kemet 16V X7R 0603 in same voltage) and other EDA 
 packages we use etc.
 
 I especially like the way the new IPC recommendations take 
 account of 
 things like, 0 deg positions in tape or tray, if Protel 
 could also make 
 allowances for rotation on non-polarised chip parts (only 
 use 0,90) to 
 reduce un-necessary head rotations on turret head placers 
 that would be 
 even better as I currently use an in house utility to parse the PP 
 files and check for string matches on footprint  part number to 
 identify

[PEDA] Are the DXP manuals worth the fuss anyway?

2004-03-10 Thread John A. Ross [Design]
Just an observation of mine, 

I think Mr Lomax already suggested that the manuals would probably be
better written by users, rather than developers, and he is most likely
correct.

The precious little snippets of info that would make a new users life so
much easier are most often missing, as the developers\technical authors
will probably take some steps for granted. 

This is not to say the technical writers employed by Altium are not
good, but they already know the software too well and hence produce what
I would call a technical or reference manual, rather than a user manual.


I test my user manuals on staff to make sure they can follow operations
or work instructions without error, I specifically use staff not
familiar with the process to be tested to gauge the manuals
effectiveness. Any comments are included in the remedial action process
loop and fixed before release.

For the amount of features in DXP I guess the manual would need to be
really thick and the manual could well end up sucking as much resources
as the software itself! if Altium followed the procedures above, just to
be outdated when new features are added. 

As for updates well

So I guess I would need to say that PDF manuals are better for now,
along with the additional papers  articles published by Altium.  

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==   

 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, March 10, 2004 1:49 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] 2004 DXP Looks Great,
 
 On 12:16 PM 10/03/2004, DUTTON Phil said:
 Bill,
 
 My DXP is still in
 the box.
 
 ..snip..
 
   There are some
 good things in DXP, but there are many features that really 
 don't seem 
 to help my productivity.
 
 I am intrigued by this.  How do the people that haven't used 
 something know it is not more (or less) productive than what 
 they are using.  I guess it happens not to be the sort of 
 statement I would make, so I am interested in the answer.  I 
 tend to spend longer than others investigating tools to see 
 what I like and dislike; I suspect I waste too much time on 
 this sort of thing. I can't see how one knows that something 
 is no good until you try it.
 
 It may very well be the case that the features and fixes are 
 not worth your time and effort.  The trick with all this 
 stuff is picking when, and *where*, to jump.
 
 Some people are using DXP and P2004.  Do they have a 
 competitive advantage or not? What about those using other 
 CAE programs?  I don't know the answer to this.
 
 I have still not see a detailed comparison, done by real 
 knowledgeable users, of a wide range of CAE programs.  The 
 closest I have seen is the comments by John Ross (thanks, 
 John). I do know what I prefer to use, but I don't know if I 
 am more or less productive than all the other options out 
 there.  How does one know?
 
 All the best,
 Ian
 
 
 


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[PEDA] Oops .Are the DXP manuals worth the fuss anyway?

2004-03-10 Thread John A. Ross [Design]
Ian,

My last post looks like a reply to you, it wasn't, it was just easier to
reply to a post than create a new message.

I just forgot to delete the original post, sorry.

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==   


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[PEDA] The road to DXP, one mans story, warning long post, (was)2004 DXP Looks Great,

2004-03-10 Thread John A. Ross [Design]
 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, March 10, 2004 1:49 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] 2004 DXP Looks Great,
 
 On 12:16 PM 10/03/2004, DUTTON Phil said:
 Bill,
 
 My DXP is still in
 the box.
 
 ..snip..
 
 snipped

 Some people are using DXP and P2004.  Do they have a 
 competitive advantage or not? What about those using other 
 CAE programs?  I don't know the answer to this.
 
 I have still not see a detailed comparison, done by real 
 knowledgeable users, of a wide range of CAE programs.  The 
 closest I have seen is the comments by John Ross (thanks, 
 John). I do know what I prefer to use, but I don't know if I 
 am more or less productive than all the other options out 
 there.  How does one know?

Ian

If I try to be objective I still have issues with DXP, and not just
because I was in transition to DXP from 99SE, but also the changes
required in work practices. But I keep trying anyway.

I found the change in working practice very difficult, I spent a lot of
time at work setting up quite rigid procedures to eliminate as much as I
could, the possibilities for error, from selecting a part to service
procedures  notices in the field. 
 
The 'DXP way' does not lend itself towards this easily.
 
In a single user or workstation environment where the whole design is
driven/managed by one person, it is workable and very flexible, an
improvement, but start expanding it to other users, then the project
system without CVS is 'over flexible' and in some cases to risky.
 
I saw this, once I spent the time to understand what it does, after
trying to document the project management system within DXP, for our own
internal procedures manual  quality documents, in this respect I guess
I got over confident with the 99SE ddb system because of the single
container method it used. DXP is very counter productive in this
respect.

For such a project based system within DXP to work, without CVS, it
really needs a more rigid project, folder based structure. 
I already posted some suggestion on the DXP list. 
In that post I described the DXP project system (without CVS) as 'over
flexible'. Without CVS, DXP project integrity is at risk, especially in
a multi user environment, compared against 99SE where the ddb structure
allowed permissions to be set within a single data container.

From a GUI view I found the excessive use of panels in DXP for the same
or similar tasks a risk, some things could be done  not applied, some
could be undone. The panel organisation was not always logical causing
additional (unnecessary work  thought) I think some issues were logged
for this and it also appears on the DXP/99SE comparison list on your
home page.

This is a very common fault in most software as these feature types 
GUI are usually decided by Developers, rather than users, developers are
normally too close to realise they are over-engineering or
misinterpreted the users suggestions (Cannot see the wood for the
trees).

Hence DXP has the feel of a software IDE, rather than a SCH=PCB
platform, which will not sit well with anyone not used to software IDE's
or trying it for the first time, first impressions tend to 'taint' the
users objectiveness towards any benefits they find after that and also
restrict the amount of effort they will invest in it due to the
perceived pain it will cause. 
It is a harder sell, even to oneself, that time spent on DXP will be a
benefit when one is already happy with 99SE.  

I do use multiple tools, my tool of choice for design entry is Protel, I
measure their respective worth\benefits to me in a few ways, some of
which may only be a benefit to me, as they are keyed to the way I work,
how many clicks to get everyday tasks done, process time to avoid error
for common tasks, how much time I need to spend learning new tricks to
get it to work, investment in retraining vs. frequency of use of new
features and so on. 
I also look at what the software does for me automatically (constrained
of course) and if I have to keep thinking 'what next'. 
If I have to keep thinking about the next step I need to take, after 3-6
months of using the software, I call it 'clunky' or at least it deserves
the title non-intuitive, if it does not become a 'natural' conditioned
response in my working time it is not as productive as it should, or
could be. DXP fits in that category. I expect the software to work for
me, no me work harder for the software.
I really do feel a facelift would give productivity benefits in DXP.

I gave up with the router in 98/99/DXP almost from the start and decided
to waste no more time on it, I use another layout/router package for
boards that need it. Works better for me that way, although I have had
some boards, using Protel router, pass my desk, that look pretty good to
me, but how much time it took to get that way who knows.

The above is just some thoughts of mine, Ill skip the temptation to rant
about the query system, as my

Re: [PEDA] 2004 DXP Looks Great,

2004-03-10 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Mike Reagan [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, March 10, 2004 6:01 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] 2004 DXP Looks Great,
 
 For those of you that dont know, we are honored to have 
 MASTER JEDI Bill Brooks among us. Mr. Brooks was a top 
 qualifier in the TOP GUN contest.

Already used to his many posts in Technet forums :)

 Bill, wanted to ask  was the training class worth it?  We 
 have 11 engineers at Cornet Technology that are still using 
 98.  We have 11 seats of unopened DXP and I am trying to 
 convince management to get their engineering
 department to use 2004.What can we expect to learn from 
 the training?

My Colleague, Markus was at one of the training courses, he had planned to
attend some more, Markus care to add something here?

He did say they were usefull, and well worth it just to skip some of the
steep learning curve, but I would prefer he put it in his own words.

John






 
 
 Mike Reagan
 
 
 -Original Message-
 From: Brooks,Bill [mailto:[EMAIL PROTECTED]
 Sent: Wednesday, March 10, 2004 12:12 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] 2004 DXP Looks Great,
 
 
 In my case, we upgraded a few machines to get the latest PCB 
 and schematic tools because the discount was available and I 
 didn't hear too many complaints about the DXP software on the 
 other forum... though the asking for help is constant... If 
 it was easier to use I would expect to see mostly newbies 
 over there walking through some of the more difficult steps...
 
 We paid the money for a training class. I used it on a couple 
 of designs and was very frustrated with it... So I put the 
 box away and kept using the one I could use 99SE.
 
 I have felt frustrated with almost every new release... I 
 guess that's human nature...
 
 When I got 98 I found out that they had broken some features 
 that were in
 2.8 2.5 I can't remember the number now... but I asked them 
 to send me a copy of the older release too when I needed to 
 send something to PADS it would still work in the older 
 software but not in 98. ASCII out the file and read it into 
 the older software and jump through the hoops and viola! A 
 PADS file.. Why did they break it? Who knows...
 
  So at one point in order to do my work I needed 3 versions 
 of Protel, Orcad Schematic and Autocad to get my job done. 
 They still don't have an 'all in one' package even though the 
 sales pitch would have you believe it.
 
 When they came out with 99 I waited until the roar of 
 complaints died down and when they got to service pack 3 I 
 figured it would be okay but they came out with 99SE 
 instead oh boy
 
 I resisted that one for a long time too.. until finally when 
 I changed jobs I was forced into it.  I have been using it 
 after figuring out that the windows filing system was the 
 only way to go to avoid loosing track of what 'copy of a copy 
 of a backup version of the file' was the right one
 sheeze..
 
 I longed for a PCB package to edit PCB's and a Schematic 
 Package to edit schematics... and all this other stuff could 
 go in the trash for all I cared. So now we are up to service 
 pack 6 on 99SE and there is a new release, DXP.
 
 So I waited again when DXP came out... and it looks like I 
 didn't wait long enough. So we shall see how the 2004 product 
 shapes up... but I expect it to be consistent with the 
 previous releases... buggy for the first 3 service packs and 
 harder to use all together.
 
 I guess that's why I 'ranted on ' a bit on the sales pitch of 
 how great it was... but I can guarantee I won't 'get my 
 knickers in a knot' worrying about it.
 
 (I just love that one... 'Knickers in a Knot'... I heard that 
 on TV the other night grin)
 
 Bill Brooks
 PCB Design Engineer , C.I.D., C.I.I.
 Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510
 
 
 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED]
 Sent: Tuesday, March 09, 2004 7:53 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] 2004 DXP Looks Great,
 
 On 02:08 PM 10/03/2004, [EMAIL PROTECTED] said:
 Ian Wilson wrote:
 
 I am intrigued by this.  How do the people that haven't 
 used something 
 know it is not more (or less) productive than what they are using.
 
 That one is easy to answer.  Go back and read the posts 
 again.  Almost 
 every individual, including me, has indicated that they 
 actually tried 
 DXP before putting it away.
 
 I understand that and did read it the posts. I was not 
 commenting on whether DXP is better or worse that P99SE. My 
 question was asking Phil how he *knew* it was less productive 
 if it was still in the box.  He replied to say it was 
 installed but he no longer used it.  This is a clarification 
 my overly literal brain can deal with.
 
 I do know there are lots of people around that have used DXP 
 to some degree and given up. It will be interesting to see 
 what happens over the next few months.
 
 Bye for now,
 Ian
 
 
 
 

Re: [PEDA] Autorouter speed, (was New PC tested with Protel for at least 1 month now...)

2004-03-10 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Brian Guralnick [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, March 10, 2004 9:04 PM
 To: Protel EDA Forum
 Subject: [PEDA] Autorouter speed, (was New PC tested with 
 Protel for at least 1 month now...)
 
 Just tried out the autorouter, the example autorouter 'board 
 1' routed in 29 seconds.

Brian

Was that in 99SE, using standard Board1.ddb file with defaults for router?

I did something similar a month or two ago, I just found the following from
my notes. 
I did this initially to see if the productivity benefit was there for the
investment in a new PC. 
But it also opened my eyes to Situs (not that I use it anyway).

Enviroment 1

Dell 8200, single PIV 2.0GHz, XP ProSp1, 756mB RIMM, Matrox G550
Outlook 2003/IE6 and DXP open  Running
Board1.ddb, Board 1, accept all defaults.

99SE

Routing completion 100%, 
Connections routed 286, 
Connections remaining 0, 
Elapsed Routing Time : 0:0:31

DXP SP2
---
All I have here for now is SP2
Board 1 (99SE version), imported to DXP, accept all defaults.
Routing completion 100%, 
Connections routed 286, 
Connections remaining 0, 
Elapsed Routing Time : 0:04:26

Board 1 (DXP version),
Routing completion 100%, 
Connections routed 286, 
Connections remaining 0, 
Elapsed Routing Time : 0:06:03

Enviroment 2

Proliant ML350G3, Dual Xeon 2.8Ghz, 4gB ECC DDR, SCSI Raid 5 plus one drive
for cache, Matrox G550, Serverworks MoBo
W2K3 server, MS Exchange, ISA and Sharepoint all running, 
usually with 11-15 clients attached (plus PC from production floor)
Management logs show none of the CPUS were stressed and memory usage only
peaked at 68% 
Board1.ddb, Board 1, accept all defaults.

99SE

Routing completion 100%, 
Connections routed 286, 
Connections remaining 0, 
Elapsed Routing Time : 0:0:25

DXP

All I have here for now is SP2
Board 1 (99SE version), imported to DXP, accept all defaults.
Routing completion 100%, 
Connections routed 286, 
Connections remaining 0, 
Elapsed Routing Time : 0:3:59

Board 1 (DXP version),
Routing completion 100%, 
Connections routed 286, 
Connections remaining 0, 
Elapsed Routing Time : 0:06:35

I guess a similar exercise with other routers.

John









 
 
 - Original Message -
 From: Brian Guralnick [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Sent: Wednesday, March 10, 2004 3:47 PM
 Subject: Re: [PEDA] New PC tested with Protel for at least 1 
 month now...
 
 
   I'm glad to hear someone has had good luck with ASUS.  
 Some time ago I
  went
   through several ASUS 400MHz CUSL2 motherboards, different CPUs,
 different
   brands of memory, different power supplies, and 
 everything else to try
 to
   stop random crashes.  It wasn't just with Protel either.  
 I finally
 ended
   up slowing the memory bus down to 100MHz even though 
 everything was
 spec'd
   at 133.I'll never touch ASUS again.  I was using Win2K.
 
  That was the problem with my Asus dual 1GHz PIII.  To fix 
 it, I had to set
  in the bios, add 1.5ns on the SDRAM latch.
 
  DDR ram provides an output latch clock which the 
 motherboard chipset times
  itself to getting rid of these old type problems.
 
  _
  Brian Guralnick
 
 
  - Original Message - 
  From: Ray Mitchell [EMAIL PROTECTED]
  To: Protel EDA Forum [EMAIL PROTECTED]
  Sent: Wednesday, March 10, 2004 3:36 PM
  Subject: Re: [PEDA] New PC tested with Protel for at least 
 1 month now...
 
 
   I'm glad to hear someone has had good luck with ASUS.  
 Some time ago I
  went
   through several ASUS 400MHz CUSL2 motherboards, different CPUs,
 different
   brands of memory, different power supplies, and 
 everything else to try
 to
   stop random crashes.  It wasn't just with Protel either.  
 I finally
 ended
   up slowing the memory bus down to 100MHz even though 
 everything was
 spec'd
   at 133.I'll never touch ASUS again.  I was using Win2K.
  
   Has anyone had any problems with Protel with Intel 
 motherboards?  I've
   heard their not barnburners but are extremely stable.
  
   At 03:19 PM 3/10/2004 -0500, you wrote:
I do believe the stability of my new system is that all the
  peripherals,
   24 bit/96KHz sound, USB, 1394, Ethernet, SATA raid 
 controller, ATA raid
   controller are all on the motherboard  the video card 
 was also made by
  Asus
   ensuring a trouble free 8X AGP functionality.  It even 
 more stable than
  my
   old Dual PIII 1 GHz.  Also, the 2 X 120 Gbyte Western 
 Digital HDs read
 
   write at over 100 Megabytes / second on a continuous basis.
   
I'm sure if I added 1 card to the PCI bus, the boot 
 time would
  probably
   double.
   
Additional, I have successfully over clocked this 
 motherboard to
 4.1
   GHz, though, I don't think it's worth the potential headaches.
   
   _
   Brian Guralnick
   
   
   - Original Message -
   From: Tony Karavidas [EMAIL PROTECTED]
   To: 'Protel EDA Forum' [EMAIL PROTECTED]
   

Re: [PEDA] Quit Complaining!!! ( 2004 DXP Looks Great)

2004-03-10 Thread John A. Ross [RSDTV]
 -Original Message-
 From: JaMi Smith [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, March 11, 2004 12:06 AM
 To: Protel EDA Forum
 Cc: JaMi Smith
 Subject: Re: [PEDA] Quit Complaining!!! ( 2004 DXP Looks Great)
 
 snip,

 As an interesting side note to this discussion of the above 
 two issues, I am willing to bet that if someone were able to 
 come up with a reliable low cost (or no cost) design 
 translator, so as to be able to reliably directly translate 
 a current design from DXP directly into say Mentor 
 Expedition, or Mentor PADs, that you would see a whole lot of 
 people with their box in their hands lining up to get their 
 money back for DXP, losses on training notwithstanding.

Jami

If you check my previous posts you will see I use PPCB all the time, I
specifically use it now for Blaze as the router. I have to have a copy
anyway for client support so I make use of it that way.

I gave up expending energy on Protels routers since P98, as even then, it
was inferior to Spectra 6 or the Bartels one I used.

I expended my energy instead on getting more productive, right tool for the
job and all that, as for netlist translation tools they can either be
written in house (command line  clunky but work) or there are many
available which target PPCB as an end target.
www.cadprosystems.com
http://www.lynnerup-ecad.dk

And a lot more.

Protel is VERY hard to beat for a capture tool. Direct translation in my
case is at Netlist/ECO level, where I have the data in nice, readable ASCII
format.

Mike has had very good things about the Konnekt router, Pat Nystrom has his
testimonial to it on their front page, but I have had no time to play yet.

Hopefully with Altiums new licensing system it will be possible to just
order the modules you use and skip the others.

I fear the concept of a 'all in one wonder' suite is a pipe dream, so I look
to get the best from what I have available.

John




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Re: [PEDA] company schematic libraries

2004-03-05 Thread John A. Ross [Design]
 -Original Message-
 From: Dom Bragge [mailto:[EMAIL PROTECTED] 
 Sent: Friday, March 05, 2004 1:21 AM
 To: Protel EDA forum
 Subject: [PEDA] company schematic libraries
 
 I just wish to ping you on how you setup your own company 
 schematic libraries. There seem to be so many ways to skin 
 this cat I just wanted to get a feel for how others make 
 solid libraries.
 
 When designing PCBs, I personally like to have specific parts 
 in the libraries.
 
 Do you, for instance, try  have a library with specific parts (e.g.
 1k, 1k2 etc) or do you go for the generic RES symbol.  If you 
 go for the specific, do you simply copy the generic res 
 symbol  then modify the parameters appropriately? What do 
 you name the part? For company ABC, something like 
 ABC_RES0805_1k, ABC_RES0805_1k2 or what? Where do you build 
 in your company part number. What do you use all the other 
 parameters for.

Dom

I think you have a pretty good grasp of the issues anyway, but as a
preference I always use a proven company library, I do not use the
supplied Protel ones.

In this company library I will create individual parts that require it
(semi/discretes/actives etc) and generic parts, like say Rohm 0603 just
as MCR006_F and will add the value comment like 1K2 in SCH place
operation, same idea for chip caps, ecaps and so on.

Although I do not make the company lib read only, and as they can only
be used in DDB format, I have the permissions set to only allow one user
to change the library. 

DXP helps a bit, with the use of integrated (pre-compiled) libs, but I
would have preferred a method to 'lock' the IntLibs so that
decompilation to source libs was not possible (or passworded anyway)

Each engineer has the use of their own 'scratchpad' library for parts
they have to create 'on the fly', this is exactly as it sounds. 

Before any new parts are used in a design, the proposed part must first
go through an approval process. 
First it has to be checked  approved by another engineer, purchasing 
production.
Then after drafting the parts for the design in the scratchpad lib,
checked again by another engineer (elimination of risk/error type
process loop) they can be submitted to the main lib.
Only parts in the main library can be used for release boards (and in
some cases final approval is not complete until after assembly and
approved by production engineers).

Seems a lot of work, but this is only initially, after a while you have
a library that is well proven and this makes the design a lot easier and
it can be assembled with a higher level of confidence, that a respin
will not be needed for even production issues (assuming the design
itself has had a DFM audit on it anyway as part of the design process)

John


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Re: [PEDA] company schematic libraries

2004-03-05 Thread John A. Ross [Design]
 -Original Message-
 From: Ian Wilson [mailto:[EMAIL PROTECTED] 
 Sent: Friday, March 05, 2004 2:41 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] company schematic libraries
 
 Snip 
 I call this the one-part, one-symbol system.
 
 It sounds like work but it is not hard to manage - unless you 
 have overblown restrictive part number management systems 
 that means it takes 2 week to get a new part number issued.

Ian

Sometimes when the responsibilities of spec, draft, design, purchasing 
availability and worse customer approval/sign off, manufacturing et all,
are handled by different people at split sites, a common part number
system is the only way to do it for the required paper trail.

If managed properly, it actually works better for multi user
environments or split sites and helps reduce error (auto generate
barcode checks for pick lists  reels, purchase ).

Of course the whole system is a lot easier when managed by one person,
one part, one symbol i.e. overall responsibility at one desk.

I guess this might be straying a bit as it is more a procedures issue
than library management, but is worth considering when planning a
library structure.

I wish I still had the luxury of being able to do everything myself, I
really do, but over-complex systems are just things some of us
'unfortunates' have to live with :-( 

John 


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Re: [PEDA] Complex Hierarchy to PCB layout ?

2004-02-24 Thread John A. Ross [RSDTV]
Dave

Very strange

The pasted free primitives should adopt the net names for the pads they are
dropped into, only exception I have came across is when the tracks or vias
are dropped onto a polygon or plane and seem to have adopted the polygon /
plane net instead of the pad itself.

I am working in Sweden just now, Ill be back in the UK on Thursday so I can
look more then, I always cleared planes  polygons before doing this.

Update free primitives from component pads wil only really work if the free
primitives have 'no net' in the first place.

Sorry for short reply.

John 

 -Original Message-
 From: Dave C [mailto:[EMAIL PROTECTED] 
 Sent: Monday, February 23, 2004 5:43 PM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Complex Hierarchy to PCB layout ?
 
 Summary:
After replicating placement and routing of a section in 
 the PCB, I'm having problems assigning the net name to 
 tracks, vias, polygons, etc. from the net name assigned to 
 the pad it connects to on the new replicated section.

  I tried John's suggestion and I replicated the placement of 
 the parts. I also copied the tracks, polygons, vias, etc. 
 from the original copy to the new one. So, now I have the 
 original copy routed correctly with every track, via and 
 polygon assigned to its correspoding net. And I also have the 
 new copy with its tracks, vias, etc. but none of these 
 routing elements have a net assigned. So far, everything ok.
 
 Then, I first tried in the netlist manager to update free 
 primitives from pads. That messed it all up, my previous 
 routed section and the new one, both were assigned a random 
 net name all over (vias, tracks, everything; it even renamed 
 my part's pins). 
 
 So, then I didn't save those last changes, and back to the 
 point before using the netlist manager, I tried to Update 
 PCB from the schematics and I selected the choice Assign 
 net to connected copper. (I didn't generate component or net 
 classes since I already had them created). Well, it assigned 
 all of the routing to my Digital ground (DGND), including the 
 original routing (the one that had a net name already), and 
 it also renamed the parts' pins to DGND. So, the net class 
 DGND has all of my parts' pads. The rest of the net classes 
 are all empty.
 
 Then, I cleared all nets and net classes, and let the Update 
 PCB to create them again, and it did the same thing. It 
 assigned all my pads and tracks to DGND.
 
 Any suggestions.
 
 Thanks again.
 
 David
 
 --- John A. Ross [Design] [EMAIL PROTECTED] wrote:
 
  
  Dave
  
  That's why I mentioned using a sensible grid to snap to 
 when placing 
  the parts, sorry I missed giving the reason for my statement 'use a 
  sensible grid' as of course the larger the grid, easier to move the 
  parts and snap to the grid as the parts are identical they 
 will have 
  the same origin.
  
  Always in a hierarchy I have controlled how the sheets have been 
  annotated, by giving them a separate number sequence.
  
  Perhaps you could manually update the parts with a prefix of 1xx on 
  just the sheet you want to replicate?
  
  Look forward to the follow up.
  
  John
  
  
 
 
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Re: [PEDA] Complex Hierarchy to PCB layout ?

2004-02-21 Thread John A. Ross [Design]
 -Original Message-
 From: Dave C [mailto:[EMAIL PROTECTED] 
 Sent: Saturday, February 21, 2004 12:20 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Complex Hierarchy to PCB layout ?
 
 John,
 
 Well, thanks a lot, really. That is a very good suggestion, 
 it makes a lot of sense. It still takes some redundant work, 
 but it may not be as bad as renaming all of the parts' designators.
 
 I'm trying it as of now, though it's taking time to match the 
 parts and place them. I was about to annotate the schematics 
 in increments of 100s like you did, but I didn't at the 
 end... I should have. My parts are all numbered sequentially 
 now. It sure would help a lot having all parts in the 
 duplicated sections to be numbered with just an offset of 
 100, that way it would be a lot faster the matching of the 
 parts in the layout.

Dave

That's why I mentioned using a sensible grid to snap to when placing the
parts, sorry I missed giving the reason for my statement 'use a sensible
grid' as of course the larger the grid, easier to move the parts and
snap to the grid as the parts are identical they will have the same
origin.

Always in a hierarchy I have controlled how the sheets have been
annotated, by giving them a separate number sequence.

Perhaps you could manually update the parts with a prefix of 1xx on just
the sheet you want to replicate?

Look forward to the follow up.

John






 
 Next week I'll post a follow up on this.. see how it works.
 
 
 Thanks.
 
 David
 
 
 --- John A. Ross [RSDTV] [EMAIL PROTECTED] wrote:
  
  This is definitely a case where DXP would save you tons of time (do 
  not believe I said that, but its true).
  
  Anyhow you can achieve what you want in 99SE but it is a 
 very complex 
  process and nearly every stage is error prone as you 
 already realise.
  
  In some cases I have done it this way
  
  I made a single channel sheet called AOL.SCH, annotated it 
 with range 
  100-199. So I have my first channel.
  AOL.SCH was then copied and renamed to AOR.SCH. 
  The component designators on AOR.SCH were then reset (current sheet 
  only) so as not to conflict with AOL.SCH Set the project 
 options for 
  re-annotation so that AOR.SCH is assigned CREFs 200-299.
  Now both channels are in. 
  Update your PCB using the synchroniser so component classes are 
  created.
  Within the PCB Editor, place each channel in its own room.
  Place  route the first channel AOL.SCH, use a sensible 
 grid and when 
  you are finished routing you can look to AOR.SCH channel Move the 
  matching components from channel AOR.SCH (unrouted channel) 
 into the 
  same location in the room for AOL.SCH (routed
  channel)
  You will get clearance errors but ignore them for now.
  Once all placement is complete you have 2 identical placed 
 component 
  channels but only one is routed.
  At this point make sure there are no active selections by using 
  De-Select ALL command.
  Under Browse PCB panel bring up the component class 
 generated by the 
  synchroniser for AOR.SCH and click select.
  With the AOR.SCH channel parts now selected, move the 
 component group 
  to the desired location for channel AOR.SCH Now you have two placed 
  channels that are identical but only one routed.
  At this point make sure there are no active selections by using 
  De-Select ALL command.
  Now for the routing, now select all objects within the 
 AOL.SCH area, 
  routes, parts and all.
  Under Browse PCB panel bring up the component class 
 generated by the 
  synchroniser for AOL.SCH and click select. This will de-select the 
  parts within the AOL.SCH group but will leave all routing objects 
  selected.
  Now use the editcopy command and select a suitable focus point for 
  the cut/paste operation that now needs done (always found a 
 component 
  pad was best to 'snap to'), click on the focus point.
  Now use the editpaste command and click on the identical location 
  point on the AOR.SCH channel, all routes should now be 
 copied in the 
  exact same place on the second channel.
  As pasted primitives have their net assignments stripped 
  automatically, the pasted objects should automatically 
 inherit the net 
  names associated to the component pads on which they are 
 pasted to. If 
  not you can always update free primitives from component pads.
  Pasting of routing objects only works if no routing objects 
 exist in 
  the paste area already (like polygons and so on)
  
  It's a lot of work, DXP takes care of most of this duplication work 
  for you.
  
  Good luck
  
  John
 
 
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Re: [PEDA] Complex Hierarchy to PCB layout ?

2004-02-20 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Dave C [mailto:[EMAIL PROTECTED] 
 Sent: Friday, February 20, 2004 5:18 PM
 To: Forum Protel EDA
 Subject: [PEDA] Complex Hierarchy to PCB layout ?
 
 Greetings Protel users,
 
 Scenario: 
Schematic design heavily based on complex hierarchy for 
 duplicating certain parts of the design. Sort of like a 
 stereo system with a left and right channel.
 After the design is flattened, every part gets it own 
 designator and it's ready for PCB layout.
 
 Can anyone suggest a method for replicating the PCB layout 
 (relative placement, tracks, vias, polygons,
 etc.) for these parts of the design which are identical 
 except for the designators and local net names ? 
 
 I know I can select, copy and paste part the layout.
 The copy will have incremented designators (default), or it 
 may have duplicate designators too. But how can I synchronize 
 this PCB layout copy to the duplicated schematic (say, the 
 left channel) without having to manually rename the 
 designators, which is prone to errors.

David

This is definitely a case where DXP would save you tons of time (do not
believe I said that, but its true).

Anyhow you can achieve what you want in 99SE but it is a very complex
process and nearly every stage is error prone as you already realise.

In some cases I have done it this way

I made a single channel sheet called AOL.SCH, annotated it with range
100-199. So I have my first channel.
AOL.SCH was then copied and renamed to AOR.SCH. 
The component designators on AOR.SCH were then reset (current sheet only) so
as not to conflict with AOL.SCH
Set the project options for re-annotation so that AOR.SCH is assigned CREFs
200-299.
Now both channels are in. 
Update your PCB using the synchroniser so component classes are created.
Within the PCB Editor, place each channel in its own room. 
Place  route the first channel AOL.SCH, use a sensible grid and when you
are finished routing you can look to AOR.SCH channel
Move the matching components from channel AOR.SCH (unrouted channel) into
the same location in the room for AOL.SCH (routed channel)
You will get clearance errors but ignore them for now. 
Once all placement is complete you have 2 identical placed component
channels but only one is routed.
At this point make sure there are no active selections by using De-Select
ALL command.
Under Browse PCB panel bring up the component class generated by the
synchroniser for AOR.SCH and click select.
With the AOR.SCH channel parts now selected, move the component group to the
desired location for channel AOR.SCH
Now you have two placed channels that are identical but only one routed.
At this point make sure there are no active selections by using De-Select
ALL command.
Now for the routing, now select all objects within the AOL.SCH area, routes,
parts and all.
Under Browse PCB panel bring up the component class generated by the
synchroniser for AOL.SCH and click select. This will de-select the parts
within the AOL.SCH group but will leave all routing objects selected.
Now use the editcopy command and select a suitable focus point for the
cut/paste operation that now needs done (always found a component pad was
best to 'snap to'), click on the focus point.
Now use the editpaste command and click on the identical location point on
the AOR.SCH channel, all routes should now be copied in the exact same place
on the second channel.
As pasted primitives have their net assignments stripped automatically, the
pasted objects should automatically inherit the net names associated to the
component pads on which they are pasted to. If not you can always update
free primitives from component pads.
Pasting of routing objects only works if no routing objects exist in the
paste area already (like polygons and so on)

It's a lot of work, DXP takes care of most of this duplication work for you.

Good luck

John




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Re: [PEDA] DXP review

2004-02-18 Thread John A. Ross [Design]
 -Original Message-
 From: Kiba Dempsey [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, February 18, 2004 1:17 PM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] DXP review
 
 Does anyone know where I can find any independent reviews on 
 the DXP software?

There has been some notes, comments, gripes and comparisons for DXP
since its first release, against its predecessor, by existing Protel
users. 

These will probably be out of date with P2004 release so I would not
take them as being 100% correct.
http://www.considered.com.au/DXP_vs_P99SE.htm

But no completely independent full reviews I know of, which IMO would
have been a mistake anyway given DXPs current state.

John


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Re: [PEDA] File Format Not Recognized

2004-02-14 Thread John A. Ross [Design]
Just my $0.02

My Protel 99 SCH files actually show as 'Microsoft Schedule+
Application' association
My Protel 99 PCB files actually show as 'PowerPCB Design' association

I have Win AutoUpdate disabled
I have Capture 9.2 installed, Plogic, PowerPcb and some others.

Only time I ever have an issue when opening a file, is when I try to
open it directly, 

If I start any of the applications first, and open from within the app,
they are all fine, I have never seen a connectivity issue, all the apps
including Protel run fine.

All is happy, except when I try to launch an application by double
clicking a file of a particular type, which always seemed the wrong way
round to me, file associations has never really been that reliable
anyway, unless you have one PC, one application which is not practical.

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
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Re: [PEDA] imported footprint

2004-02-06 Thread John A. Ross [RSDTV]
 -Original Message-
 From: bob stephens [mailto:[EMAIL PROTECTED] 
 Sent: Friday, February 06, 2004 8:58 PM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] imported footprint
 
 I have imported an Orcad .DSN project into DXP and need to 
 modify the design and re-layout the board. The imported files 
 resulted in four SchDoc's, one PCB and one SchLib - my 
 question is how do I extract the footprint information for 
 the components from the PCB? The schematic symbols are all in 
 the SchLib, but I'd like to reuse the custom SMD footprints 
 without having to remake them all from scratch. Does anyone 
 know a way to do this?

Bob

You should still be able to use the Design, Make PCB Library tool in the DXP
PCB editor assuming you have saved the .max file as a Protel PCB file.

JOhn




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Re: [PEDA] Nothing to do with Synchroniser won't recognise components

2004-02-04 Thread John A. Ross [Design]
 -Original Message-
 From: Protel Hell [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, February 04, 2004 2:39 PM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] Synchroniser won't recognise components
 
 are the rules for email different outside the U'S.?

You mean like this? :-)

I did not think the US had made a standard for email reply, yet.

But IMHO point by point replies are the most efficient way of
responding. What use is having an answer before a question.

 it has been the custom in a thread to add your comments to 
 the top of the email, that way people know what you are 
 adding to the thread, they also have a history of what has 
 been said because each person adds to the original conversation,

Only for those people already following or familiar with the thread. Or
for people using a threaded view of the topic.

For anyone else it is hard to read when the answer appears before the
question.
 
 I notice many of you go through the email reformatting what 
 has previously been said and intermixing your replies

Most efficient way to format responses to individual answers.
 
 the goal of communication is shared meaning, why is it 
 everyone always tries to change the way we communicate? is 
 the standard way really that bad?

I have always answered this way.
 
 if you respond, there is no need to write a novel, KISS

Others can write the novel, I have just responded with my $0.02 worth
 
 BTW, I did not edit anything, just hit the reply button, look 
 what has happened to the thread

Nope, but if I had grouped all my responses in one lump of text at the
top, anyone else other than you, reading this thread, would have to
first scroll down to read the question and then back to the top to read
the response and so on.

Might just be  me, but I prefer it like this, as my eyes are getting too
old to play 'ping pong' with messages that I have to page up/page down
the screen to scroll around to read.

I like to have it all in front of me or in a logical order, Q/A

In any event, should I be in need of help, I will always be extremely
grateful for any response I receive, regardless of how it is formatted
as the content is more important than its aesthetic appearance or any
single users perception of proper etiquette.

All Best

John


 From: Ian Wilson [EMAIL PROTECTED]
 Reply-To: Protel EDA Forum [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Subject: Re: [PEDA] Synchroniser won't recognise components
 Date: Wed, 04 Feb 2004 10:23:56 +1100
 
 On 07:36 AM 4/02/2004, Jon Elson said:
 
 
 Leo Potjewijd wrote:
 
 Hello.
 I am trying to update an existing PCB (196U passive 
 backplane): it needs 
 to be shorter, lose some connectors and gain two connectors of a 
 different type.
 
 I changed the schematic (just a single sheet) to include 
 all connectors 
 and their interconnections (almost all of them got a new 
 refdes); then I 
 changed the PCB manually to add the new ones, delete the 
 unwanted ones 
 and renumbered them all according to the new schematic.
 
 When I run 'update PCB' the synchroniser does not recognise two 
 (different) connectors: it claims that J7 is not on the 
 PCB (which it is) 
 and that J13 is not on the schematic (which it is).
 I checked all fields, names etc of the components in 
 question but cannot 
 find anything wrong.
 Ugh, you've de-synchronized the synchronizer.
 
 This occasionally happens when you manually change parts on 
 the PCB and 
 then
 try to synchronize.  Once it happens, the synchronizer is 
 very difficult 
 to get working
 right again, although it sometimes clears itself.
 
 I think the easiest way to clear the hidden synch handles 
 is to save the 
 PCB file as an ASCII file and the close and re-open.  When 
 you try to 
 re-synch the Match by Designator dialog will pop up to help 
 you make the 
 initial match.
 
 Leo - you would probably have been better off only making the manual 
 changes in Sch and then done an update.  this should have 
 created macros to 
 delete and change components as required and then you could 
 have finished 
 off the PCB.  This is what I do - almost all changes are 
 driven from the 
 Sch via the Update PCB (synchroniser).  Rarely would I muck 
 about on both 
 the Sch and the PCB at the same time unless I am really careful.  
 Occasionally I will change the footprint of a component on 
 the PCB and then 
 use the Update Sch to push that change back to the Sch.
 
 Ian Wilson
 
 
 
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Re: [PEDA] basic protel dxp questions

2004-01-30 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Knutson, Randy Wayne [mailto:[EMAIL PROTECTED] 
 Sent: Friday, January 30, 2004 11:04 PM
 To: Protel EDA Forum
 Subject: [PEDA] basic protel dxp questions
 
 Hi,
 I was wondering if any DXP users were on this forum because I 
 have a few questions that I think should be easy to answer 
 but for the life of me I just can't seem to figure them out. 
  
 1. When I place a resistor I see 3 parameters for that part: 
 R?, res, 1K How do I globally turn off the 'res' parameter so 
 that when I place a part I only see R? and 1K

This only applies to some of the parts in the default DXP libraries.

The value you are seeing as RES1 comes from the comment field.

Use shortcuts T, P then select 'Default Primitives', double click 'Part'
from the list of primitives and uncheck the box to the right of 'Comment'
field and click OK.

All of the parts you will place will no not have the RES1 visible as your
'comment' field is now hidden.

If you have already placed a lot of parts, then you should use the find
similar object function and change all these to non visible as well. 

Just be careful as the 'comment' field was actually used as the value in
99se... So imported sheets will not have the value= parameter in the SCH
symbol and will not show you any value for the part as you have hidden it!

 2. I was wondering what general strategies you guys and gals 
 use to route your boards. Do you manually route important 
 stuff and let the auto router take care of the rest? ANY 
 advice would be greatly appreciated!

In any attempts that I have made to use the Protel router from when 98
version was released till now, has ended in pain, more pain  failure. This
is in my case, it might do the job for you very well, try it out.

I have seen some examples of some dense boards auto routed in Protel (or at
least it was claimed they were routed in Protel) and they look very good
indeed, I have never been able to get such results, but it is sure possible.


Have you experimented with the PCB Benchmark test board supplied with DXP to
see for yourself? 

It is promised that there will be BIG improvements to the DXP router for
P2004 release, I really hope this is true, Situs was very disappointing at
first release, and not much better at SP1 to SP2 or even Sp3pre. 

Mostly I will route by hand in 99SE or DXP.

For dense boards with complex rules which I would use an auto router for, I
gave up with Protel a long time ago for day-day work and now I prefer
another more stable router/layout path. But I can still hope Situs can
deliver the goods some day.

Best Regards

John A. Ross

RSD Communications Ltd
8 BorrowMeadow Road
Springkerse Industrial Estate
Stirling, Scotland FK7 7UW

Tel +44 [0]1786 450572 Ext 225 (Office)
Tel +44 [0]1786 450572 Ext 248 (Lab)
Fax +44 [0]1786 474653
GSM +44 [0]7831 373727

Email   [EMAIL PROTECTED]
WWW http://www.rsd.tv
==
 
 



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Re: [PEDA] TO-220 4th pin?

2004-01-29 Thread John A. Ross [Design]
 -Original Message-
 From: Dom Bragge [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, January 29, 2004 5:23 AM
 To: protel
 Subject: [PEDA] TO-220 4th pin?
 
 I just would like to ask a question about how you handle 
 TO-220 footprints ( the like)...
 
 I have the three (electrical) pin device, that's fine.
 I'm placing the T)-220's flat on the board.
 
 What if I want to (selectively) put copper on the top layer 
 under the TO-220  have a suitable soldermask antipad? This 
 could aid in cooling without resorting to an actual heatsink.
 How should I best do that?
 
 Do I place on the board a free pad, rectangle, with a hole 
 the same size as the hole for the TO-220 tab? Seems a bit 
 ugly, two holes etc etc but it should probably give me the 
 SMask opening.
 
 Do I make a 4pin lib part, have a 4th pin on the footprint 
 being the large hole  add a polygon connected to that net? I 
 suppose I'll have to add an opening for the SMask on the 
 TO-220 footprint as well.

Dom

I usually keep 2 footprints available and one SCH symbol.

The SCH symbol is always the same, 3 pins plus Tab (pin4), the footprint
can then have several choices, normally I have a manufacturer prefix,
and then TO220H or TO220V.

If I intend to use this symbol with a vertical TO220 footprint I just
add the No ERC marker to the 4th pin. PCB update just ignores pin 4
then, as does the DRC. I never add the fill or copper to the horiz
version in the library, I do it manually afterwards as it is too much
hassle when doing updates to have to update free primitives from... All
the time.  

Easiest thing is to see it, so I uploaded a TO220 example from my user
library to http://www.proteluser.com/download/to220/Export.zip

Ignore the paste definitions layer, that is for something else ;)

Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
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Re: [PEDA] Orcad vs. Protel (was: Leaving Protel)

2004-01-29 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Kerry Berland [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, January 29, 2004 11:11 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Orcad vs. Protel (was: Leaving Protel)
 
 We did a custom project last year in which we were asked to 
 use Orcad Layout in place of Protel. It was an ordeal. Lacked 
 behind Protel in dozens of ways. Error checking was poor, 
 user interface difficult to learn, limited undo, many other 
 shortcomings. Our opinion--their schematic capture program is 
 decent, their layout program was truly awful.

Kerry,

Yes their layout tool is awful indeed, but keeping up some knowledge of
Orcad capture is still a good skill to have as it is very popular  still
the preferred tool for design entry for many large companies. In any event
if you have to translate any designs to Protel it is handy to know where the
errors came from in Orcad.

 Later on we did another custom project with some very 
 talented engineers.
 Got to talking about layout packages. One engineer said, 
 well, out here in Southern California, a lot of people use 
 Orcad's schematic capture program, but virtually nobody uses 
 their layout package.

For the period of time I worked in sunny California I was used to using
Orcad capture/Pads layout as this was the most common combination deployed
throughout the design team (60-70 seats Capture, 10 or so of Pads) I found
there. It is also a very common combination in Asia as well.

 Have heard of a lot of people using PADS, some using PCAD, 
 some Protel, but very rarely run into people using Orcad for layout. 

Pads is extremely popular. They have respected their users investments in
training, experience, familiarity with GUI etc much more than other vendors
by keeping the GUI the same for many years, just adding to it, so it looks
clunky, outdated and ugly, but like most tools, once someone has experience,
shortcut keys make light work of any job. Does not have to look nice to work
good.

PCAD is the same in many respects, except the latest evolutions after the
Altium influence.

They both have good points  bad, just like Protel, guess its down to which
tools you can use to get the job done well and in the least time.

Best Regards

John A. Ross

RSD Communications Ltd
8 BorrowMeadow Road
Springkerse Industrial Estate
Stirling, Scotland FK7 7UW

Tel +44 [0]1786 450572 Ext 225 (Office)
Tel +44 [0]1786 450572 Ext 248 (Lab)
Fax +44 [0]1786 474653
GSM +44 [0]7831 373727

Email   [EMAIL PROTECTED]
WWW http://www.rsd.tv
==
 
 



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Re: [PEDA] Toolbar File question

2004-01-12 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Joe Sapienza [mailto:[EMAIL PROTECTED] 
 Sent: Monday, January 12, 2004 7:34 PM
 To: Protel EDA Forum
 Subject: [PEDA] Toolbar File question
 
 Ok here's one simple question beacuase I'm getting old and forgetful
 
 If I want to tranfer my customized toolbars from one system 
 to another is it all in the .DFT file or is it some other file?

Normally all the customisations are in the client99.rcs file I believe. 

John



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Re: [PEDA] Schematic Symbol Import

2004-01-08 Thread John A. Ross [Design]
 -Original Message-
 From: Steve Smith [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, January 07, 2004 4:09 PM
 To: [EMAIL PROTECTED]
 Subject: [PEDA] Schematic Symbol Import
 
 
 Is there a way to import Mentor or EDIF schematic symbols 
 into DXP? I have found schematic symbols on Motorola's web 
 site.  I'm really trying to avoid drawing symbols for a 783 
 pin device.

Steve

Which part on Mots site are you trying to convert? Can you give me the
URL?

John


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Re: [PEDA] Schematic Symbol Import

2004-01-08 Thread John A. Ross [Design]
Steve

I already found it from your post in the DXP list.

I have tried to open these files and export a Orcad library for you but
I keep getting an error on export. The orcad librray you could open in
DXP.

I have asked my colleague in Spain who uses Board Architect if he can
open the Mentor files and re-export them. But I wont get an answer till
tommorrow.

But I think that's quicker than editing all pins by hand. As an
alternative, I have asked him to give me a CSV dump of the pin list and
you could use the speadsheet method in DXP to create the part.

Will get back to you tomorrow


Best Regards

John A. Ross

RSD Communications ltd
Email  [EMAIL PROTECTED]
WWWhttp://www.rsd.tv
==  

 -Original Message-
 From: Steve Smith [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, January 08, 2004 2:39 PM
 To: 'Protel EDA Forum'
 Subject: Re: [PEDA] Schematic Symbol Import
 
 
 John,
 
 Here's the url: 
 http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?cod
 e=MPC8540
 
 About 3/4 down is a schematics section for part symbols.  I'm 
 wondering if there is a way to import these.
 
 Thanks,
 Steve
 
 -Original Message-
 From: John A. Ross [Design] [mailto:[EMAIL PROTECTED] 
 Sent: Thursday, January 08, 2004 4:54 AM
 To: Protel EDA Forum
 Subject: Re: [PEDA] Schematic Symbol Import
 
  -Original Message-
  From: Steve Smith [mailto:[EMAIL PROTECTED]
  Sent: Wednesday, January 07, 2004 4:09 PM
  To: [EMAIL PROTECTED]
  Subject: [PEDA] Schematic Symbol Import
  
  
  Is there a way to import Mentor or EDIF schematic symbols
  into DXP? I have found schematic symbols on Motorola's web 
  site.  I'm really trying to avoid drawing symbols for a 783 
  pin device.
 
 Steve
 
 Which part on Mots site are you trying to convert? Can you 
 give me the URL?
 
 John
 
 
 
 


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Re: [PEDA] [dxp] Grouping parts to form Parent part

2004-01-06 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Wiper, Craig (VER) [mailto:[EMAIL PROTECTED] 
 Sent: Tuesday, January 06, 2004 3:34 PM
 To: DXP Technical Forum
 Subject: Re: [dxp] Grouping parts to form Parent part
 
 John,
 
 Isn't there already a 'grouping' function in DXP? I thought 
 it was under Tools/Convert/Create Union From Selected 
 Components. I've never had a reason to use it, but you might 
 give it a try and see if it's close to what you're asking for.

Craig,

Many thanks, nice one.

I had not even noticed it. I'll dig out the docs later and read some now I
know what to search for  :-) In fact I found the same menu items in 99SE as
well (embarrassed now)

I tried it out, and its most of the way there. But it will only do
components, so free pads etc are out, they cannot even be added to the
'union'. Its not always convenient to make a component for a mounting hole.

It is also possible to clear all unions globally, which restricts it a
little, as this could be prone to accidental deletion of the union, which in
the case of a connector array, made to match an enclosure aperture, could
end up spoiling a lot of work.

But if we could have it tweaked so that it could be assigned as a parameter
UnionId=x, where x is the group it belongs to, these would need to be
manually removed so would be a bit more secure and less prone to accidental
deletion. It may even be able to pass this parameter from the SCH where the
parts association may be better visualised.

I'm actually off to dig around the menus to see what else is hiding in
there, that's not very well documented.

Sometimes best hiding place is in plain sight.

Any more gems like that, keep 'em coming.

John

 
 
 Craig Wiper
 GENERAL DYNAMICS - OTS
 Healdsburg, CA
 
  -Original Message-
 From: John A. Ross [Design] [mailto:[EMAIL PROTECTED] 
 Sent: Tuesday, January 06, 2004 4:02 AM
 To:   DXP Technical Forum
 Subject:  [dxp] Grouping parts to form Parent part
 
 Hi
 
 After following a thread on the PEDA list I was wondering if 
 an additional feature would be considered by Altium at this 
 stage as an enhancement to the PCB editor. I had never really 
 thought about this until now. I have kept the request as 
 simple as I can, as I think any added belle and whistles 
 would just make a simple thing difficult.
 
 The basic idea would be to have a parameter added to parts 
 placed on the PCB to be 'grouped' and effectively locked 
 together in the same way most graphics / office applications 
 can group items (say GroupID=x for sake of giving it a name). 
 No need to run queries, selection of anything difficult on a 
 per operation basis, just a group.
 
 Any items picked up or selected from the PCB workspace 
 (parts, pads etc) included in GroupID=x would automatically 
 be treated as part of a 'parent' part and also moved (like an 
 invisible, permanent selection although that might be bad 
 terminology).
 
 Of course this can be done by selection as well, on an 
 individual basis, but this is not efficient when making the 
 first placement of a new board. But if the parts, retaining 
 their individual boundary box properties, were always 
 'locked' (grouped) together, instead of just primitives 
 belonging to a single library part with a large boundary 
 area, then it would be possible to make up a larger 'parent 
 part' with fixed mechanical offsets for the objects grouped 
 in it, like the mounting holes and connectors for 
 daughter/main board assemblies and still be able to make 
 proper use of clearance and DRC rules for the individual parts. 
 
 The 'group' selection would effectively be invisible to the 
 DRC system, as DRC / rules, would be applied only to the 
 individual parts in the 'group' as they would normally.
 
 This could be seen as an enhancement as any 'group' parts 
 would always be moved by the same amount and you can be sure 
 the rest of the parts will be in the right place.
 
 The ability to group, instead of keeping a library part, 
 avoids the issues of placing/selecting/moving/focussing on 
 other parts primitives placed within the 'boundary box' area 
 of the larger part under the 'daughter' board area (large 
 part)  and still be able to make proper use of clearance and 
 DRC rules as the parts themselves, within the group exist 
 still, as only individual objects in the database, so rules 
 are applied directly to them as normal.
 
 Sorry for any repetitiveness above, but its one of those 
 things that is easier to show, than describe, but you know 
 what I mean, hopefully ;-)
 
 Best Regards
 
 John A. Ross
 
 RSD Communications Ltd
 8 BorrowMeadow Road
 Springkerse Industrial Estate
 Stirling, Scotland FK7 7UW
 
 Tel   +44 [0]1786 450572 Ext 225 (Office)
 Tel   +44 [0]1786 450572 Ext 248 (Lab)
 Fax   +44 [0]1786 474653
 GSM   +44 [0]7831 373727
 
 Email [EMAIL PROTECTED]
 WWW   http://www.rsd.tv
 ==
  
 
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 You are currently subscribed to dxp For details about

Re: [PEDA] Problems with ports

2004-01-06 Thread John A. Ross [RSDTV]
Phil have you checked to se if Orcad ports have been enabled?

Tools,Preferences,Scematic tab, OrCad load options, check box OrCad TM ports
should be unchecked for all sheets/projects

If it is checked it will resize port to suit text length, if you uncheck it
you might need to globally resize all the ports again.

John

 

 -Original Message-
 From: DUTTON Phil [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, January 07, 2004 2:04 AM
 To: Protel EDA Forum
 Subject: [PEDA] Problems with ports
 
 Hello,
 
 I'm having a schematic problem with 99SE SP6.
 Unexpectedly, and with no input on my part, all of my ports 
 have changed length to suit the text that they contain and 
 can no longer be edited by dragging or otherwise to alter 
 their length.
 Has anyone come across this and found a solution?
 (I have DXP, but am not using it yet. The ports are ok if I 
 convert the design to a DXP project.)
 
 regards,
 
 Phil.
 
 



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Re: [PEDA] Transparent footprints

2004-01-05 Thread John A. Ross [Design]
 -Original Message-
 From: Laurie Biddulph [mailto:[EMAIL PROTECTED] 
 Sent: Monday, January 05, 2004 6:33 AM
 To: Protel EDA Forum
 Subject: [PEDA] Transparent footprints
 
 Hi, I hope you all had a happy Xmas.
 I need to place two large components on a pcb that will 
 actually be on spacers and connected to the main board by 
 short wire links. As the items are relatively large (one of 
 them is one of those standard 2- or 4-line LCD modules) the 
 footprint for these will be quite large yet be basically 
 empty - there will be four spacers, one for each corner, plus 
 a short multi-way connector. Is there any way of creating 
 this as a component footprint so that it may be correctly 
 moved and position on the main board yet still allow Protel 
 to freely place components and tracks in the free area under 
 these components?
 
 As the position of the spacers relative to the connector is 
 fairly critical it is preferable that this is one single component.

I believe you ca do this, although component selection within the
boundry box of the larger part will be dificult.

I also think you will need to turn off component clearance checking
between parts otherwise you will get DRC errors for all parts 'under'
the larger part as technically it will have 0 clearance.

John


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[PEDA] Solder mask...

2003-12-19 Thread John A. Ross [RSDTV]
 -Original Message-
 From: Tom Robinson [mailto:[EMAIL PROTECTED]
 Sent: Tuesday, December 16, 2003 9:26 PM
 To: Protel EDA Forum
 Subject: [PEDA] Solder mask...
 
 
 Is it ok to block open the solder mask on gull-wing i.c.'s with .4mm 
 AND .5mm pitches?
 
 It seems to get enough web in between the pads to stick will cause a 
 LPI registration thats too tight, with possible smearing. And if you 
 make the pads themselves too narrow -- thats another problem.

Tom

I always block open the pads on these pitches. 

It is not so easy to get a manufacturer to get SM registration right at
these tolerances although it is possible.

Most quick turn boards I have had to take as 'free issue' parts to assemble,
which have not blocked off these areas, I have had quality issues with the
finished joints around these fine pitch pads.  

I have never had an issue with blocking them open, biggest solder mask issue
I have ever had was when the SM thickness to finished pad height
differential was too much (SM height was bigger than finished pad by a lot)
and we had gasketing issues from the paste screen to the pad, causing
problems like, paste bleeding out on the PCB side of the screen, some
shorts, failed 3d inspection after print cycle, loose solder ball symptoms
and aperture blockages, with our MPM printer having to make undue clean
cycles between prints. Also undue print down force had to be applied to
squeegee blades, increasing wear and decreasing accuracy.

Never had solder ball or short issues as long as the board is printed
correctly and the oven specifically profiled to suit your board. (also
optimise paste volumee, height, reductions...) 

John



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Re: [PEDA] What is the meaning of DXP

2003-12-17 Thread John A. Ross
 -Original Message-
 From: Protel Hell [mailto:[EMAIL PROTECTED] 
 Sent: Wednesday, December 17, 2003 4:26 PM
 To: [EMAIL PROTECTED]
 Subject: Re: [PEDA] What is the meaning of DXP
 
 Protel reminds me of the early versions of ViewDraw, not easy 
 to learn or use, I don't know where you are at or background 

Viewdraw, or as it is called now Pads/DX Designer is not that much better
now.

Up to P99SE the simplicity of the Protel user interface beat Viewdraw or
PowerLogic (which I used from DOS version also). I have only used Protel
since P98 came out, but used Orcad since SDT IV / Powerlogic since P2000 /
Viewdraw (hated that, gave up)

With DXP Altium decided a more cluttered environment was in order and
spoiled that simplicity a bit IMO not only for previous Protel users but new
ones as well. I think it was haste, or developers with a new toy (nice
panels)  and a little additional razz for marketing but I have a feeling the
comments on the DXP list to rationalise the functions within the panels to
tidy them up and reduce the amount open at one time will get a fair hearing.


 all you have to do to see how well sch  pcb match in Protel 
 is look at the cardboard triangle thing they give you, if I 
 every remember all that I'll
 either: be committed to insane asylum or forget everything else I know

It is far more natural than you think.
 
 I hope my bitching is seen as constructive by Altium, 
 ViewDraw which I compared it to is much easier to learn and 
 productivity has increased than it was in the past, hopefully 
 DXP will improve too

No one usually bitches more about DXP as regards the UI and project/file
management structure than me.

But as far as comparing Viewdraw and DXP, I would have to pick DXP every
time, warts and all.

John



 
 
 
 From: Abd ul-Rahman Lomax [EMAIL PROTECTED]
 Reply-To: Protel EDA Forum [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Subject: Re: [PEDA] What is the meaning of DXP
 Date: Tue, 16 Dec 2003 17:56:03 -0500
 
 At 02:40 PM 12/16/2003, Protel Hell wrote:
 so what's the excuse for pcb not matching schematic?
 
 The history was two different DOS programs... Then there are 
 differences in what is natural with schematics and what is 
 natural with 
 PCB design. In schematic, symbol representation is important but not 
 electrically functional, in PCB, most everything creates a physical 
 structure with important characteristics. It is clear that 
 the programs 
 were not originally designed to have a common way of doing things; 
 sometimes this is appropriate, sometimes it is merely irritating.
 
 
 I hope they work on the productivity, it is obvious the system was 
 designed more from the EE designers perspective, and that's 
 great, but 
 for the person that only does pcb design it is very slow, I hope I 
 never have to do a large board with this, I'll use 
 something else if 
 it is up to me
 
 As a printed circuit designer, I found Protel quite easy to use, I 
 started with Protel 98. (I had used the Autotrax demo years 
 before to 
 write a Tango
 - Protel bidirectional translator, but the real key to my Protel 
 experience was Tango itself, since it was pretty much an Autotrax 
 killer, written by Accel to grab the U.S. market of Protel, 
 for whom they had been the U.S.
 rep.)
 
 I'm not sure I agree that Protel is designed more from the EE 
 designers perspective, partly because I'm not sure exactly what Mr. 
 Protel Hell means. Protel definitely appeals more to 
 engineers than to 
 in-house printed circuit design specialists, but the reasons 
 for that 
 are complex, having a lot to do with the kinds of characters who are 
 attracted to -- or qualified for -- the two fields. I'm a printed 
 circuit designer, a specialist to be sure, but my training and 
 inclinations are more like an engineer and, when I worked at large 
 companies, tended to get along very well with the engineers 
 and not always so well with other designers..
 
 Protel is a highly flexible design system, there are usually 
 many ways 
 to accomplish a task, and it has an open database, which gives even 
 more flexibility. I might be called a printed circuit design 
 engineer, rather than a CAD specialist per se. I was never 
 shy to dig 
 into the inner workings of the programs I worked with, to 
 write my own 
 utilities to manipulate databases when the command set of 
 the program 
 didn't do what I needed, or didn't do it with sufficient 
 power and speed.
 
 I find it interesting that I almost completely stopped writing 
 utilities when I started using Protel, because the program 
 already did 
 most of what I needed to do; what remained could usually be handled 
 simply by opening up the ASCII database with Word or Excel.
 
 Productivity is a double-edged sword. Sometimes what makes a program 
 difficult to learn can increase productivity for one who has learned 
 it; the reverse can be true as well, i.e., what makes a program more 
 productive can make it harder 

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